MJF122, MJF127 Complementary Power Darlingtons For Isolated Package Applications Designed for general−purpose amplifiers and switching applications, where the mounting surface of the device is required to be electrically isolated from the heatsink or chassis. COMPLEMENTARY SILICON POWER DARLINGTONS 5.0 A, 100 V, 30 W Features • • • • • • • • http://onsemi.com Electrically Similar to the Popular TIP122 and TIP127 100 VCEO(sus) 5.0 A Rated Collector Current No Isolating Washers Required Reduced System Cost High DC Current Gain − 2000 (Min) @ IC = 3 Adc UL Recognized, File #E69369, to 3500 VRMS Isolation Pb−Free Packages are Available* MARKING DIAGRAM ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ TO−220 CASE 221D−02 STYLE 2 MAXIMUM RATINGS Rating Symbol Value Unit VCEO 100 Vdc Collector−Base Voltage VCB 100 Vdc Emitter−Base Voltage VEB 5 Vdc VISOL 4500 3500 1500 VRMS Collector Current − Continuous Peak IC 5 8 Adc Base Current IB 0.12 Adc Total Power Dissipation (Note 2) @ TC = 25_C Derate above 25_C PD 30 0.24 W W/_C MJF122 Total Power Dissipation @ TA = 25_C Derate above 25_C PD 2 0.016 W W/_C MJF122G TJ, Tstg −65 to + 150 IC Collector−Emitter Voltage RMS Isolation Voltage (Note 1) Test No. 1 Per Figure 14 (for 1 sec, R.H. < 30%, Test No. 2 Per Figure 15 TA = 25_C) Test No. 3 Per Figure 16 Operating and Storage Junction Temperature Range THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction−to−Ambient RqJA 62.5 _C/W Thermal Resistance, Junction−to−Case (Note 2) RqJC 4.1 _C/W Lead Temperature for Soldering Purpose TL 260 _C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Proper strike and creepage distance must be provided. 2. Measurement made with thermocouple contacting the bottom insulated mounting surface (in a location beneath the die), the device mounted on a heatsink with thermal grease and a mounting torque of ≥ 6 in. lbs. © Semiconductor Components Industries, LLC, 2006 April, 2006 − Rev. 5 1 x G A Y WW MJF12xG AYWW = 2 or 7 = Pb−Free Package = Assembly Location = Year = Work Week ORDERING INFORMATION Device MJF127 MJF127G Package Shipping† TO−220 50 Units / Rail TO−220 (Pb−Free) 50 Units / Rail TO−220 50 Units / Rail TO−220 (Pb−Free) 50 Units / Rail †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Publication Order Number: MJF122/D MJF122, MJF127 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted) Characteristic Symbol Min Max Unit VCEO(sus) 100 − Vdc Collector Cutoff Current (VCE = 50 Vdc, IB = 0) ICEO − 10 mAdc Collector Cutoff Current (VCB = 100 Vdc, IE = 0) ICBO − 10 mAdc Emitter Cutoff Current (VBE = 5 Vdc, IC = 0) IEBO − 2 mAdc hFE 1000 2000 − − − Collector−Emitter Saturation Voltage (IC = 3 Adc, IB = 12 mAdc) Collector−Emitter Saturation Voltage (IC = 5 Adc, IB = 20 mAdc) VCE(sat) − − 2 3.5 Vdc Base−Emitter On Voltage (IC = 3 Adc, VCE = 3 Vdc) VBE(on) − 2.5 Vdc hfe 4 − − Cob − − 300 200 pF OFF CHARACTERISTICS Collector−Emitter Sustaining Voltage (Note 3) (IC = 100 mAdc, IB = 0) ON CHARACTERISTICS (Note 3) DC Current Gain (IC = 0.5 Adc, VCE = 3 Vdc) DC Current Gain (IC = 3 Adc, VCE = 3 Vdc) DYNAMIC CHARACTERISTICS Small−Signal Current Gain (IC = 3 Adc, VCE = 4 Vdc, f = 1 MHz) Output Capacitance (VCB = 10 Vdc, IE = 0, f = 0.1 MHz) MJF127 MJF122 3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 5 RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS D1, MUST BE FAST RECOVERY TYPES, e.g., 1N5825 USED ABOVE IB ≈ 100 mA MSD6100 USED BELOW IB ≈ 100 mA RC t, TIME (s) μ RB 51 0 V1 APPROX. −12 V 25 ms tr, tf ≤ 10 ns DUTY CYCLE = 1% D1 ≈8 k 2 SCOPE TUT V2 APPROX. +8 V ts 3 VCC − 30 V ≈120 0.3 0.2 +4 V 0.1 0.07 0.05 0.1 FOR td AND tr, D1 IS DISCONNECTED AND V2 = 0 FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES. tf 1 0.7 0.5 tr VCC = 30 V IC/IB = 250 IB1 = IB2 TJ = 25°C 0.2 td @ VBE(off) = 0 V PNP NPN 0.5 0.7 1 2 3 0.3 IC, COLLECTOR CURRENT (AMP) 5 Figure 2. Typical Switching Times Figure 1. Switching Times Test Circuit http://onsemi.com 2 7 10 MJF122, MJF127 PD, POWER DISSIPATION (WATTS) TA TC 4 80 3 60 TC 2 40 TA 1 20 0 0 40 20 60 80 100 120 140 160 T, TEMPERATURE (°C) Figure 3. Maximum Power Derating r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1 0.5 0.3 0.2 0.1 SINGLE PULSE RqJC(t) = r(t) RqJC TJ(pk) − TC = P(pk) RqJC(t) 0.05 0.03 0.02 0.01 0.1 0.2 0.3 0.5 1 2 5 3 10 20 30 50 t, TIME (ms) 100 200 300 500 1K 2K 3K 5K 10K Figure 4. Thermal Response IC, COLLECTOR CURRENT (AMPS) 10 There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 5 is based on TJ(pk) = 150_C; TC is variable depending on conditions. Secondary breakdown pulse limits are valid for duty cycles to 10% provided TJ(pk) < 150_C. TJ(pk) may be calculated from the data in Figure 4. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by secondary breakdown. 100 ms 5 3 1ms TJ = 150°C 2 d c 5 ms 1 CURRENT LIMIT SECONDARY BREAKDOWN LIMIT THERMAL LIMIT @ TC = 25°C (SINGLE PULSE) 0.5 0.3 0.2 0.1 1 5 20 30 2 3 10 50 VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS) 100 Figure 5. Maximum Forward Bias Safe Operating Area http://onsemi.com 3 MJF122, MJF127 300 5000 3000 2000 200 TJ = 25°C C, CAPACITANCE (pF) hfe , SMALL−SIGNAL CURRENT GAIN 10,000 1000 500 300 200 TC = 25°C VCE = 4 Vdc IC = 3 Adc 100 50 30 20 10 Cob 100 Cib 70 50 PNP NPN PNP NPN 1 2 5 10 20 50 100 f, FREQUENCY (kHz) 200 30 0.1 500 1000 0.2 0.5 1 2 5 10 20 VR, REVERSE VOLTAGE (VOLTS) Figure 6. Typical Small−Signal Current Gain PNP MJF127 20,000 20,000 VCE = 4 V VCE = 4 V 10,000 5000 hFE , DC CURRENT GAIN 10,000 hFE , DC CURRENT GAIN 100 Figure 7. Typical Capacitance NPN MJF122 TJ = 150°C 3000 2000 25°C 1000 −55 °C 500 300 200 50 0.1 0.2 0.5 0.7 0.3 2 1 3 5 7 7000 5000 2000 1000 700 500 300 200 0.1 10 TJ = 150°C 3000 25°C −55 °C 0.2 0.3 0.5 0.7 1 2 3 5 7 10 IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP) VCE , COLLECTOR−EMITTER VOLTAGE (VOLTS) VCE , COLLECTOR−EMITTER VOLTAGE (VOLTS) Figure 8. Typical DC Current Gain 3 TJ = 25°C 2.6 IC = 2 A 4A 6A 2.2 1.8 1.4 1 0.3 0.5 0.7 1 2 3 5 7 10 20 30 3 TJ = 25°C 2.6 IC = 2 A 6A 4A 2.2 1.8 1.4 1 0.3 0.5 0.7 1 2 3 5 IB, BASE CURRENT (mA) IB, BASE CURRENT (mA) Figure 9. Typical Collector Saturation Region http://onsemi.com 4 7 10 20 30 MJF122, MJF127 NPN MJF122 PNP MJF127 3 3 TJ = 25°C TJ = 25°C 2.5 V, VOLTAGE (VOLTS) V, VOLTAGE (VOLTS) 2.5 2 1.5 VBE(sat) @ IC/IB = 250 VBE @ VCE = 4 V 1 0.5 0.1 2 1.5 VBE @ VCE = 4 V VBE(sat) @ IC/IB = 250 1 VCE(sat) @ IC/IB = 250 VCE(sat) @ IC/IB = 250 0.5 0.2 0.3 0.5 0.7 2 1 3 5 7 0.1 10 0.2 0.3 IC, COLLECTOR CURRENT (AMP) 0.5 0.7 1 2 3 5 7 10 7 10 IC, COLLECTOR CURRENT (AMP) Figure 10. Typical “On” Voltages +5 +4 θV, TEMPERATURE COEFFICIENTS (mV/°C) θV, TEMPERATURE COEFFICIENT (mV°C) +5 *IC/IB ≤ hFE 3 +3 25°C to 150°C +2 − 55°C to 25°C +1 0 −1 *qVC FOR VCE(sat) −2 25°C to 150°C −3 −4 −5 0.1 − 55°C to 25°C qVB FOR VBE 0.2 0.3 0.5 0.7 1 2 3 5 7 10 +4 *IC/IB ≤ hFE 3 +3 25°C to 150°C +2 +1 0 −1 *qVC FOR VCE(sat) −2 − 55°C to 25°C −3 qVB FOR VBE −4 −5 0.1 IC, COLLECTOR CURRENT (AMP) − 55°C to 25°C 25°C to 150°C 0.2 0.3 0.5 1 2 3 IC, COLLECTOR CURRENT (AMP) 5 Figure 11. Typical Temperature Coefficients 105 105 FORWARD REVERSE IC, COLLECTOR CURRENT (A) μ IC, COLLECTOR CURRENT (A) μ REVERSE 104 VCE = 30 V 103 102 TJ = 150°C 101 100 100°C 25°C 10−1 −0.6 − 0.4 −0.2 0 +0.2 +0.4 +0.6 +0.8 +1 VCE = 30 V 103 102 TJ = 150°C 101 100°C 100 10−1 +1.2 +1.4 FORWARD 104 25°C +0.6 +0.4 +0.2 VBE, BASE−EMITTER VOLTAGE (VOLTS) 0 −0.2 −0.4 −0.6 −0.8 −1 VBE, BASE−EMITTER VOLTAGE (VOLTS) Figure 12. Typical Collector Cut−Off Region http://onsemi.com 5 −1.2 −1.4 MJF122, MJF127 NPN MJF122 PNP MJF127 COLLECTOR BASE COLLECTOR BASE ≈8k ≈ 120 ≈8k EMITTER ≈ 120 EMITTER Figure 13. Darlington Schematic TEST CONDITIONS FOR ISOLATION TESTS* CLIP MOUNTED FULLY ISOLATED PACKAGE MOUNTED FULLY ISOLATED PACKAGE CLIP MOUNTED FULLY ISOLATED PACKAGE 0.099" MIN LEADS LEADS HEATSINK 0.099" MIN LEADS HEATSINK HEATSINK 0.110" MIN Figure 14. Clip Mounting Position for Isolation Test Number 1 Figure 15. Clip Mounting Position for Isolation Test Number 2 Figure 16. Screw Mounting Position for Isolation Test Number 3 *Measurement made between leads and heatsink with all leads shorted together MOUNTING INFORMATION 4−40 SCREW CLIP PLAIN WASHER HEATSINK COMPRESSION WASHER HEATSINK NUT Figure 17. Typical Mounting Techniques* Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to 8 in . lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a constant pressure on the package over time and during large temperature excursions. Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in . lbs will cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability. Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in . lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend exceeding 10 in . lbs of mounting torque under any mounting conditions. ** For more information about mounting power semiconductors see Application Note AN1040. http://onsemi.com 6 MJF122, MJF127 PACKAGE DIMENSIONS TO−220 CASE 221D−03 ISSUE G −B− F −T− SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH 3. 221D−01 THRU 221D−02 OBSOLETE, NEW STANDARD 221D−03. C Q S A U DIM A B C D F G H J K L N Q R S U 1 2 3 H −Y− K G N L D J R 3 PL 0.25 (0.010) M B M Y INCHES MIN MAX 0.625 0.635 0.408 0.418 0.180 0.190 0.026 0.031 0.116 0.119 0.100 BSC 0.125 0.135 0.018 0.025 0.530 0.540 0.048 0.053 0.200 BSC 0.124 0.128 0.099 0.103 0.101 0.113 0.238 0.258 MILLIMETERS MIN MAX 15.88 16.12 10.37 10.63 4.57 4.83 0.65 0.78 2.95 3.02 2.54 BSC 3.18 3.43 0.45 0.63 13.47 13.73 1.23 1.36 5.08 BSC 3.15 3.25 2.51 2.62 2.57 2.87 6.06 6.56 STYLE 2: PIN 1. BASE 2. COLLECTOR 3. EMITTER ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 7 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MJF122/D