P3055LDG N-Channel Logic Level Enhancement Mode Field Effect Transistor NIKO-SEM TO-252 (DPAK) Lead-Free D PRODUCT SUMMARY V(BR)DSS RDS(ON) ID 25 50mΩ 12A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage SYMBOL LIMITS UNITS VGS ±20 V TC = 25 °C Continuous Drain Current TC = 100 °C Pulsed Drain Current 1 Avalanche Energy 2 Repetitive Avalanche Energy 8 IDM 45 L = 0.1mH EAS 60 L = 0.05mH EAR 3 TC = 25 °C Power Dissipation 12 ID Operating Junction & Storage Temperature Range 1 Lead Temperature ( /16” from case for 10 sec.) mJ 48 PD TC = 100 °C A W 20 Tj, Tstg -55 to 150 TL 275 °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM Junction-to-Case RθJC 3 Junction-to-Ambient RθJA 75 Case-to-Heatsink RθCS UNITS °C / W 1 1 Pulse width limited by maximum junction temperature. Duty cycle ≤ 1% 2 ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS LIMITS UNIT MIN TYP MAX STATIC Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 25 VGS(th) VDS = VGS, ID = 250µA 0.8 Gate-Body Leakage IGSS VDS = 0V, VGS = ±20V Zero Gate Voltage Drain Current IDSS Gate Threshold Voltage V 1.2 2.5 ±250 nA VDS = 20V, VGS = 0V 25 VDS = 20V, VGS = 0V, TJ = 125 °C 250 1 µA AUG-17-2004 P3055LDG N-Channel Logic Level Enhancement Mode Field Effect Transistor NIKO-SEM On-State Drain Current1 ID(ON) Drain-Source On-State Resistance1 RDS(ON) Forward Transconductance1 VDS = 10V, VGS = 10V gfs TO-252 (DPAK) Lead-Free 12 A VGS = 5V, ID = 12A 70 120 VGS = 10V, ID = 12A 50 90 VDS = 15V, ID = 12A 16 mΩ S DYNAMIC Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss 60 Total Gate Charge2 Qg 15 Gate-Source Charge 2 Gate-Drain Charge2 Turn-On Delay Time 2 450 VGS = 0V, VDS = 15V, f = 1MHz Qgs VDS = 0.5V(BR)DSS, VGS = 10V, 2.0 Qgd ID = 6A 7.0 td(on) tr VDS = 15V, RL = 1Ω 6.0 Turn-Off Delay Time2 td(off) ID ≅ 12A, VGS = 10V, RGS = 2.5Ω 20 Fall Time2 nC 6.0 2 Rise Time pF 200 tf nS 5.0 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C) Continuous Current IS 12 Pulsed Current ISM 20 Forward Voltage1 VSD 3 Reverse Recovery Time Peak Reverse Recovery Current Reverse Recovery Charge IF = IS, VGS = 0V 1.5 trr IRM(REC) V 30 nS 15 A 0.043 µC IF = IS, dlF/dt = 100A / µS Qrr A Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. 1 2 REMARK: THE PRODUCT MARKED WITH “P3055LDG”, DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name. 2 AUG-17-2004 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor 3 P3055LDG TO-252 (DPAK) Lead-Free AUG-17-2004 N-Channel Logic Level Enhancement Mode Field Effect Transistor NIKO-SEM P3055LDG TO-252 (DPAK) Lead-Free TO-252 (DPAK) MECHANICAL DATA mm mm Dimension Dimension Min. Typ. Max. Min. Typ. Max. A 9.35 10.4 H 0.89 2.03 B 2.2 2.4 I 6.35 6.80 C 0.45 0.6 J 5.2 5.5 D 0.89 1.5 K 0.6 1 E 0.45 0.69 L 0.5 0.9 F 0.03 0.23 M 3.96 G 5.2 6.2 N 4.57 5.18 G M 2 1 J I 3 L H D C E F B A K 4 AUG-17-2004