ONSEMI NCV8401DTRKG

NCV8401
Self-Protected Low Side
Driver with Temperature
and Current Limit
NCV8401 is a three terminal protected Low-Side Smart Discrete
device. The protection features include overcurrent, overtemperature,
ESD and integrated Drain-to-Gate clamping for overvoltage protection.
This device offers protection and is suitable for harsh automotive
environments.
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VDSS
(Clamped)
RDS(ON) TYP
ID MAX
(Limited)
42 V
23 mW @ 10 V
33 A*
Features
•
•
•
•
•
•
•
•
•
•
•
Short Circuit Protection
Thermal Shutdown with Automatic Restart
Over Voltage Protection
Integrated Clamp for Inductive Switching
ESD Protection
dV/dt Robustness
Analog Drive Capability (Logic Level Input)
RoHs Compliant
AEC-Q101 Qualified
NCV Prefix for Automotive and Other Applications Requiring Site
and Change Control
This is a Pb−Free Device
*Max current may be limited below this value
depending on input conditions.
Drain
Overvoltage
Protection
Gate
Input
ESD Protection
Temperature
Limit
Current
Limit
Current
Sense
Source
Typical Applications
• Switch a Variety of Resistive, Inductive and Capacitive Loads
• Can Replace Electromechanical Relays and Discrete Circuits
• Automotive / Industrial
MARKING
DIAGRAM
1
DPAK
CASE 369C
STYLE 2
Y
WW
xxx
G
2
3
= Year
= Work Week
= Device Code
= Pb−Free Package
YWW
xxx
xxxxxG
1 = Gate
2 = Drain
3 = Source
ORDERING INFORMATION
Device
Package
Shipping†
NCV8401DTRKG
DPAK
(Pb−Free)
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2010
February, 2010 − Rev. 7
1
Publication Order Number:
NCV8401/D
NCV8401
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain−to−Source Voltage Internally Clamped
VDSS
42
V
Drain−to−Gate Voltage Internally Clamped
(RGS = 1.0 MW)
VDGR
42
V
"14
V
Gate−to−Source Voltage
VGS
Drain Current − Continuous
ID
Total Power Dissipation
@ TA = 25°C (Note 1)
@ TA = 25°C (Note 2)
PD
Thermal Resistance,
Junction−to−Case
Junction−to−Ambient (Note 1)
Junction−to−Ambient (Note 2)
Internally Limited
1.1
2.0
W
RqJC
RqJA
RqJA
1.6
110
60
°C/W
Single Pulse Drain−to−Source Avalanche Energy
(VDD = 25 Vdc, VGS = 5.0 Vdc, IL = 3.65 Apk, L = 120 mH, RG = 25 W, TJstart = 150°C) (Note 3)
EAS
800
mJ
Load Dump Voltage (VGS = 0 and 10 V, RI = 2.0 W, RL = 3.0 W, td = 400 ms)
VLD
65
V
Operating Junction Temperature
TJ
−40 to 150
°C
Storage Temperature
Tstg
−55 to 150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Minimum FR4 PCB, steady state.
2. Mounted onto a 2″ square FR4 board
(1″ square, 2 oz. Cu 0.06″ thick single−sided, t = steady state).
3. Not subject to production testing.
+
ID
DRAIN
IG
+
VDS
GATE
SOURCE
VGS
−
−
Figure 1. Voltage and Current Convention
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2
NCV8401
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
42
42
46
44
50
50
Vdc
1.5
6.5
5.0
50
100
mAdc
1.8
5.0
2.0
Vdc
−mV/°C
23
43
29
55
28
50
34
60
VSD
0.80
1.1
V
ms
OFF CHARACTERISTICS
Drain−to−Source Clamped Breakdown Voltage
(VGS = 0 Vdc, ID = 250 mAdc)
(VGS = 0 Vdc, ID = 250 mAdc, TJ = 150°C) (Note 4)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = 32 Vdc, VGS = 0 Vdc)
(VDS = 32 Vdc, VGS = 0 Vdc, TJ = 150°C) (Note 4)
IDSS
Gate Input Current
(VGS = 5.0 Vdc, VDS = 0 Vdc)
IGSSF
mAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = 1.2 mAdc)
Threshold Temperature Coefficient
VGS(th)
Static Drain−to−Source On−Resistance (Note 5)
(VGS = 10 Vdc, ID = 5.0 Adc, TJ @ 25°C)
(VGS = 10 Vdc, ID = 5.0 Adc, TJ @ 150°C) (Note 4)
RDS(on)
Static Drain−to−Source On−Resistance (Note 5)
(VGS = 5.0 Vdc, ID = 5.0 Adc, TJ @ 25°C)
(VGS = 5.0 Vdc, ID = 5.0 Adc, TJ @ 150°C) (Note 4)
RDS(on)
Source−Drain Forward On Voltage
(IS = 5 A, VGS = 0 V)
1.0
mW
mW
SWITCHING CHARACTERISTICS (Note 4)
Turn−ON Time (10% VIN to 90% ID)
Turn−OFF Time (90% VIN to 10% ID)
Turn−ON Time (10% VIN to 90% ID)
Turn−OFF Time (90% VIN to 10% ID)
Slew−Rate ON (20% VDS to 50% VDS)
Slew−Rate OFF (80% VDS to 50% VDS)
VIN = 0 V to 5 V, VDD = 25 V
ID = 1.0 A, Ext RG = 2.5 W
tON
41
50
tOFF
129
150
VIN = 0 V to 10 V, VDD = 25 V,
ID = 1.0 A, Ext RG = 2.5 W
tON
16
25
tOFF
164
180
−dVDS/dtON
1.27
dVDS/dtOFF
0.36
Vin = 0 to 10 V, VDD = 12 V,
RL = 4.7 W
V/ms
SELF PROTECTION CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Current Limit
ILIM
VGS = 5.0 V, VDS = 10 V
VGS = 5.0 V, TJ = 150°C (Note 4)
VGS = 10 V, VDS = 10 V
VGS = 10 V, TJ = 150°C (Note 4)
Temperature Limit (Turn−off)
VGS = 5.0 V (Note 4)
TLIM(off)
VGS = 5.0 V
DTLIM(on)
Thermal Hysteresis
Temperature Limit (Turn−off)
25
11
30
16
35
21
30
18
35
25
40
28
150
175
200
15
165
°C
°C
VGS = 10 V (Note 4)
TLIM(off)
VGS = 10 V
DTLIM(on)
15
°C
VGS = 5 V ID = 1.0 A
IGON
50
mA
Thermal Hysteresis
150
Adc
185
°C
GATE INPUT CHARACTERISTICS (Note 4)
Device ON Gate Input Current
400
VGS = 10 V ID = 1.0 A
Current Limit Gate Input Current
VGS = 5 V, VDS = 10 V
IGCL
0.1
0.7
VGS = 10 V, VDS = 10 V
Thermal Limit Fault Gate Input Current
VGS = 5 V, VDS = 10 V
mA
IGTL
0.6
mA
2.0
VGS = 10 V, VDS = 10 V
ESD ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 4)
ESD
Electro−Static Discharge Capability
Human Body Model (HBM)
Machine Model (MM)
4. Not subject to production testing.
5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
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3
4000
400
V
NCV8401
TYPICAL PERFORMANCE CURVES
10,000
Emax (mJ)
IL(max) (A)
100
TJstart = 25°C
10
TJstart = 25°C
1,000
TJstart = 150°C
TJstart = 150°C
1
10
100
100
L (mH)
10
Figure 2. Single Pulse Maximum Switch−off
Current vs. Load Inductance
100
L (mH)
Figure 3. Single Pulse Maximum Switching
Energy vs. Load Inductance
100
10,000
Emax (mJ)
IL(max) (A)
TJstart = 25°C
10
TJstart = 25°C
1,000
TJstart = 150°C
TJstart = 150°C
1
100
Time in Clamp (ms)
Figure 4. Single Pulse Maximum Inductive
Switch−off Current vs. Time in Clamp
Figure 5. Single Pulse Maximum Inductive
Switching Energy vs. Time in Clamp
6V
40
7V
8V
30
9V
−40°C
25
10 V
35
25°C
30
20
5V
4V
25
20
15
0
1
2
3
4
150°C
5
VGS = 2.5 V
5
100°C
15
10
3V
10
0
1
Time in Clamp (ms)
45
ID (A)
100
10
ID (A)
1
0
5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VDS (V)
VGS (V)
Figure 6. On−state Output Characteristics
at 255C
Figure 7. Transfer Characteristics (VDS = 10 V)
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4
NCV8401
TYPICAL PERFORMANCE CURVES
45
80
ID = 3 A
70
150°C
RDS(on) (mW)
40
25°C
25
20
20
15
−40°C
3
4
5
6
7
8
9
10
10
100°C, VGS = 5 V
30
30
100°C, VGS = 10 V
25°C, VGS = 5 V
25°C, VGS = 10 V
−40°C, VGS = 5 V
1
−40°C, VGS = 10 V
3
5
7
9
VGS (V)
ID (A)
Figure 8. RDS(on) vs. Gate−Source Voltage
Figure 9. RDS(on) vs. Drain Current
2.00
45
1.75
40
1.50
35
ILIM (A)
RDS(on) (mW)
NORMALIZED RDS(on)
100°C
50
VGS = 5 V
1.25
−40°C
25°C
30
25
1.00
0.75
0
20
60
40
100°C
20
VGS = 10 V
0.50
−40 −20
80
100
120
15
140
150°C
5
6
7
8
9
T (°C)
VGS (V)
Figure 10. Normalized RDS(on) vs. Temperature
(ID = 5 A)
Figure 11. Current Limit vs. Gate−Source
Voltage (VDS = 10 V)
45
10
100
40
10
150°C
VGS = 10 V
35
1
IDSS (mA)
ILIM (A)
150°C, VGS = 10 V
35
60
10
150°C, VGS = 5 V
40
30
0.1
100°C
25
0.01
25°C
20
0.001
VGS = 5 V
15
−40 −20
0
20
40
60
80
100
120
0.0001
140
−40°C
10
15
20
25
30
35
TJ (°C)
VDS (V)
Figure 12. Current Limit vs. Junction
Temperature (VDS = 10 V)
Figure 13. Drain−to−Source Leakage Current
(VGS = 0 V)
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5
40
NCV8401
1.0
1.1
0.9
−40°C
1.0
0.8
25°C
VSD (V)
1.2
0.9
0.7
0.5
0
20
40
80
60
100
0.4
120 140
DRAIN−SOURCE VOLTAGE SLOPE (V/ms)
tf
50
tr
td(on)
4
5
6
7
8
9
10
5
6
7
9
8
10
2.0
−dVDS/dt(on)
1.5
1.0
dVDS/dt(off)
0.5
0
3
4
5
6
7
8
9
10
VGS (V)
Figure 16. Resistive Load Switching Time vs.
Gate−Source Voltage
(VDD = 25 V, ID = 5 A, RG = 0 W)
Figure 17. Resistive Load Switching
Drain−Source Voltage Slope vs. Gate−Source
Voltage (VDD = 25 V, ID = 5 A, RG = 0 W)
td(off), VGS = 10 V
100
td(off), VGS = 5 V
75
tf, VGS = 10 V
tf, VGS = 5 V
50
tr, VGS = 5 V
td(on), VGS = 5 V td(on), VGS = 10 V
0
4
VGS (V)
125
0
3
Figure 15. Source−Drain Diode Forward
Characteristics (VGS = 0 V)
100
25
2
Figure 14. Normalized Threshold Voltage vs.
Temperature (ID = 1.2 mA, VDS = VGS)
td(off)
3
1
IS (A)
150
0
150°C
T (°C)
200
TIME (ms)
100°C
0.6
0.6
−40 −20
TIME (ms)
0.7
0.8
500
1000
tr, VGS = 10 V
1500
2000
DRAIN−SOURCE VOLTAGE SLOPE (V/ms)
NORMALIZED VGS(th) (V)
TYPICAL PERFORMANCE CURVES
2.0
−dVDS/dt(on), VGS = 10 V
1.8
1.6
1.4
1.2
1.0
0.8
−dVDS/dt(on), VGS = 5 V
0.6
0.4
0.2
0
dVDS/dt(off), VGS = 5 V
0
500
dVDS/dt(off), VGS = 10 V
1000
1500
2000
RG (W)
RG (W)
Figure 18. Resistive Load Switching Time vs.
Gate Resistance (VDD = 25 V, ID = 5 A)
Figure 19. Drain−Source Voltage Slope during
Turn On and Turn Off vs. Gate Resistance
(VDD = 25 V, ID = 5 A)
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6
NCV8401
TYPICAL PERFORMANCE CURVES
250
225
RqJA (°C/W)
200
175
150
125
100
75
PCB Cu thickness, 1.0 oz
50
25
PCB Cu thickness, 2.0 oz
0
100
200
300
400
500
600
COPPER HEAT SPREADER AREA
700
800
(mm2)
Figure 20. RqJA vs. Copper Area
100
50% Duty Cycle
RqJA 788 mm2 C°/W
20%
10%
10
5%
2%
1
1%
0.1
0.01
0.001
1E−06
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
PULSE WIDTH (sec)
Figure 21. Transient Thermal Resistance
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7
1
10
100
1000
NCV8401
TEST CIRCUITS AND WAVEFORMS
RL
VIN
+
D
RG
VDD
G DUT
−
S
IDS
Figure 22. Resistive Load Switching Test Circuit
90%
VIN
10%
td(ON)
tr
td(OFF)
tf
90%
10%
IDS
Figure 23. Resistive Load Switching Waveforms
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8
NCV8401
TEST CIRCUITS AND WAVEFORMS
L
VDS
VIN
D
RG
+
VDD
G DUT
−
S
tp
IDS
Figure 24. Inductive Load Switching Test Circuit
5V
VIN
0V
Tav
Tp
V(BR)DSS
Ipk
VDD
VDS
VDS(on)
IDS
0
Figure 25. Inductive Load Switching Waveforms
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9
NCV8401
PACKAGE DIMENSIONS
DPAK
CASE 369C−01
ISSUE O
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
−T−
E
R
4
Z
A
S
1
2
DIM
A
B
C
D
E
F
G
H
J
K
L
R
S
U
V
Z
3
U
K
F
J
L
H
D
G
2 PL
0.13 (0.005)
M
T
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
4.58 BSC
0.87
1.01
0.46
0.58
2.60
2.89
2.29 BSC
4.57
5.45
0.63
1.01
0.51
−−−
0.89
1.27
3.93
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
SOLDERING FOOTPRINT*
6.20
0.244
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
0.180 0.215
0.025 0.040
0.020
−−−
0.035 0.050
0.155
−−−
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
HDPlus is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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Phone: 81−3−5773−3850
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10
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCV8401/D