ONSEMI NIF5002N

NIF5002N
Preferred Device
Self−Protected FET
with Temperature and
Current Limit
42 V, 2.0 A, Single N−Channel, SOT−223
HDPlus devices are an advanced series of power MOSFETs
which utilize ON Semiconductors latest MOSFET technology process
to achieve the lowest possible on−resistance per silicon area while
incorporating smart features. Integrated thermal and current limits
work together to provide short circuit protection. The devices feature
an integrated Drain−to−Gate Clamp that enables them to withstand
high energy in the avalanche mode. The Clamp also provides
additional safety margin against unexpected voltage transients.
Electrostatic Discharge (ESD) protection is provided by an integrated
Gate−to−Source Clamp.
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V(BR)DSS
(Clamped)
RDS(ON) TYP
ID MAX
42 V
165 m @ 10 V
2.0 A*
*Max current limit value is dependent on input
condition.
Drain
Features
•
•
•
•
•
•
•
Gate
Input
Current Limitation
Thermal Shutdown with Automatic Restart
Short Circuit Protection
IDSS Specified at Elevated Temperature
Avalanche Energy Specified
Slew Rate Control for Low Noise Switching
Overvoltage Clamped Protection
RG
Overvoltage
Protection
MPWR
ESD Protection
Temperature
Limit
Current
Limit
Current
Sense
Applications
• Lighting
• Solenoids
• Small Motors
Source
MARKING
DIAGRAM
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
VDSS
42
V
VDGR
42
V
Gate−to−Source Voltage
VGS
14
V
Continuous Drain Current
ID
Drain−to−Source Voltage Internally Clamped
Drain−to−Gate Voltage Internally Clamped
(RG = 1.0 M)
Power Dissipation
@ TA = 25°C (Note 1)
@ TA = 25°C (Note 2)
@ TT = 25°C (Note 3)
Internally Limited
PD
1.1
1.7
8.9
W
Operating Junction and Storage Temperature
TJ, Tstg
−55 to
150
°C
Single Pulse Drain−to−Source Avalanche Energy
(VDD = 32 V, VG = 5.0 V, IPK = 1.0 A,
L = 300 mH, RG(ext) = 25 )
EAS
150
mJ
THERMAL RESISTANCE RATINGS
Rating
Junction−to−Ambient − Steady State (Note 1)
Junction−to−Ambient − Steady State (Note 2)
Junction−to−Tab − Steady State (Note 3)
Symbol
Value
Unit
RJA
RJA
RJT
114
72
14
°C/W
1. Surface−mounted onto min pad FR4 PCB, (2 oz. Cu, 0.06″ thick).
2. Surface−mounted onto 2″ sq. FR4 board (1″ sq., 1 oz. Cu, 0.06″ thick).
3. Surface−mounted onto min pad FR4 PCB, (2 oz. Cu, 0.06″ thick).
 Semiconductor Components Industries, LLC, 2004
January, 2004 − Rev. 5
1
1
GATE
2
DRAIN
ONLYM
5002N
Rating
SOT−223
CASE 318E
Style 3
4
DRAIN
3
SOURCE
(Top View)
5002N
L
YM
= Specific Device Code
= Location Code
= Year, Month
ORDERING INFORMATION
Device
Package
Shipping†
NIF5002NT1
SOT−223
1000/Tape & Reel
NIF5002NT3
SOT−223
4000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
NIF5002N/D
NIF5002N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
TJ = 25°C
42
46
55
V
TJ = 150°C
40
45
55
TJ = 25°C
0.25
4.0
TJ = 150°C
1.1
20
50
100
A
1.8
2.2
V
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(Note 4)
Zero Gate Voltage Drain Current
Gate Input Current
V((BR)DSS
)
IDSS
VGS = 0 V
V, ID = 10 mA
VGS = 0 V
V, VDS = 32 V
IGSSF
VDS = 0 V, VGS = 5.0 V
VGS(th)
VGS = VDS, ID = 150 A
A
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Gate Threshold Temperature Coefficient
VGS(th)/TJ
Static Drain−to−Source On−Resistance
RDS(on)
( )
VGS = 10 V
V, ID = 1
1.7
7A
VGS = 5
5.0
0V
V, ID = 1
1.7
7A
VGS = 5
5.0
0V
V, ID = 0
0.5
5A
Source−Drain Forward On Voltage
1.3
4.0
6.0
−mV/°C
TJ = 25°C
165
200
m
TJ = 150°C
305
400
TJ = 25°C
195
230
TJ = 150°C
360
460
TJ = 25°C
190
230
TJ = 150°C
350
460
VSD
VGS = 0 V, IS = 7.0 A
1.0
V
Turn−on Time
td(on)
20
30
Turn−off Time
td(off)
VGS = 10 V, VDD = 12 V,
ID = 2.5
2 5 A,
A RL = 4
4.7
7 ,
(10% Vin to 90% ID)
65
100
Slew Rate On
dVDS/dton
RL = 4.7 , Vin = 0 to 10 V,
VDD = 12 V, 70% to 50%
1.2
Slew−Rate Off
dVDS/dtoff
RL = 4.7 , Vin = 0 to 10 V,
VDD = 12 V, 50% to 70%
0.5
SWITCHING CHARACTERISTICS
s
Vs
SELF PROTECTION CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 5)
Current Limit
ILIM
VDS = 10 V
V, VGS = 5
5.0
0V
VDS = 10 V
V, VGS = 10 V
TJ = 25°C
3.1
4.7
6.3
TJ = 150°C
2.0
3.2
4.3
TJ = 25°C
3.8
5.7
7.6
2.8
4.3
5.7
Temperature Limit (Turn−off)
TLIM(off)
VGS = 5.0 V
150
175
200
Temperature Limit (Circuit Reset)
TLIM(on)
VGS = 5.0 V
135
160
185
Temperature Limit (Turn−off)
TLIM(off)
VGS = 10 V
150
165
185
Temperature Limit (Circuit Reset)
TLIM(on)
VGS = 10 V
135
150
170
TJ = 150°C
A
°C
ESD ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Electro−Static Discharge Capability
ESD
Human Body Model (HBM)
4000
Machine Model (MM)
400
4. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%.
5. Fault conditions are viewed as beyond the normal operating range of the part.
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2
V
NIF5002N
TYPICAL PERFORMANCE CURVES
ID, DRAIN CURRENT (AMPS)
8V
4
6V
5V
4V
3.8 V
3
3.6 V
7V
5
3.4 V
2
3.2 V
3.0 V
2.8 V
2.6 V
1
0
2
1
3
2
100°C
1
4
3
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
2
3
1.5
3.5
2.5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
ID = 1.7 A
TJ = 25°C
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
3
5
4
6
7
8
9
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
10
4
0.3
TJ = 25°C
0.25
VGS = 5 V
0.2
0.15
VGS = 10 V
0.1
0.05
0
2
3
4
5
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
10000
2.5
ID = 1.7 A
VGS = 5 V
VGS = 0 V
2
1000
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
25°C
1
1.0
2
VDS ≥ 10 V
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
ID, DRAIN CURRENT (AMPS)
9V
6
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
4
TJ = 25°C
10 V
7
1.5
1
TJ = 150°C
100
TJ = 100°C
10
0.5
0
−50
−25
0
25
50
75
100
125
150
1
10
20
30
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
40
NIF5002N
TYPICAL PERFORMANCE CURVES
10
VGS = 0 V
TJ = 25°C
ID, DRAIN CURRENT (AMPS)
IS, SOURCE CURRENT (AMPS)
10
1
0.1
0.01
0.4
0.5
0.6
0.7
0.8
0.9
VGS = 20 V
SINGLE PULSE
TC = 25°C
1.0
10 ms
0.1
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.01
0.1
1
1 ms
1.0
10
100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Maximum Rated Forward Biased
Safe Operating Area
Figure 7. Diode Forward Voltage vs. Current
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1.0
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
1.0E−03
0.01
SINGLE PULSE
1.0E−02
1.0E−01
1.0E+00
t, TIME (s)
Figure 9. Thermal Response
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4
1.0E+01
1.0E+02
1.0E+03
NIF5002N
PACKAGE DIMENSIONS
SOT−223
CASE 318E−04
ISSUE K
A
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
S
B
1
2
3
D
L
G
J
C
0.08 (0003)
H
M
K
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5
INCHES
DIM MIN
MAX
A
0.249
0.263
B
0.130
0.145
C
0.060
0.068
D
0.024
0.035
F
0.115
0.126
G
0.087
0.094
H 0.0008 0.0040
J
0.009
0.014
K
0.060
0.078
L
0.033
0.041
M
0
10 S
0.264
0.287
STYLE 3:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
MILLIMETERS
MIN
MAX
6.30
6.70
3.30
3.70
1.50
1.75
0.60
0.89
2.90
3.20
2.20
2.40
0.020
0.100
0.24
0.35
1.50
2.00
0.85
1.05
0
10 6.70
7.30
NIF5002N
HDPlus is registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
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6
For additional information, please contact your
local Sales Representative.
NIF5002N/D