NDF08N60Z, NDP08N60Z N-Channel Power MOSFET 600 V, 0.95 W Features • • • • Low ON Resistance Low Gate Charge 100% Avalanche Tested These Devices are Pb−Free and are RoHS Compliant http://onsemi.com ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol NDF08N60Z NDP08N60Z Drain−to−Source Voltage VDSS Continuous Drain Current RqJC ID 7.5 (Note 1) 7.5 A Continuous Drain Current RqJC TA = 100°C ID 4.8 (Note 1) 4.8 A Pulsed Drain Current, VGS @ 10 V IDM 30 (Note 1) 30 A Power Dissipation PD 35 139 W Gate−to−Source Voltage VGS 30 V Single Pulse Avalanche Energy, ID = 7.5 A EAS 235 mJ ESD (HBM) (JESD 22−A114) Vesd 4000 V RMS Isolation Voltage (t = 0.3 sec., R.H. ≤ 30%, TA = 25°C) (Figure 14) VISO Peak Diode Recovery dv/dt 4.5 V/ns Continuous Source Current (Body Diode) IS 7.5 A Maximum Temperature for Soldering Leads TL 260 °C Operating Junction and Storage Temperature Range TJ, Tstg −55 to 150 600 VDSS RDS(ON) (MAX) @ 3.5 A 600 V 0.95 W Unit V 4500 N−Channel D (2) G (1) S (3) TO−220FP CASE 221D STYLE 1 MARKING DIAGRAM V °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Limited by maximum junction temperature 2. ID v 7.5 A, di/dt ≤ 200 A/ms, VDD ≤ BVDSS, TJ ≤ 150°C. NDF08N60ZG or NDP08N60ZG AYWW Gate Source TO−220 CASE 221A STYLE 5 Drain A Y WW G = Location Code = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2010 July, 2010 − Rev. 0 1 Publication Order Number: NDF08N60Z/D NDF08N60Z, NDP08N60Z THERMAL RESISTANCE Symbol NDF08N60Z NDP08N60Z Unit Junction−to−Case (Drain) Parameter RqJC 3.6 0.9 °C/W Junction−to−Ambient Steady State (Note 3) RqJA 50 50 3. Insertion mounted ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Test Conditions Symbol Min VGS = 0 V, ID = 1 mA BVDSS 600 Reference to 25°C, ID = 1 mA DBVDSS/ DTJ Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain−to−Source Leakage Current 25°C VDS = 600 V, VGS = 0 V Gate−to−Source Forward Leakage V 0.6 IDSS V/°C 1 125°C mA 50 VGS = ±20 V IGSS Static Drain−to−Source On−Resistance VGS = 10 V, ID = 3.5 A RDS(on) Gate Threshold Voltage VDS = VGS, ID = 100 mA VGS(th) VDS = 15 V, ID = 3.5 A gFS 6.3 S Ciss 1140 pF Coss 129 Reverse Transfer Capacitance Crss 30 Total Gate Charge Qg 39 Qgs 7.5 Qgd 21 Plateau Voltage VGP 6.2 V Gate Resistance Rg 1.6 W td(on) 14 ns tr 22 td(off) 36 tf 15 ±10 mA 0.95 W 4.5 V ON CHARACTERISTICS (Note 4) Forward Transconductance 0.82 3.0 DYNAMIC CHARACTERISTICS Input Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Output Capacitance Gate−to−Source Charge VDD = 300 V, ID = 7.5 A, VGS = 10 V Gate−to−Drain (“Miller”) Charge nC RESISTIVE SWITCHING CHARACTERISTICS Turn−On Delay Time Rise Time Turn−Off Delay Time VDD = 300 V, ID = 7.5 A, VGS = 10 V, RG = 5 W Fall Time SOURCE−DRAIN DIODE CHARACTERISTICS (TC = 25°C unless otherwise noted) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge IS = 7.5 A, VGS = 0 V VSD VGS = 0 V, VDD = 30 V IS = 7.5 A, di/dt = 100 A/ms trr 320 ns Qrr 2.2 mC 4. Pulse Width ≤ 380 ms, Duty Cycle ≤ 2%. http://onsemi.com 2 1.6 V NDF08N60Z, NDP08N60Z 20 20 18 18 16 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) TYPICAL CHARACTERISTICS VGS = 10 V 14 7.0 V 12 6.5 V 10 8 6 6.0 V 4 5.5 V 5.0 V 2 0 0 5 10 15 VDS = 25 V 16 14 12 10 8 6 4 TJ = −55°C 2 20 0 3 25 4 1.25 ID = 3.5 A TJ = 25°C 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 VGS, GATE−TO−SOURCE VOLTAGE (V) 1.25 2.25 ID = 3.5 A VGS = 10 V 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 −50 −25 0 25 50 75 100 125 8 9 10 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 0 1 2 3 4 5 6 7 8 9 10 125 150 ID, DRAIN CURRENT (A) Figure 4. On−Resistance versus Drain Current and Gate Voltage BVDSS, NORMALIZED BREAKDOWN VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 2.50 7 VGS = 10 V TJ = 25°C 1.20 Figure 3. On−Region versus Gate−to−Source Voltage 2.75 6 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 1. On−Region Characteristics 1.15 5 VGS, GATE−TO−SOURCE VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1.20 TJ = 25°C TJ = 150°C 150 TJ, JUNCTION TEMPERATURE (°C) 1.15 ID = 1 mA 1.10 1.05 1.00 0.95 0.90 −50 Figure 5. On−Resistance Variation with Temperature −25 0 25 50 75 100 TJ, JUNCTION TEMPERATURE (°C) Figure 6. BVDSS Variation with Temperature http://onsemi.com 3 NDF08N60Z, NDP08N60Z TYPICAL CHARACTERISTICS 2750 100 TJ = 25°C VGS = 0 V f = 1 MHz 10 C, CAPACITANCE (pF) IDSS, LEAKAGE (mA) 2500 TJ = 150°C 1 TJ = 125°C Ciss 2250 Coss 2000 1750 Crss 1500 1250 1000 750 500 250 50 100 150 200 250 300 350 400 450 500 550 600 0 0.01 0.1 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 7. Drain−to−Source Leakage Current versus Voltage Figure 8. Capacitance Variation 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 350 QT 300 VDS 250 VGS 200 QGD QGS 150 VDS = 300 V ID = 7.5 A TJ = 25°C 0 4 8 12 16 20 24 28 32 100 50 0 40 36 100 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.1 Qg, TOTAL GATE CHARGE (nC) Figure 9. Gate−to−Source Voltage and Drain−to−Source Voltage versus Total Charge 1000 t, TIME (ns) td(off) 100 tr tf td(on) 10 1 1 10 RG, GATE RESISTANCE (W) IS, SOURCE CURRENT (A) 10.0 VDD = 300 V ID = 7.5 A VGS = 10 V 100 TJ = 150°C 1.0 25°C 125°C −55°C 0.1 0.3 Figure 10. Resistive Switching Time Variation versus Gate Resistance 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 11. Diode Forward Voltage versus Current http://onsemi.com 4 1.2 NDF08N60Z, NDP08N60Z ID, DRAIN CURRENT (A) 100 10 VGS v 30 V SINGLE PULSE TC = 25°C 10 ms 1 ms 100 ms 10 ms dc 1 0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.01 0.1 1 10 100 1000 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 12. Maximum Rated Forward Biased Safe Operating Area NDF08N60Z 10 R(t) (C/W) DUTY CYCLE = 0.5 1 0.2 0.1 0.05 0.1 0.02 0.01 RqJC = 3.6°C/W Steady State SINGLE PULSE 0.01 1E−06 1E−05 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 PULSE TIME (s) Figure 13. Thermal Impedance (Junction−to−Case) for NDF08N60Z LEADS HEATSINK 0.110″ MIN Figure 14. Isolation Test Diagram Measurement made between leads and heatsink with all leads shorted together. *For additional mounting information, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ORDERING INFORMATION Order Number Package Shipping NDF08N60ZG TO−220FP (Pb−Free) 50 Units / Rail NDP08N60ZG TO−220AB (Pb−Free) 50 Units / Rail (In Development) http://onsemi.com 5 1E+03 NDF08N60Z, NDP08N60Z PACKAGE DIMENSIONS TO−220 FULLPAK CASE 221D−03 ISSUE K −T− −B− F SEATING PLANE C S Q U DIM A B C D F G H J K L N Q R S U A 1 2 3 H −Y− K G N L D J R 3 PL 0.25 (0.010) M B TO−220 CASE 221A−09 ISSUE AF −T− B F SEATING PLANE C T S 4 U 1 2 3 H K Z L R V MILLIMETERS MIN MAX 15.67 16.12 9.96 10.63 4.50 4.90 0.60 1.00 2.95 3.28 2.54 BSC 3.00 3.43 0.45 0.63 12.78 13.73 1.23 1.47 5.08 BSC 3.10 3.50 2.51 2.96 2.34 2.87 6.06 6.88 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z A Q INCHES MIN MAX 0.617 0.635 0.392 0.419 0.177 0.193 0.024 0.039 0.116 0.129 0.100 BSC 0.118 0.135 0.018 0.025 0.503 0.541 0.048 0.058 0.200 BSC 0.122 0.138 0.099 0.117 0.092 0.113 0.239 0.271 STYLE 1: PIN 1. GATE 2. DRAIN 3. SOURCE Y M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH 3. 221D-01 THRU 221D-02 OBSOLETE, NEW STANDARD 221D-03. J G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.161 0.095 0.105 0.110 0.155 0.014 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 STYLE 5: PIN 1. 2. 3. 4. MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 4.09 2.42 2.66 2.80 3.93 0.36 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 GATE DRAIN SOURCE DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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