MC100EPT22 Dual LVTTL/LVCMOS to Differential LVPECL Translator The MC100EPT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8–lead SOIC package and the single gate of the EPT22 makes it ideal for those applications where space, performance, and low power are at a premium. Because the mature MOSAIC 5 process is used, low cost and high speed can be added to the list of features. • • • • • • • • • • • 420ps Typical Propagation Delay Differential LVPECL Outputs Small Outline SOIC Package PNP LVTTL Inputs for Minimal Loading Flow Through Pinouts Q Output will default HIGH with inputs open ESD Protection: 4.0 KV HBM, 200 V MM Maximum Frequency > 1.1 GHz Moisture Sensitivity Level 1, Indefinite Time Out of Drypack. For Additional Information, See Application Note AND8003/D Flammability Rating: UL–94 code V–0 @ 1/8”, Oxygen Index 28 to 34 Transistor Count = 164 devices Q0 1 Q0 8 2 7 LVPECL VCC D0 LVTTL Q1 3 6 D1 Q1 4 5 GND http://onsemi.com 8 1 SO–8 D SUFFIX CASE 751 MARKING DIAGRAM 8 KPT22 ALYW A L Y W = Assembly Location = Wafer Lot = Year = Work Week 1 *For additional information, see Application Note AND8002/D PIN DESCRIPTION PIN FUNCTION Q0, Q1, Q0, Q1 Diff. LVPECL Outputs D0, D1 LVTTL Inputs VCC Positive Supply GND Ground ORDERING INFORMATION Device Figure 1. 8–Lead Pinout (Top View) and Logic Diagram Semiconductor Components Industries, LLC, 1999 September, 1999 – Rev. 2.0 1 Package Shipping MC100EPT22D SOIC 98 Units/Rail MC100EPT22DR2 SOIC 2500 Tape & Reel Publication Order Number: MC100EPT22/D MC100EPT22 MAXIMUM RATINGS* Value Unit VCC Symbol Power Supply Parameter 6.0 to 0 VDC VI Input Voltage (VI not more positive than VCC) 6.0 to 0 VDC Iout Output Current 50 100 mA TA Operating Temperature Range –40 to +85 °C Tstg Storage Temperature –65 to +150 °C θJA Thermal Resistance (Junction–to–Ambient) 190 130 °C/W θJC Thermal Resistance (Junction–to–Case) 41 to 44 ± 5% °C/W Tsol Solder Temperature (<2 to 3 Seconds: 245°C desired) 265 °C Continuous Surge Still Air 500lfpm * Maximum Ratings are those values beyond which damage to the device may occur. LVTTL INPUT DC CHARACTERISTICS (VCC = 3.3V ±0.3V; GND = 0V; TA = –40°C to +85°C) Symbol Characteristic Min Typ Max Unit IIH Input HIGH Current (Vin = 2.7V) 20 µA IIHH Input HIGH Current MAX (Vin = 6.0V) 100 µA IIL Input LOW Current (Vin = 0.5V) –0.6 mA VIK Input Clamp Voltage (Iin = –18mA) –1.0 V VIH Input HIGH Voltage VIL Input LOW Voltage 2.0 V 0.8 V LVPECL OUTPUT DC CHARACTERISTICS (VCC = 3.3V ± 0.3V, GND = 0V) (Note 3.) –40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 32 43 55 35 45 60 37 46 62 mA ICC Power Supply Current HIGH (Note 1.) VOH Output HIGH Voltage (Note 2.) 2100 2240 2400 2100 2280 2400 2100 2350 2400 mV VOL Output LOW Voltage (Note 2.) 1350 1490 1600 1350 1555 1600 1350 1550 1600 mV NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 1. VCC = 3.3V, GND = 0V, all other pins floating. 2. All loading with 50 ohms to VCC–2.0 volts. 3. Output parameters vary 1:1 with VCC. AC CHARACTERISTICS (VCC = 3.3V ± 0.3V; GND = 0V) –40°C Symbol Characteristic Min Typ fmax Maximum Toggle Frequency (Note 4.) 0.8 1.1 tPLH, tPHL Propagation Delay to Output Differential 250 400 tJITTER Cycle–to–Cycle Jitter 25°C Max 650 Min Typ 0.8 1.1 250 420 TBD 85°C Max 675 Min Typ 0.8 1.1 300 500 TBD tr & Output Rise/Fall Times 50 110 200 60 120 tf (20% – 80%) Q, Q 4. Fmax guaranteed for functionality only. VOL and VOH levels are guaranteed at DC only. http://onsemi.com 2 Max GHz 700 TBD 220 70 140 Unit ps ps 250 ps MC100EPT22 PACKAGE DIMENSIONS SO–8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751–06 ISSUE T D A 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. C 5 0.25 H E M B M 1 4 h B e X 45 _ q A C SEATING PLANE L 0.10 A1 B 0.25 M C B S A S DIM A A1 B C D E e H h L q http://onsemi.com 3 MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ MC100EPT22 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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