TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 • • • • • • • • • • • • • High-Resolution, Solid-State Image Sensor for NTSC Color TV Applications 8-mm Image-Area Diagonal, Compatible With 1/2” Vidicon Optics 755 (H) x 242 (V) Active Elements in Image-Sensing Area Advanced On-Chip Signal Processing Low Dark Current Electron-Hole Recombination Antiblooming Dynamic Range . . . More Than 70 dB High Sensitivity High Photoresponse Uniformity High Blue Response Single-Phase Clocking Separate Outputs for Each Color (RGB) Solid-State Reliability With No Image Burn-in, Residual Imaging, Image Distortion, Image Lag, or Microphonics DUAL-IN-LINE PACKAGE (TOP VIEW) 20 19 18 17 16 15 14 13 12 11 SUB 1 IAG 2 ABG 3 ADB 4 OUT3 (B) 5 OUT2 (G) 6 OUT1 (R) 7 AMP GND 8 CDB 9 SUB 10 SUB IAG ABG SAG SRG3 SRG2 SRG1 NC TRG IDB NC – No internal connection description The TC244A is a frame-transfer charge-coupled device (CCD) image sensor designed for use in single-chip color NTSC TV applications. The device is intended to replace the 1/2-inch vidicon tube in applications requiring small size, high reliability, and low cost. The image-sensing area of the TC244A is configured into 242 lines with 786 elements in each line. Twenty-nine elements are provided in each line for dark reference. The blooming-protection feature of the sensor is based on recombining excess charge with charge of opposite polarity in the substrate. This antiblooming is activated by supplying clocking pulses to the antiblooming gate, which is an integral part of each image-sensing element. The sensor is designed to operate in an interlace mode, electronically displacing the image-sensing elements by one-half of a vertical line during the charge integration period in alternate fields, effectively increasing the vertical resolution and minimizing aliasing. The single-chip color-sensing capability of the TC244A is achieved by processing on striped-color filter with RGB organization. The stripes are precisely aligned to the sensing elements, and the signal-charge columns are multiplexed during the readout into three separate registers with three separate outputs corresponding to each individual color. This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to SUB. Under no circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUTn to ADB during operation to prevent damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is allowed to flow. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments. Copyright 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 description (continued) A gated floating-diffusion detection structure with an automatic reset and voltage reference incorporated on-chip converts charge to signal voltage. The signal is further processed by a low-noise, state-of-the-art correlated-clamp sample-and-hold circuit. A low-noise, two-stage, source-follower amplifier buffers the output and provides high output-drive capability. The TC244A is built using TI-proprietary virtual-phase technology, which provides devices with high blue response, low dark current, high photoresponse uniformity, and single-phase clocking. The TC244A is characterized for operation from –10°C to 45°C. functional block diagram Top Drain IAG 2 19 ABG Image Area With Blooming Protection 3 18 IAG ABG Dark-Reference Elements ADB OUT3 (B) 4 17 SAG Storage Area Amplifiers 5 IDB OUT2 (G) OUT1 (R) 11 6 16 15 14 7 SRG3 SRG2 SRG1 Multiplexer, Transfer Gates, and Serial Registers 12 TRG Clearing Drain 11 Dummy Elements 8 AMP GND 9 CDB detailed description The TC244A consists of four basic functional blocks: (1) the image-sensing area, (2) the image-storage area, (3) the multiplexer block with serial registers and transfer gates, and (4) the low-noise signal-processing amplifier block with charge-detection nodes. The location of each block is identified in the functional block diagram. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 sensor topology diagram 244 755 + 1/2 + 1/2 Effective-Imaging Area 1 1 1/2 29 + 1/2 2 Lines ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ Reverse Transfer Reverse Transfer 11 252 10 11 252 10 251 + 1/2 + 1/2 9.5 11.5 Dummy Pixels OPB Terminal Functions TERMINAL I/O DESCRIPTION NAME ABG† NO. 3 I Antiblooming gate ABG† 18 I Antiblooming gate ADB 4 I Supply voltage for amplifier-drain bias AMP GND 8 CDB IAG† 9 I Supply voltage for clearing-drain bias 2 I Image-area gate IAG† 19 I Image-area gate IDB 11 I Supply voltage for input-diode bias OUT1 (R) 7 O Output signal 1 OUT2 (G) 6 O Output signal 2 OUT3 (B) 5 O Output signal 3 SAG 17 I Storage-area gate SRG1 14 I Serial-register gate 1 SRG2 15 I Serial-register gate 2 SRG3 SUB† 16 I Serial-register gate 3 1 Substrate and clock return SUB† SUB† 10 Substrate and clock return TRG 12 Amplifier ground 20 Substrate and clock return I Transfer gate † All pins of the same name should be connected together externally. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 image-sensing and storage areas Figure 1 and Figure 2 show cross sections with potential-well diagrams and top views of image-sensing and storage-area elements. As light enters the silicon in the image-sensing area, free electrons are generated and collected in the potential wells of the sensing elements. During this time, blooming protection is activated by applying a burst of pulses to the antiblooming-gate inputs every horizontal-blanking interval. This prevents blooming caused by the spilling of charge from overexposed elements into neighboring elements. After integration is complete, the signal charge is transferred into the storage area. Twenty-nine full columns and one half-column of elements at the right edge of the image-sensing area are shielded from incident light; these elements provide the dark reference used in subsequent video-processing circuits to restore the video-black level. There are also one full column and one half-column of light-shielded elements at the left edge of the image-sensing area and two lines of light-shielded elements between the image-sensing and image-storage areas. The latter prevent charge leakage from the image-sensing area into the image-storage area. multiplexer with transfer gates and serial registers The color sensitivity of the TC244A is obtained by laminating a color-stripe filter on top of the image-sensing area and aligning it precisely with vertical columns of sensing elements. This separates columns into three groups corresponding to the RGB colors used in the filter. The function of the multiplexer and transfer gates is to transfer the charge line by line from the columns into the corresponding serial registers and prepare it for readout. Figure 3 illustrates the layout of the multiplexing gate that vertically separates the pixels for input into the serial registers. Figure 4 shows the layout of the interface region between the serial-register gates and the transfer gates. The multiplexing is activated during the horizontal-blanking interval by applying appropriate pulses to the transfer gates and serial registers. The required pulse timing is shown in Figure 5. A drain has also been included in this area to provide the capability to quickly clear the image-sensing and storage areas of unwanted charge. Such charge can accumulate in the imager during the start-up of operation or under special circumstances when nonstandard TV operation is desired. correlated-clamp sample-and-hold amplifier with charge-detection nodes Figure 6 illustrates the correlated-clamp sample-and-hold amplifier circuit. Charge is converted into a video signal by transferring the charge onto a floating-diffusion structure in detection node1 that is connected to the gate of MOS transistor Q1. The proportional charge-induced signal is then processed by the circuit shown in Figure 6. This circuit consists of a low-pass filter formed by Q1 and C2, coupling-capacitor C1, dummy-detection node 2, which restores the dc bias on the gate of Q3, sampling transistor Q5, holding-capacitor C3, and output-buffer Q6. Transistors Q2, Q4, and Q7 are current sources for each corresponding stage of the amplifier. The parameters of this high-performance signal-processing amplifier have been optimized to minimize noise and maximize the video signal. The signal processing begins with a reset of detection node 1 and restoration of the dc bias on the gate of Q3 through the clamping function of dummy-detection node 2. After the clamping is completed, the new charge packet is transferred onto detection node 1. The resulting signal is sampled by the sampling-transistor Q5 and is stored on the holding-capacitor C3. This process is repeated periodically and is correlated to the charge transfer in the registers. The correlation is achieved automatically since the same clock lines used in registers φ-S2 and φ-S3 for charge transport serve for reset and sample. The multiple use of the clock lines significantly reduces the number of signals required to operate the sensor. The amplifier also contains an internal voltage-reference generator that provides the reference bias for the reset and clamp transistors. The detection nodes and the corresponding amplifiers are located some distance from the edge of the storage area; therefore, eleven dummy elements are incorporated at the end of each serial register to span the distance. The location of the dummy elements, which are considered to be part of the amplifiers, is shown in the functional block diagram. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 8.5 µm(H) Light Clocked Barrier φ-IAG 19.75 µm(V) Virtual Barrier φ-ABG Antiblooming Clocking Levels Antiblooming Gate Virtual Well Clocked Well Accumulated Charge Figure 1. Charge-Accumulation Process φ-PS Clocked Phase Virtual Phase Channel Stops Figure 2. Charge-Transfer Process Channel Stops Clocked Wells Virtual Well Serial-Register Gates Clocked Well Channel Stop Multiplexing Gate Transfer Gate Figure 3. Multiplexing-Gate Layout POST OFFICE BOX 655303 Figure 4. Interface-Region Layout • DALLAS, TEXAS 75265 5 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 Composite Blanking ABG IAG SAG TRG SRG 1 SRG2 SRG3 Expanded Horizontal Blanking Interval Figure 5. Timing Diagram 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 Reference Generator ADB Reset Gate and Output Diode Detection Node 1 CCD Register Clocked Virtual Gate Gate Detection Node 2 Q3 Q1 Q6 C1 Q2 SRG1 C2 SRG2 Q5 VO C3 Q4 Q7 SRG3 Figure 6. Correlated-Clamp Sample-and-Hold Amplifier-Circuit Diagram POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 spurious-nonuniformity specification The spurious-nonuniformity specification of the TC244A CCD grades – 10, – 20, – 30, and – 40 is based on several sensor characteristics: • • • • • • Amplitude of the nonuniform pixel Polarity of the nonuniform pixel – Black – White Location of the nonuniformity (see Figure 7) – Area A – Element columns near horizontal center of the area – Element rows near vertical center of the area – Area B – Up to the pixel or line border – Up to area A – Other – Edge of the imager – Up to area B Nonuniform pixel count Distance between nonuniform pixels Column amplitude The CCD sensors are characterized in both an illuminated condition and a dark condition. In the dark condition, the nonuniformity is specified in terms of absolute amplitude as shown in Figure 8. In the illuminated condition, the nonuniformity is specified as a percentage of the total illumination as shown in Figure 9. 18 Pixels 377 Pixels 233 Lines A 7 Lines B 11 Lines 20 Pixels Figure 7. Sensor-Area Map 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 mV Amplitude % of Total Illumination t t Figure 8. Pixel-Nonuniformity, Dark Condition Figure 9. Pixel-Nonuniformity, Illuminated Condition The grade specification for the TC244A is as follows (CCD video-output signal is 50 mV ±10 mV): Pixel-nonuniformity: DARK CONDITION PART NUMBER PIXEL AMPLITUDE, x AMPLITUDE ((mV)) ILLUMINATED CONDITION NONUNIFORM PIXEL TYPE WHITE BLACK W/B† DISTANCE SEPARATION % OF TOTAL ILLUMINATION AREA A AREA B TOTAL COUNT‡ AREA AREA AREA A B A B A B x > 3.5 0 0 0 0 0 0 x>5 0 0 TC244A-3 0 2.5 < x ≤ 3.5 2 5 2 5 2 5 5.0 < x ≤ 7.5 2 5 x > 3.5 0 0 0 0 0 0 x > 7.5 0 0 TC244A-4 0 3.5 < x ≤ 7 3 7 3 7 3 7 7.5 < x ≤ 15 3 7 x>7 0 0 0 0 0 0 x > 15 0 0 TC244A-2 0 X Y AREA — — — — 12 100 80 A 15 — — — † White and black nonuniform pixel pair ‡ The total spot count is the sum of all nonuniform white, black, and white/black pairs in the dark condition added to the number of nonuniform black pixels in the illuminated condition. The sum of all nonuniform combinations do not exceed the total count. Column nonuniformity: WHITE BLACK AREAS A AND B AREAS A AND B x > 0.3 0 0 TC244A-3 0 x > 0.5 0 0 TC244A-4 0 x > 0.7 0 0 PART NUMBER COLUMN AMPLITUDE, x AMPLITUDE (mV) TC244A-2 0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC: ADB, CDB, IDB (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 15 V Input voltage range, VI: ABG, IAG, SAG, SRG, TRG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 V to 15 V Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 10°C to 45°C Storage temperature range, TSTG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30°C to 85°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to the substrate terminal. recommended operating conditions Supply voltage, VCC ADB MIN NOM MAX 11 12 13 Substrate bias voltage 0 High level SRG1 SRG2 SRG1, SRG2, SRG3 Input voltage, voltage VI‡ 1.5 Intermediate level§ IAG Low level – 11 High level 1.5 Low level –11 High level 2 Low level SAG TRG 2.5 2.5 –9 4 6 – 2.3 –7.5 –7 – 6.5 High level 1.5 2 2.5 Low level – 11 High level 1.5 2 2.5 Low level – 11 V –9 –9 3.58 SRG1, SRG2, SRG3, TRG 4.77 ABG Load capacitance V –9 2 IAG, SAG Clock frequency, fclock V – 5.7 Intermediate level§ ABG 2 UNIT MHz 2 OUT1 (R), OUT2 (G), OUT3 (B) Operating free-air temperature, TA – 10 6 pF 45 °C ‡ The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for clock voltage levels. § Adjustment is required for optimal performance. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 electrical characteristics over recommended operating ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER Dynamic range (see Note 2) Antiblooming disabled (see Note 3) Charge-conversion factor Charge-transfer efficiency (see Note 4) Signal-response delay time, τ (see Note 5 and Figure 13) Gamma (see Note 6) Output resistance 1/f noise (5 kHz) Noise voltage MIN TYP† 60 70 UNIT dB 3.8 4 4.2 0.99990 0.99995 1 18 20 22 0.97 0.98 0.99 700 800 µV/e ns Ω 0.1 Random noise (f = 100 kHz) µV/√Hz 0.08 Noise-equivalent signal 30 Rejection ratio at 4.77 MHz MAX ADB (see Note 7) 20 SRG1, SRG2, SRG3 (see Note 8) 40 ABG (see Note 9) 20 Supply current electrons 5 IAG mA 6500 SRG1, SRG2, SRG3 Input capacitance, Ci dB 68 ABG 2400 TRG 180 pF SAG 6800 † All typical values are at TA = 25 °C NOTES: 2. Dynamic range is – 20 times the logarithm of the mean-noise signal divided by the saturation-output signal. 3. For this test, the antiblooming gate must be biased at the intermediate level. 4. Charge-transfer efficiency is one minus the charge loss per transfer in the output register. The test is performed in the dark using an electrical-input signal. 5. Signal-response delay time is the time between the falling edge of the SRG clock pulse and the output-signal valid state. 6. Gamma (γ) is the value of the exponent in the equation below for two points on the linear portion of the transfer-function curve (this value represents points near saturation): g Exposure (2) Output signal (2) Exposure (1) Output signal (1) ǒ Ǔ +ǒ Ǔ 7. ADB rejection ratio is – 20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at ADB. 8. SRGn rejection ratio is – 20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at SRGn. 9. ABG rejection ratio is – 20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at ABG. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 optical characteristics, TA = 40°C (unless otherwise noted) PARAMETER MIN Red Sensitivity TYP MAX 160 Green See Notes 10 and 11 90 Blue UNIT mV/lx % of red 60 Saturation signal, Vsat (see Note 12) Antiblooming disabled, interlace off 320 mV Maximum usable signal, Vuse Antiblooming enabled, interlace on 180 mV Blooming overload ratio (see Note 13) Blooming-overload Interlace on 100 Interlace off 200 80 x 103 Image-area well capacity Smear (see Note 14) See Note 15 Dark current Interlace off Dark signal (see Note 16) TA = 45°C Pixel uniformity Output signal = 50 mV ±10 mV Column uniformity Output signal = 50 mV ±10 mV Shading Output signal = 100 mV TA = 21°C TC244A-30 electrons 0.0004 nA/cm2 0.027 5.5 TC244A-40 6 TC244A-30 3.5 TC244A-40 5 TC244A-30 0.5 TC244A-40 0.7 mV mV mV 15% NOTES: 10. The following standard imaging condition is used in the test: light box SA702 (made by Canon) is used with a lens (FL = 92 mm) stopped to f14.3. The light power is 1.5 µW/cm2 (color temperature = 3000 K). No IR filter is used. 11. The following measurement method is used: the device blooming protection is disabled by lowering the ABG-clock-pulse amplitude to the minimum value. The red-output-signal level (Sr), the blue-output-signal level (Sb), and the green-output-signal level (Sg) are recorded. The relative sensitivity for the blue-output-signal (Rb) and the relative sensitivity for the green-output-signal (Rg) are determined as follows: Rb = Sb/Sr and Rg = Sg/Sr 12. Saturation is the condition in which further increase in exposure does not lead to further increase in output signal. 13. Blooming-overload ratio is the ratio of blooming exposure to saturation exposure. 14. Smear is a measure of the error induced by transferring charge through an illuminated pixel in shutterless operation. It is equivalent to the ratio of the single-pixel transfer time during a fast dump to the exposure time using an illuminated section that is 1/10 of the image-area vertical height with recommended clock frequencies. 15. Exposure time is 16.67 ms, the fast dump-clocking rate during vertical timing is 3.58 MHz, and the illuminated section is 1/10 of the height of the image section. 16. Dark-signal level is measured from the dummy pixels. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 PARAMETER MEASUREMENT INFORMATION Blooming Point With Antiblooming Enabled VO Blooming Point With Antiblooming Disabled Dependent On Well Capacity Vsat (min) Level Dependent Upon Antiblooming Gate High Level Vuse (max) Vuse (typ) DR Vn Lux (light input) DR (dynamic range) voltage + camera white-clip V n Vn = noise-floor voltage Vsat (min) = minimum saturation voltage Vuse (max) = maximum usable voltage Vuse (typ) = typical user voltage (camera white clip) NOTES: A. Vuse (typ) is defined as the voltage determined to equal the camera white clip. This voltage must be less than Vuse (max). B. A system trade-off is necessary to determine the system light sensitivity versus the signal/noise ratio. By lowering the Vuse (typ), the light sensitivity of the camera is increased; however, this sacrifices the signal/noise ratio of the camera. Figure 10. Typical Vsat, Vuse Relationship POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 PARAMETER MEASUREMENT INFORMATION VIH min 100% 90% Intermediate Level 10% VIL max 0% tr tf Slew rate between 10% and 90% = 70 to 120 V/µs, tr = 150 ns, tf = 90 ns. Figure 11. Typical Clock Waveform for IAG, ABG and SAG VIH min 100% 90% 10% VIL max 0% tr tf Slew rate between 10% and 90% = 300 V/µs, tr = tf = 15 ns. Figure 12. Typical Clock Waveform for SRG and TRG 1.5 V to 2.5 V SRG –9V – 9 V to – 11 V 0% OUT 90% 100% CCD Delay τ 10 ns 15 ns Sample and Hold Figure 13. SRG and OUT Waveforms 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 TYPICAL CHARACTERISTICS CCD SPECTRAL RESPONSIVITY 1 Responsivity – A/W 60 50 40 30 20 10 0.1 5 3 2 B 0.01 VADB = 12 V, TA = 25°C No IR Filter Light Power = 1.5 µW/cm2 Light Box: Canon SA702 G R 0.001 300 400 500 Quantum Efficiency – % 100 600 700 800 900 1000 1100 Incident Wavelength – nm Figure 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 APPLICATION INFORMATION DC VOLTAGES VSS V TMS3473B IALVL VSS 2 18 3 VCC ABIN MIDSEL 6 IAOUT SAIN ABLVL 15 19 14 18 13 17 ABOUT PD GND SAOUT VCC VABG+ VSS VABG– 16 12 1 SUB SUB IAG IAG ABG ABG SAG ADB SRG3 3 TL1593 4 VABG – 14 Parallel Driver 13 OUT2 (G) SEG1 OUT1 (R) NC GND TRG CDB SRG3IN VCC S/H2 CIN1 S/H3 AIN2 DIG VCC CIN2 OUT1 AIN3 OUT2 100 Ω 7 8 CIN3 OUT3 SRG2IN SRG3OUT SRG1IN SRG2OUT TRGIN SRG1OUT ANLG GND 16 14 13 TRGOUT VCC 12 VCC VCC VCC SEL1OUT 10 11 24 25 26 27 T 17 16 15 14 SB 18 13 12 HIGH 23 20 19 GPS 22 21 VD SEL1 Serial Driver GP VSS DGTL GND Sample-and-Hold 15 9 S1 ABS0 S2 SC(90) S3 SC PD 30 CBLK GT CSYNC ABIN CP1 PI CP2 8 7 5 4 3 32 2 BCP2 35 36 37 38 1 39 40 41 42 43 FI E/L VDS HCR VCR BCP1 GT2 GT1/SH3 SH1 X2 X1 34 GT3/SH2 MODE GND 20 pF 9 6 SN28835 NTSC Timer PS 31 33 10 BF 28 29 11 ABS1 44 Oscillator 14.3-MHz 15 pF Figure 15. Typical Application Circuit Diagram † Decoupling capacitors are not shown. ‡ TI recommends designing AC coupled systems. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 14 13 12 OUT3(B) 11 OUT2(G) 6 17 NC 16 AIN1 18 NC WHTA 8 5 S/H1 SEL0 PD 6 7 ‡ + 4.7 µF Image Sensor VGATE 5 100 Ω 16 ANLG VCC 19 HGATE 4 GND VSS VCC 3 SEL0OUT SUB CLK2M 2 20 3 4 + 10 IDB SN28846 + 4.7 µF 9 11 1 ‡ 7 8 2 100 Ω + 4.7 µF 6 12 VABG+ ‡ OUT3 (B) SRG2 1 4.7 µF 5 15 11 12 V 5V – 10 V 2V – 2.5 V –5 V 4V –6 V 2 VD2 10 TC244A 20 16 ABLVL 7 9 47 kΩ 17 4 8 22 kΩ ABSR IAIN 5 19 IASR I/N ADB VCC VSS V ABLVL IALVL VABG + VABG – 20 1 IALVL ADB VCC 10 OUT1(R) 9 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 APPLICATION INFORMATION SUPPORT CIRCUITS DEVICE PACKAGE APPLICATION FUNCTION SN28835FS 44 pin flatpack Timing generator NTSC timing generator (CCD, S/H, processing) SN28846DW 20 pin small outline Serial driver Driver for TRG, SRG1, SRG2, SRG3 TMS3473BDW 20 pin small outline Parallel driver Driver for IAG, SAG, ABG TL1593CNS 16 pin small outline (EIAJ) Sample and hold Three-channel sample-and-hold IC Figure 15. Typical Application Circuit Diagram (Continued) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 TC244A 786- × 488-PIXEL CCD IMAGE SENSOR SOCS056 – JUNE 1996 MECHANICAL DATA The package for the TC244A consists of a ceramic base, a glass window, a color filter, and a 20-lead frame. The glass window is sealed to the package by an epoxy adhesive. The package leads are configured in a dual in-line organization and fit into mounting holes with 1,78 mm (0.070 in) center-to-center spacings. TC244A (20 pin) Index Mark 7,60 (0.299) 7,20 (0.283) Rotation ± 90° 1,91 (0.075) 1,65 (0.065) 6,50 (0.256) 6,10 (0.240) 18,30 (0.720) MAX 15,64 (0.616) 15,44 (0.608) Optical Center Package Center 15,14 (0.596) 14,84(0.584) 13,87 (0.546) 13,67 (0.538) Focus Plane 1,78 (0.070) 0,76 (0.030) 0,51 (0.020) 0,41 (0.016) 5,50 (0.217) 3,90 (0.154) 3,38 (0.133) 2,72 (0.107) 4,01 (0.158) MAX 1,70 (0.067) 1,10 (0.043) 0,33 (0.013) 0,17 (0.007) 15,54 (0.612) 14,94 (0.588) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES 7/94 NOTES: A. The center of the package and the center of image area not coincident. B. The distance from the top of the glass to the image-sensor surface is typically 1 mm (0.04 in). The glass is 0.95 ± 0.08 mm thick and has an index of refraction of 1.53. C. Each pin centerline is located within 0.18 mm of its true longitudinal position. D. The color filter is 0.50 ± 0.08 mm thick and has an index of refraction of 1.487. E. Maximum rotation of the sensor within the package is 1.5°. 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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