TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 • • • • • • Very High-Resolution, 1/3-in Solid-State Image Sensor for NTSC Color Applications 340,000 Pixels per Field Frame Memory 658 (H) × 496 (V) Active Elements in Image-Sensing Area Compatible With Electronic Centering Multimode Readout Capability – Progressive Scan – Interlaced Scan – Dual-Line Readout Fast Single-Pulse Clear Capability • • • • • • • • Continuous Electronic Exposure Control From 1/60 – 1/50,000 s 7.4-µm Square Pixels Advanced Lateral-Overflow-Drain Antiblooming Low Dark Current High Dynamic Range High Sensitivity High Blue Response Solid-State Reliability With No Image Burn-In, Residual Imaging, Image Distortion, Image Lag, or Microphonics The TC236 is a frame-transfer, charge-coupled device (CCD) image sensor designed for use in single-chip color NTSC TV, computer, and special-purpose applications requiring low cost and small size. The image-sensing area of the TC236 is configured into 500 lines with 680 elements in each line. Twenty-two elements are provided in each line for dark reference. The blooming-protection feature of the sensor is based on an advanced lateral-overflow-drain concept. The sensor can be operated in a true-interlace mode as a 658(H) × 496(V) sensor with a very low dark current. One important feature of the TC236 very high-resolution sensor is the ability to capture a full 340,000 pixels per field. The image sensor also provides high-speed imagetransfer capability. This capability allows for a continuous electronic exposure control without the loss of sensitivity and resolution inherent in other technologies. The charge is converted to signal voltage at 20 µV per electron by a high-performance structure with a reset and a voltage-reference generator. The signal is further buffered by a low-noise, two-stage, source-follower amplifier to provide high output-drive capability. The TC236 is built using TI-proprietary advanced virtual-phase (AVP) technology, which provides devices with high blue response, low dark signal, good uniformity, and single-phase clocking. The TC236 is characterized for operation from – 10°C to 45°C. This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to VSS. Under no circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUT to VSS during operation to prevent damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is allowed to flow. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments. Copyright 1994, Texas Instruments Incorporated ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 ADVANCE INFORMATION description TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 functional block diagram SUB ODB IAG2 1 2 Image Area With Blooming Protection 12 Dark Reference Elements 11 3 Storage Area ADB ADVANCE INFORMATION OUT2 IAG1 4 10 9 Amplifiers 5 8 SAG SAG SUB SRG 4 Dummy Elements OUT1 6 7 Clearing Drain sensor topology diagram 22 Dark Reference Pixels 658 Active Pixels Two-Phase Image-Sensing Area 496 Lines 4 Dark Lines 500 Lines 4 22 658 Active Pixels Optical Black (OPB) Dummy Pixels 4 2 Single-Phase Storage Area 22 POST OFFICE BOX 655303 658 Active Pixels • DALLAS, TEXAS 75265 RST TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION ADB 4 I Supply voltage for amplifier-drain bias IAG1 12 I Image-area gate 1 IAG2 3 I Image-area gate 2 ODB 2 I Supply voltage for overflow-drain antiblooming bias OUT1 6 O Output signal 1 OUT2 5 O Output signal 2 RST 7 I Reset gate SAG 10, 11 I Storage-area gate SRG 8 I Serial-register gate SUB 1, 9 Substrate The TC236 consists of four basic functional blocks: the image-sensing area, the image-storage area, the serial register gates, and the low-noise signal processing amplifier block with charge-detection nodes and independent resets. The location of each of these blocks is identified in the functional block diagram. image-sensing and storage areas Figure 1 and Figure 2 show top views of the image-sensing and storage-area elements. As light enters the silicon in the image-sensing area, free electrons are generated in both wells and collected in the virtual wells of the sensing elements. The color sensitivity is obtained by manufacturing a mosaic color filter directly onto the photosites of the image-sensing area (see Figure 3 for a mapping of the filter topology). Blooming protection is provided by applying a dc bias to the overflow-drain bias pin. If it is necessary to clear the image before beginning a new integration time (for implementation of electronic fixed shutter or electronic auto-iris), it is possible to do so by applying a pulse at least 1 µs in duration to the overflow-drain bias. After integration is complete, the charge is transferred into the storage area; the transfer timing is dependent on whether the readout mode is interlace or progressive scan. If the progressive-scan readout mode is selected, the readout may be performed normally with one register or high speed by using both registers (see Figure 4 through Figure 6 for the interlace and progressive-scan readout modes). There are 22 columns at the left edge of the image-sensing area that are shielded from incident light; these elements provide the dark reference used in subsequent video-processing circuits to restore the video black level. There are also four dark lines between the image-sensing and the image-storage area that prevent charge leakage from the image-sensing area into the image-storage area. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 ADVANCE INFORMATION detailed description TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 7.4 µm Clocked Barrier 3.8 µm Clocked Well Virtual Barrier 3.6 µm Antiblooming Device Virtual Well Channel Stops Including Metal Bus Lines Clocked Gate 1.6 µm 1.6 µm Figure 1. Image-Area Pixel Structure ADVANCE INFORMATION 7.4 µm Clocked Barrier 3.5 µm Clocked Well Virtual Barrier 3.5 µm Virtual Well Channel Stops Including Metal Bus Lines Clocked Gate 1.6 µm 1.6 µm Figure 2. Storage-Area Pixel Structure 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 Pixel 1 2 3 4 5 6 657 658 R G R G R G R G Line 496 G B G B G B G B Line 495 R G R G R G R G Line 496 G B G B G B G B Line 493 22OB R G R G R G R G Line 4 G B G B G B G B Line 3 R G R G R G R G Line 2 G B G B G B G B Line 1 OB = Optical Black R = Red B = Blue G = Green ADVANCE INFORMATION 4 Dark Lines Storage Area 1 2 3 4 5 6 657 658 22 OB R G R G R G R G SRG2 22 OB G B G B G B G B SRG1 Figure 3. Color-Filter Topology Map POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 Clear Integrate Transfer to Memory Readout 1 µs Minimum ODB † IAG1, 2 250 Cycles † SAG ‡ † 684 Pulses SRG ADVANCE INFORMATION 684 Pulses RST Expanded Section of Parallel Transfer IAG1, 2 SAG SRG Figure 4. Interlace Timing † The number of parallel transfer pulses is field dependent. Field 1 has 500 pulses of IAG1, IAG2, SAG, and SRG with appropriate phasing. Field 2 has 501 pulses. ‡ The readout is from register 2. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 Clear Integrate Transfer to Memory Readout 1 µs Minimum ODB 500 Pulses IAG1, 2 500 Pulses 500 Cycles SAG 500 Pulses 684 Pulses† ADVANCE INFORMATION SRG 684 Pulses RST Expanded Section of Parallel Transfer IAG1, 2 SAG SRG † Readout is from register 2. Figure 5. Progressive-Scan Timing With Single Register Readout POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 Clear Integrate Transfer to Memory Readout 1 µs Minimum ODB 500 Pulses IAG1, 2 250 Cycles 500 Pulses SAG 684 Pulses 500 Pulses SRG ADVANCE INFORMATION 684 Pulses RST Expanded Section of Parallel Transfer IAG1, 2 SAG SRG Figure 6. Progressive-Scan Timing With Dual Register Readout serial registers The storage-area gate and serial gate(s) are used to transfer the charge line by line from the storage area into the serial register(s). Depending on the readout mode, one or both serial registers is used. If both are used, the registers are read out in parallel. readout and video processing After transfer into the serial register(s), the pixels are read out and placed onto a charge-detection node. The node must be reset to a reference level before the next pixel is placed onto the detection node. The timing for the serial-register readout, which includes the external pixel clamp and sample-and-hold signals needed to implement correlated double sampling, is shown in Figure 7. As the charge is transferred onto the detection node, the potential of this node changes in proportion to the amount of signal received. The change is sensed by an MOS transistor and, after proper buffering, the signal is supplied to the output terminal of the image sensor. The buffer amplifier converts charge into a video signal. Figure 8 shows the circuit diagram of the charge-detection node and output amplifier. The detection nodes and amplifiers are placed a short distance away from the edge of the storage area; therefore, each serial register contains four dummy elements that are used to span the distance between the serial registers and the amplifiers. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 SRG RST OUT S/H PCMP Figure 7. Serial-Readout and Video-Processing Timing ADB Q1 ADVANCE INFORMATION VREF QR Q2 Reset CCD Channel VOUT Figure 8. Output Amplifier and Charge-Detection Node POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, ADB (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SUB to SUB + 15 V Supply voltage range, ODB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SUB to SUB + 21 V Input voltage range for ABG, IAG1, IAG2, SAG, SRG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 15 V Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 10°C to 45°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30°C to 85°C Operating case temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 10°C to 55°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to substrate terminal. recommended operating conditions Supply voltage for amplifier drain bias, ADB ADVANCE INFORMATION Supply voltage for overflow overflow-drain drain antiblooming bias bias, ODB MIN NOM MAX 21 22 23 Standard 17 18 19 For clearing 27 28 29 Substrate bias voltage 10 IAG1 IAG2 IAG1, Input voltage voltage, VI High level Low level High level SAG 11.5 High level 11.5 11.5 Low level 12.5 12 12.5 MHz 25 – 10 • DALLAS, TEXAS 75265 V 12.5 OUT1, OUT2 POST OFFICE BOX 655303 12 25 SAG Operating free-air temperature, TA 10 V 0 SRG, RST Capacitive load V 12.5 0 IAG1, IAG2 Clock frequency, fclock V 0 Low level SRG 12 UNIT 6 pF 45 °C TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 electrical characteristics over recommended operating range of supply voltage, TA = –10°C to 45°C MIN TYP† MAX With CDS‡ 68 69 70 Without CDS‡ 57 58 59 PARAMETER Dynamic range (see Note 2) Charge conversion factor 0.9999 Signal-response delay time, τ (see Note 4) 0.99995 1 TBD ns 1 Output resistance Noise equivalent signal Noise-equivalent Rejection ratio 300 400 500 With CDS‡ 8.5 10 12 Without CDS‡ 30 36 42 ADB (see Note 6) TBD SRG (see Note 7) TBD ABG (see Note 8) TBD IAG1, IAG2 2000 Supply current 5 Input capacitance, capacitance Ci SRG 70 RST 10 Ω electrons dB 10 mA pF SAG 4000 † All typical values are at TA = 25°C. ‡ CDS = Correlated double sampling, a signal-processing technique that improves noise performance by subtraction of reset noise. NOTES: 2. Dynamic range is – 20 times the logarithm of the mean noise signal divided by saturation output signal. 3. Charge-transfer efficiency is one minus the charge loss per transfer in the output register. The test is performed in the dark using an electrical input signal. 4. Signal-response delay time is the time between the falling edge of the SRG pulse and the output-signal valid state. 5. Gamma (γ) is the value of the exponent is the equation below for two points on the linear portion of the transfer-function curve (this value represents points near saturation). ǒ Ǔ +ǒ Exposure (2) Exposure (1) g Ǔ Output signal (2) Output signal (1) 6. ADB rejection ratio is – 20 times the logarithm of the ac amplitude at the output divided b the ac amplitude at ADB. 7. SRG rejection ratio is – 20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at SRG. 8. ABG rejection ratio is – 20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at ABG. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 ADVANCE INFORMATION Gamma (see Note 5) dB µV/e 20 Charge-transfer efficiency (see Note 3) UNIT TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 optical characteristics, TA = 40°C, integration time = 16.67 ms (unless otherwise noted) PARAMETER Sensitivity (see Note 9) MIN No IR filter Antiblooming disabled Maximum usable signal, Vuse Antiblooming enabled MAX 256 With IR filter Saturation signal, Vsat (see Note 10) TYP mV/lux 32 600 300 Blooming overload ratio (see Note 11) 400 UNIT mV 500 mV 38K electrons dB nA/cm2 1000 Image-area well capacity 22K 30K Smear (see Note 12) See Note 13 – 78 Dark current TA = 21°C TA = 60°C 0.05 1 mV TA = 60°C TA = 60°C 0.5 mV 0.5 mV TA = 60°C TA = 60°C 10 mV Dark signal Dark-signal uniformity Dark-signal shading Spurious nonuniformity Dark Illuminated, F#8 ADVANCE INFORMATION Column uniformity Electronic-shutter capability 1/50,000 1/60 15 % 0.5 mV s NOTES: 9. Theoretical value 10. Saturation is the condition in which further increase in exposure does not lead to further increase in output signal. 11. Blooming is the condition in which charge is induced in an element by light incident on another element. Blooming overload ratio is the ratio of blooming exposure to saturation exposure. 12. Smear is a measure of the error introduced by transferring charge through an illuminated pixel in shutterless operation. It is equivalent to the ratio of the single-pixel transfer time to the exposure time using an illuminated section that is 1/10 of the image-area vertical height with recommended clock frequencies. 13. The exposure time is 16.67 ms, the fast-dump clocking rate during vertical transfer is 12.5 MHz, and the illuminated section is 1/10 the height of the image section. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 TYPICAL CHARACTERISTICS CM500 TRANSMISSION 5 0 0 300 400 500 600 700 800 900 1000 1100 300 400 500 Wavelength (nm) 600 700 800 900 1000 1100 Wavelength (nm) Figure 9. TC236 Sensor Spectral Response With a 1-mm CM500 IR Block Filter 20 15 10 5 0 300 400 500 600 700 800 900 1000 1100 Wavelength (nm) Figure 10. TC236 Sensor Spectral Response Without a 1-mm CM500 IR Block Filter POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 ADVANCE INFORMATION Responsivity – V/W/m 2 1 Responsivity – V/W/m 2 Responsivity – V/W/m 2 10 TC236 680- × 500-PIXEL CCD IMAGE SENSOR SOCS043A – JUNE 1994 – REVISED NOVEMBER 1994 VSUB VS 0.1 TMC57253 VCC 0.1 Oscillator 1 7 GND VCC GND CLK 14 8 VCC User-Defined Timer 12 1 CLKIN VCC 11 2 RST PCMP 10 3 IA1 CLAMP 9 4 IA2 S/H 8 5 SA CLEAR† 7 6 SR GND VCC 1 VAB 2 VCC 3 GND 4 EN 5 ABIN 6 ABMIN 7 IA1IN 8 IA2IN 9 SAIN 10 SRIN 11 SRMIN 12 GND VABM ABOUT VABL GND IA1OUT VI IA2OUT GND SAOUT VS SROUT VSM 24 23 15 V 22 21 TC236 20 19 18 17 16 15 14 13 VS 1 SUB 2 ODB 3 IAG2 4 ADB 5 OUT2 6 OUT1 IAG1 SAG SAG SUB SRG RST 12 11 10 9 8 7 ADVANCE INFORMATION 0.1 0.1 10 k + VODB + 15 + VADB 33 + 33 15 100 ADB 0.1 2N3904 0.1 OUT1 10 k 1k VODB 1k 2N3904 10 k 2N3904 15 22 pF CLR‡ + 10 k 2N3904 22 pF 100 DC VOLTAGES VS 0.1 2N3904 12 V VCC All values are in Ω and µF unless otherwise noted. 15 + VADB OUT2 5V VSUB 10 V VADB 22 V VODB 22 V 1k † CLEAR is active-low TTL. ‡ CLR is nominally 18 VDC with a 10-V pulse for image clear. Figure 11. Typical Application Circuit Diagram SUPPORT CIRCUIT 14 DEVICE PACKAGE APPLICATION TMC57253HSOP 44-pin flatpack Driver POST OFFICE BOX 655303 FUNCTION Driver for IAG1, 2, SAG, SRG, and RST • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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