2N6394 Series Preferred Device Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed primarily for half-wave ac control applications, such as motor controls, heating controls and power supplies. • Glass Passivated Junctions with Center Gate Geometry for Greater Parameter Uniformity and Stability • Small, Rugged, Thermowatt Construction for Low Thermal Resistance, High Heat Dissipation and Durability • Blocking Voltage to 800 Volts • Device Marking: Logo, Device Type, e.g., 2N6394, Date Code http://onsemi.com SCRs 12 AMPERES RMS 50 thru 800 VOLTS G *MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Peak Repetitive Off–State Voltage (Note 1.) (TJ = –40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) 2N6394 2N6395 2N6397 2N6399 VDRM, VRRM On-State RMS Current (180° Conduction Angles; TC = 90°C) IT(RMS) 12 A ITSM 100 A I2t 40 A2s PGM 20 Watts PG(AV) 0.5 Watts Forward Peak Gate Current (Pulse Width ≤ 1.0 µs, TC = 90°C) IGM 2.0 A Operating Junction Temperature Range TJ –40 to +125 °C –40 to +150 °C Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave, 60 Hz, TJ = 90°C) Circuit Fusing (t = 8.3 ms) Forward Peak Gate Power (Pulse Width ≤ 1.0 µs, TC = 90°C) Forward Average Gate Power (t = 8.3 ms, TC = 90°C) Storage Temperature Range Value A Unit Volts MARKING DIAGRAM 50 100 400 800 Tstg K 4 TO–220AB CASE 221A STYLE 3 YY WW 639x 1 2 x = 4, 5, 7 or 9 YY = Year WW = Work Week 3 PIN ASSIGNMENT 1 Cathode 2 Anode 3 Gate 4 Anode ORDERING INFORMATION *Indicates JEDEC Registered Data 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. Device Package Shipping 2N6394 TO220AB 500/Box 2N6395 TO220AB 500/Box 2N6397 TO220AB 500/Box 2N6399 TO220AB 500/Box Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 2001 April, 2001 – Rev. 3 1 Publication Order Number: 2N6394/D 2N6394 Series THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction to Case Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds Symbol Max Unit RθJC 2.0 °C/W TL 260 °C ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit – – – – 10 2.0 µA mA OFF CHARACTERISTICS *Peak Repetitive Forward or Reverse Blocking Current (VAK = Rated VDRM or VRRM, Gate Open) TJ = 25°C TJ = 125°C IDRM, IRRM ON CHARACTERISTICS *Peak Forward On–State Voltage (Note 2.) (ITM = 24 A Peak) VTM – 1.7 2.2 Volts *Gate Trigger Current (Continuous dc) (VD = 12 Vdc, RL = 100 Ohms) IGT – 5.0 30 mA *Gate Trigger Voltage (Continuous dc) (VD = 12 Vdc, RL = 100 Ohms) VGT – 0.7 1.5 Volts Gate Non–Trigger Voltage (VD = 12 Vdc, RL = 100 Ohms, TJ = 125°C) VGD 0.2 – – Volts *Holding Current (VD = 12 Vdc, Initiating Current = 200 mA, Gate Open) IH – 6.0 50 mA Turn-On Time (ITM = 12 A, IGT = 40 mAdc, VD = Rated VDRM) tgt – 1.0 2.0 µs Turn-Off Time (VD = Rated VDRM) (ITM = 12 A, IR = 12 A) (ITM = 12 A, IR = 12 A, TJ = 125°C) tq – – 15 35 – – – 50 – µs DYNAMIC CHARACTERISTICS Critical Rate–of–Rise of Off-State Voltage Exponential (VD = Rated VDRM, TJ = 125°C) dv/dt *Indicates JEDEC Registered Data 2. Pulse Test: Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%. http://onsemi.com 2 V/µs 2N6394 Series Voltage Current Characteristic of SCR + Current Symbol Parameter VDRM Peak Repetitive Off State Forward Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Off State Reverse Voltage IRRM Peak Reverse Blocking Current VTM Peak On State Voltage IH Holding Current Anode + VTM on state IH IRRM at VRRM Reverse Blocking Region (off state) Reverse Avalanche Region + Voltage IDRM at VDRM Forward Blocking Region (off state) 130 20 125 18 P(AV) , AVERAGE POWER (WATTS) TC, MAXIMUM ALLOWABLE CASE TEMPERATURE (° C) Anode – α 120 α = CONDUCTION ANGLE 115 110 105 dc 100 α = 30° 95 90 60° 90° 0 180° 7.0 6.0 1.0 2.0 3.0 4.0 5.0 IT(AV), AVERAGE ONSTATE FORWARD CURRENT (AMPS) 8.0 Figure 1. Current Derating 16 α α = CONDUCTION ANGLE 14 12 α = 30° 10 180° 90° dc 60° 8.0 6.0 TJ ≈ 125°C 4.0 2.0 0 0 1.0 2.0 3.0 7.0 4.0 5.0 6.0 IT(AV), AVERAGE ONSTATE CURRENT (AMPS) 8.0 Figure 2. Maximum On–State Power Dissipation http://onsemi.com 3 2N6394 Series 100 TJ = 25°C 70 125°C 50 30 10 7.0 5.0 3.0 2.0 100 I TSM , PEAK SURGE CURRENT (AMP) iTM , INSTANTANEOUS ON-STATE CURRENT (AMPS) 20 1.0 0.7 0.5 0.3 0.2 0.1 0.4 1.2 2.0 2.8 3.6 4.4 5.2 vTH, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) 6.0 1 CYCLE 95 90 85 80 75 70 TJ = 125°C f = 60 Hz 65 60 55 50 SURGE IS PRECEDED AND FOLLOWED BY RATED CURRENT 3.0 4.0 6.0 8.0 10 NUMBER OF CYCLES Figure 3. On–State Characteristics r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 2.0 1.0 Figure 4. Maximum Non–Repetitive Surge Current 1.0 0.7 0.5 0.3 0.2 ZθJC(t) = RθJC • r(t) 0.1 0.07 0.05 0.03 0.02 0.01 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 t, TIME (ms) 100 Figure 5. Thermal Response http://onsemi.com 4 200 300 500 1.0 k 2.0 k 3.0 k 5.0 k 10 k 2N6394 Series TYPICAL CHARACTERISTICS 3.0 OFFSTATE VOLTAGE = 12 V OFFSTATE VOLTAGE = 12 V 2.0 100 70 50 1.0 30 20 TJ = -40°C 0.7 25°C 10 7.0 5.0 3.0 I GT, GATE TRIGGER CURRENT (NORMALIZED) IGTM , PEAK GATE CURRENT (mA) 300 200 0.5 100°C 0.2 0.5 1.0 2.0 5.0 10 20 PULSE WIDTH (s) 50 100 200 0.3 -40 -20 1.1 140 160 30 OFFSTATE VOLTAGE = 12 V OFFSTATE VOLTAGE = 12 V 1.0 0.9 0.8 0.7 0.6 0.5 0.4 -60 -40 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) Figure 7. Typical Gate Trigger Current versus Temperature IH , HOLDING CURRENT (mA) VGT, GATE TRIGGER VOLTAGE (VOLTS) Figure 6. Typical Gate Trigger Current versus Pulse Width 0 -20 0 20 40 60 80 100 120 20 10 7.0 5.0 3.0 140 -60 -40 -20 0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 8. Typical Gate Trigger Voltage versus Temperature Figure 9. Typical Holding Current versus Temperature http://onsemi.com 5 120 140 2N6394 Series PACKAGE DIMENSIONS TO–220AB CASE 221A–07 ISSUE AA –T– B F T SEATING PLANE C S 4 Q A 1 2 3 U H K Z R L V J G D N NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.014 0.022 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 STYLE 3: PIN 1. 2. 3. 4. http://onsemi.com 6 CATHODE ANODE GATE ANODE MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.36 0.55 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 2N6394 Series Notes http://onsemi.com 7 2N6394 Series ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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