FREESCALE MPC17517DR2

Freescale Semiconductor, Inc.
MOTOROLA
Document order number: MPC17517
Rev 1.0, 03/2004
SEMICONDUCTOR TECHNICAL DATA
Advance Information
17517
1.0 A 6.8 V Dual Motor Driver IC
Freescale Semiconductor, Inc...
The 17517 is a monolithic triple totem-pole-output power IC designed to be
used in portable electronic applications to control small DC motors and
solenoids. The 17517 can operate efficiently with supply voltages as low as
2.0 V to as high as 6.8 V. Its low RDS(ON) totem-pole output MOSFETs (0.46 Ω
typical) can provide continuos drive currents of 1.0 A and handle peak currents
up to 3.0 A. It is easily interfaced to low-cost MCUs via parallel 3.0 V- or 5.0 Vcompatible logic. The device can be pulse width modulated (PWM-ed) at up to
200 kHz.
1.0 A 6.8 V DUAL MOTOR
DRIVER IC
The 17517 can drive two motors in two directions one at a time or drive one
motor in two directions and one solenoid with synchronous rectification of
freewheeling currents one at a time. Two-motor operation is accomplished by
hooking one motor between OUTA and OUTB and hooking the other motor
between OUTB and OUTC. Motor plus solenoid operation is accomplished by
hooking a motor between OUTA and OUTB and a solenoid between OUTC
and GND.
DTB SUFFIX
CASE 948F-01
16-LEAD TSSOP
This device contains an integrated charge pump and level shifter (for gate
drive voltages), integrated shoot-through current protection (cross-conduction
suppression logic and timing), and undervoltage detection and shutdown
circuitry.
ORDERING INFORMATION
The 17517 has four operating modes: Forward, Reverse, Brake, and
Tri-Stated (High Impedance).
Features
• 2.0 V to 6.8 V Continuous Operation
• Output Current 1.0 A (DC), 3.0 A (Peak)
• MOSFETs < 600 mΩ RDS(ON) @ 25°C Guaranteed
Device
Temperature
Range (TA)
Package
MPC17517DTB/R2
-20°C to 65°C
16 TSSOP
• 3.0 V/5.0 V TTL-/CMOS-Compatible Inputs
• PWM Frequencies up to 200 kHz
• Undervoltage Shutdown
Simplified Application Diagram
17517 Simplified Application Diagram
5.0 V
5.0 V
17517
VDD
C1L
C1H
C2L
C2H
CRES
VM
OUTC
OUTA
Solenoid
MCU
EN1
EN2
IN1
IN2
MOTOR
OUTB
GND
This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Motorola, Inc. 2004
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Charge Pump
C2L
C1H
C2H
C1L
LowVoltage
Shutdown
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CRES
VM
VDD
OUTC
IN1
Level
Shifter
Predriver
OUTB
IN2
Control
Logic
OUTA
EN1
EN2
GND
Figure 1. 17517 Simplified Internal Block Diagram
17517
2
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VDD
1
16
OUTC
VM
2
15
GND
OUTA
3
14
OUTB
CRES
4
13
VM
C2H
5
12
C1H
C2L
6
11
C1L
IN1
7
10
EN2
IN2
8
9
EN1
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TERMINAL FUNCTION DESCRIPTION
Terminal
Terminal
Name
Formal Name
1
VDD
Control Circuit Power Supply
2, 13
VM
Motor Drive Power Supply
3
OUTA
Output A
4
CRES
Charge Pump Output Capacitor
Connection
5
C2H
Charge Pump 2H
Charge pump bucket capacitor 2 (positive pole).
6
C2L
Charge Pump 2L
Charge pump bucket capacitor 2 (negative pole).
7
IN1
Input Control 1
Control signal input 1 terminal.
8
IN2
Input Control 2
Control signal input 2 terminal.
9
EN1
Enable Control Signal Input 1
Enable control signal input 1 terminal.
10
EN2
Enable Control Signal Input 2
Enable control signal input 2 terminal.
11
C1L
Charge Pump 1L
Charge pump bucket capacitor 1 (negative pole).
12
C1H
Charge Pump 1H
Charge pump bucket capacitor 1 (positive pole).
14
OUTB
Output B
15
GND
Ground
16
OUTC
Output C
Definition
Positive power source connection for control circuit.
Motor power supply voltage input terminals.
Driver output A terminal.
Charge pump reservoir capacitor terminal.
Driver output B terminal.
Ground connection.
Driver output C terminal.
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MAXIMUM RATINGS
All voltages are with respect to ground unless otherwise noted. Exceeding the ratings may cause a malfunction or permanent
damage to the device.
Rating
Symbol
Value
Unit
VM
-0.5 to 8.0
V
CRES
-0.5 to 14
V
Logic Supply Voltage
VDD
-0.5 to 7.0
V
Signal Input Voltage
VIN
-0.5 to VDD +0.5
V
IO
1.0
IOPK
3.0
Human Body Model (Note 2)
VESD1
±2000
Machine Model (Note 3)
VESD2
±100
TSTG
-65 to 150
°C
Operating Junction Temperature
TJ
-20 to 150
°C
Operating Ambient Temperature
TA
-20 to 65
°C
RθJA
190
°C/W
PD
657
mW
TSOLDER
245
°C
Motor Supply Voltage
V
Charge Pump Output Voltage
A
Driver Output Current
Continuous
Freescale Semiconductor, Inc...
Peak (Note 1)
V
ESD Voltage
Storage Temperature Range
Thermal Resistance (Note 4)
Power Dissipation (Note 5)
Soldering Temperature (Note 6)
Notes
1. TA = 25°C, 10 ms pulse width at 200 ms intervals.
2.
ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω).
3.
ESD2 testing is performed in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 Ω).
4.
5.
37 mm x 50 mm Cu area (1.6 mm FR-4 PCB).
Maximum at TA = 25°C.
6.
Soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause
malfunction or permanent damage to the device.
17517
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STATIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions TA = 25°C, VDD = VM = 5.0 V, GND = 0 V unless otherwise noted. Typical values noted reflect
the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
Motor Supply Voltage
VM
2.0
5.0
6.8
V
Logic Supply Voltage
VDD
2.7
5.0
5.7
V
C1, C2, C3
0.01
0.1
1.0
µF
–
–
1.0
µA
–
–
1.0
mA
VDD
–
–
3.0
CRES
–
–
0.7
1.5
2.0
2.5
–
0.46
0.60
12
13
13.5
POWER
Capacitor for Charge Pump
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Standby Power Supply Current
Motor Supply Standby Current
IV
Logic Supply Standby Current (Note 7)
I
MSTBY
VDDSTBY
mA
Operating Power Supply Current
I
Logic Supply Current (Note 8)
I
Charge Pump Circuit Supply Current
VDDDET
Low-Voltage Detection Circuit
V
Detection Voltage (VDD) (Note 9)
RDS(ON)
Driver Output ON Resistance (Note 10)
Ω
GATE DRIVE
VC
RES
Gate Drive Voltage (Note 11)
No Current Load
Gate Drive Ability (Internally Supplied)
V
V
V
CRESload
IC
10
11.2
–
VIN
0
–
VDD
V
VIH
VDD x0.7
–
–
V
VIL
–
–
VDD x0.3
V
IIH
–
–
1.0
µA
IIL
-1.0
–
–
µA
RES = -1.0 mA
CONTROL LOGIC
Logic Input Voltage
Logic Input Function (2.7 V < VDD < 5.7 V)
High-Level Input Voltage
Low-Level Input Voltage
High-Level Input Current
Low-Level Input Current
Notes
7.
8.
9.
I
I
VDDSTBY includes current to the predriver circuit.
VDD includes current to the predriver circuit.
Detection voltage is defined as when the output becomes high-impedance after VDD drops below the detection threshold. When the gate
V
V
voltage CRES is applied from an external source, CRES = 7.5 V.
10.
IO = 1.0 A source + sink.
11.
Input logic signal not present.
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DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions TA = 25°C, VDD = VM = 5.0 V, GND = 0 V unless otherwise noted. Typical values noted reflect
the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
Pulse Input Frequency
fIN
–
–
200
kHz
Input Pulse Rise Time (Note 12)
tR
–
–
1.0
(Note 13)
µs
Input Pulse Fall Time (Note 14)
tF
–
–
1.0
(Note 13)
µs
Turn-ON Time
tPLH
–
0.1
0.5
Turn-OFF Time
tPHL
–
0.1
0.5
tVGON
–
0.1
3.0
ms
–
–
10
ms
INPUT (IN1, IN2, EN1, EN2)
Freescale Semiconductor, Inc...
OUTPUT
µs
Propagation Delay Time
Charge Pump Wake-Up Time (Note 15)
tV
Low-Voltage Detection Time
Notes
12.
13.
14.
15.
17517
6
DDDET
Time is defined between 10% and 90%.
That is, the input waveform slope must be steeper than this.
Time is defined between 90% and 10%.
When C1 = C2 = C3 = 0.1 µF.
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Timing Diagrams
VDD
IN1, IN2,
EN1, EN2
50%
OUTA,
OUTB,
OUTC
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t VGON
tPHL
tPLH
V
11 V
90%
CRES
10%
Figure 4. Charge Pump Timing
Figure 2. tPLH, tPHL, and tPZH Timing
VDDDETon
VDD
0.8 V/
1.5 V
2.5 V/3.5 V
VDDDEToff
50%
tV
tV
DDDET
DDDET
90%
0%
(<1.0 µA)
IM
Figure 3. Low-Voltage Detection Timing
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Table 1. Truth Table
INPUT
IN1
OUTPUT
IN2
EN1
EN2
OUTA
OUTB
OUTC
X
L
L
Z
Z
Z
Shutdown Mode
X
Channel 1 (A–B) Driving Mode
H
H
H
L
L
L
Z
H
L
H
L
H
L
Z
L
H
H
L
L
H
Z
L
L
H
L
Z
Z
Z
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Channel 2 (B–C) Driving Mode
H
H
L
H
Z
L
L
H
L
L
H
Z
H
L
L
H
L
H
Z
L
H
L
L
L
H
Z
Z
Z
Half-Bridge (C) Driving Mode
H
H
H
H
Z
Z
Z
H
L
H
H
Z
Z
H
L
H
H
H
Z
Z
L
L
L
H
H
Z
Z
Z
H = High.
L = Low.
Z = High impedance.
X = Don’t care.
17517
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SYSTEM/APPLICATION INFORMATION
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INTRODUCTION
The 17517 is a triple totem-pole output H-Bridge power IC
designed to drive small dc motors used in portable electronics.
The 17517 can operate efficiently with supply voltages as low
as 2.0 V to as high as 6.8 V, and provide continuos motor drive
currents of 1.0 A while handling peak currents up to 3.0 A. It is
easily interfaced to low cost MCUs via parallel 3.0 V- or 5.0 Vcompatible logic. The device can be pulse width modulated
(PWM-ed) at up to 200 kHz. The 17517 can drive two motors in
two directions one at a time; or it can drive one motor in two
directions and one solenoid with synchronous rectification of
freewheeling currents one at a time. Two-motor operation is
accomplished by hooking one motor between OUTA and
OUTB, and the other motor between OUTB and OUTC.
Motor + solenoid operation is accomplished by hooking a motor
between OUTA and OUTB and placing a solenoid between
OUTC and GND. Table 1, Truth Table, page 8, describes the
operating states versus the input conditions.
As shown in Figure 1, 17517 Simplified Internal Block
Diagram, page 2, the 17517 is a monolithic triple totem-pole
output bridge with built-in charge pump circuitry. Each of the six
MOSFETs forming the triple totem-pole output has an RDS(ON)
of ≤ 0.6 Ω (guaranteed by design). The IC has an integrated
charge pump and level shifter (for gate drive voltages).
Additionally, the IC has a built-in shoot-through current
protection circuit and undervoltage lockout function. This IC has
four operating modes: Forward, Reverse, Brake, and Tri-Stated
(High Impedance).
FUNCTIONAL TERMINAL DESCRIPTION
OUTA, OUTB, and OUTC
These terminals provide the connection to the internal power
MOSFET triple-totem-pole H-bridge of the IC.
The VM terminals must be connected together on the printed
circuit board with as short as possible traces offering as low
impedance as possible between terminals.
IN1, IN1, EN1, and EN2
GND
These terminals are input control terminals used to control
the outputs. These terminals are 3.0 V/5.0 V CMOS-compatible
inputs with hysteresis. These terminals work together to control
OUTA, OUTB, and OUTC (refer to Table 1, Truth Table).
Power and signal ground terminal.
CRES
This terminal provides the connection for the external
reservoir capacitor (output of the charge pump). Alternatively,
this terminal can also be used as an input to supply gate-drive
voltage from an external source via a series current-limiting
resistor.
The voltage at the CRES terminal will be approximately three
times the VDD voltage, as the internal charge pump utilizes a
voltage tripler circuit. The VDDRES voltage is used by the IC to
supply gate drive for the internal power MOSFETs.
VM
The two VM terminals carry the main supply voltage and
current into the power sections of the IC. This supply then
becomes controlled and/or modulated by the IC as it delivers
the power to the load attached between OUTA and OUTB.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
C1L and C1H, C2L and C2H
These two pairs of terminals, the C1L and C1H and the C2L
and C2H, connect to the external bucket capacitors required by
the internal charge pump. The typical value for the bucket
capacitors is 0.1 µF.
VDD
This terminal carries the logic supply voltage and current into
the logic sections of the IC. VDD has an undervoltage threshold.
If the supply voltage drops below the undervoltage threshold,
the output power stage switches to a tri-state condition. When
the supply voltage returns to a level that is above the threshold,
the power stage automatically resumes normal operation
according to the established condition of the input terminals.
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APPLICATIONS
Typical Application
source, be sure to connect it via a resistor equal to, or greater
than, R = VC
/0.02 Ω.
Figure 5 shows a typical application for the 17517. When
applying the gate voltage to the CRES terminal from an external
RES
G
5.0 V
17517
V
CRES < 14 V
V
Freescale Semiconductor, Inc...
RG > CRES /0.02 Ω
RG
NC
NC
NC
NC
C1L
C1H
C2L
C2H
CRES
VDD
OUTA
OUTB
0.01 µF
EN1
EN2
IN1
IN1
MCU
VM
OUTC
GND
NC = No Connect
Figure 5. 17517 Typical Application Diagram
CEMF Snubbing Techniques
PCB Layout
Care must be taken to protect the IC from potentially
damaging CEMF spikes induced when commutating currents in
inductive loads. Typical practice is to provide snubbing of
voltage transients by placing a capacitor or zener at the supply
terminal (VM) (see Figure 6).
When designing the printed circuit board (pcb), connect
sufficient capacitance between power supply and ground
terminals to ensure proper filtering from transients. For all highcurrent paths, use wide copper traces and shortest possible
distances.
5.0 V
5.0 V
17517
VDD
VM
5.0 V
5.0 V
17517
VDD
VM
C1L
C1L
C1H
C1H
C2L
C2H
CRES
OUT
OUT
GND
C2L
C2H
OUT
CRES
OUT
GND
Figure 6. CEMF Snubbing Techniques
17517
10
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PACKAGE DIMENSIONS
DTB SUFFIX
16-LEAD TSSOP
PLASTIC PACKAGE
CASE 948F-01
ISSUE O
16X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
K
K1
Freescale Semiconductor, Inc...
2X
L/2
16
9
B
-U-
L
SECTION N-N
J
PIN 1
IDENT.
8
1
N
0.15 (0.006) T U
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH OR
GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER
SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE
ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED AT
DATUM PLANE -W-.
J1
0.25 (0.010)
A
-V-
M
N
F
DETAIL E
-W-
C
0.10 (0.004)
-T-
SEATING
PLANE
D
G
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H
DETAIL E
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DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
--1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0°
8°
INCHES
MIN
MAX
0.193
0.200
0.169
0.177
--0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.007
0.011
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0°
8°
17517
11
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MPC17517