12-BIT PARITY GENERATOR/CHECKER DESCRIPTION FEATURES ■ Provides odd-HIGH parity of 12 inputs ■ Extended 100E VEE range of –4.2V to –5.5V The SY10/100E160 are high-speed, 12-bit parity generator/checkers with differential outputs, for use in new, high-performance ECL systems. The output Q takes on a logic HIGH value only when an odd number of inputs are at a logic HIGH. A logic HIGH on the enable input (EN) forces the output Q to a logic LOW. An additional feature of the E160 is the output register. Two multiplexers and their associated signals control the register input by providing the option of holding present data, loading the new parity data or shifting external data in. To hold the present data, the Hold signal (HOLD) must be at a logic LOW level. If the HOLD signal is at a logic HIGH, the data present at the Q output is passed through the first multiplexer. Taking the Shift signal (SHIFT) to a logic HIGH will shift the data at the S-IN pin into the output register. If the SHIFT signal is at a logic LOW, the output of the first multiplexer is then passed through to the register. The register itself is clocked on the rising edge of CLK1 or CLK2 (or both). The presence of a logic HIGH on the reset pin (R) forces the register output Y to a logic LOW. ■ ■ ■ ■ ■ ■ Output register with Shift/Hold capability 900ps max. D to Q, /Q output Enable control Asynchronous Register Reset Differential outputs Fully compatible with industry standard 10KH, 100K ECL levels ■ Internal 75KΩ input pulldown resistors ■ Fully compatible with Motorola MC10E/100E160 ■ Available in 28-pin PLCC package BLOCK DIAGRAM D0 D1 D2 D3 PIN CONFIGURATION D4 D5 D6 D7 25 24 23 22 21 20 19 1 1 SEL Y SEL EN VCCO Y R HOLD S-IN SHIFT CLK1 CLK2 R D5 26 18 Q D6 D7 VEE D8 D9 27 17 28 16 Q VCC Y D10 4 PLCC TOP VIEW J28-1 1 2 15 14 3 13 12 6 D11 HOLD 5 7 8 9 10 11 CLK2 R EN D MUX CLK1 MUX S-IN SHIFT 0 0 D1 Q D2 D1 Q D4 D3 D8 D9 D10 D11 SY10E160 SY100E160 Rev.: D 1 Y VCCO NC Amendment: /0 Issue Date: February, 1998 SY10E160 SY100E160 Micrel PIN NAMES TRUTH TABLE Pin Function D0–D11 Data Inputs S-IN Serial Data Input EN Enable, active LOW HOLD Hold, active LOW SHIFT Shift, active HIGH CLK1, CLK2 Clock Inputs R Reset Input Q, Q Direct Output Y, Y Register Output VCCO VCC to Output Number of HIGH Inputs Output Q Even LOW Odd HIGH DC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0°C Symbol IIH IEE Parameter TA = +25°C Min. Typ. Max. Min. Typ. Input HIGH Current CLK1, CLK2 R All Other Inputs TA = +85°C Max. Min. Typ. Max. — — — — — — 200 300 150 — — — — — — 200 300 150 — — — — — — 200 300 150 — — 82 82 98 98 — — 82 82 98 98 — — 82 94 98 113 Power Supply Current 10E 100E 2 Unit Condition µA — mA — SY10E160 SY100E160 Micrel AC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0°C Symbol Parameter TA = +25°C Min. Typ. Max. Min. Typ. TA = +85°C Max. Min. Typ. Max. tPLH tPHL Propagation Delay to Output D to Q EN to Q CLK to Y R to Y 400 300 275 275 650 550 500 500 950 750 700 725 400 300 275 275 650 550 500 500 950 750 700 725 400 300 275 275 650 550 500 500 950 750 700 725 tS Set-up Time D HOLD S-IN SHIFT 1200 600 350 500 900 300 150 250 — — — — 1200 600 350 500 900 300 150 250 — — — — 1200 600 350 500 900 300 150 250 — — — — Hold Time D HOLD S-IN SHIFT –400 100 300 200 –900 –300 –150 –250 — — — — –400 100 300 200 –900 –300 –150 –250 — — — — –400 100 300 200 –900 –300 –150 –250 — — — — 300 450 650 300 450 650 300 450 650 tH tr tf Rise/Fall Time 20% to 80% PRODUCT ORDERING CODE Ordering Code Package Type Operating Range SY10E160JC J28-1 Commercial SY10E160JCTR J28-1 Commercial SY100E160JC J28-1 Commercial SY100E160JCTR J28-1 Commercial 3 Unit Condition ps — ps — ps — ps — SY10E160 SY100E160 Micrel 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 4