8-BIT SCANNABLE REGISTER FEATURES SY10E241 SY100E241 DESCRIPTION ■ 1000ps max. CLK to output ■ Extended 100E VEE range of –4.2V to –5.5V The SY10/100E241 are 8-bit shiftable registers designed for use in new, high-performance ECL systems. Unlike the E141, the E241 features internal data feedback organized such that the SHIFT control overrides the HOLD, /LOAD control. Thus, the normal operations of HOLD and LOAD can be toggled with a single control line without the need for external gating. This configuration also enables switching to scan mode with the single SHIFT control line. The eight inputs D0–D7 accept parallel input data, while S-IN accepts serial input data when in shift mode. Data is accepted a set-up time before the rising edge of CLK. Shifting is also accomplished on the rising clock edge. A HIGH on the Master Reset pin (MR) asychronously resets all the registers to zero. ■ ■ ■ ■ SHIFT overrides HOLD, /LOAD control Asynchronous Master Reset Pin-compatible with E141 Fully compatible with industry standard 10KH, 100K ECL levels ■ Internal 75KΩ input pulldown resistors ■ Fully compatible with Motorola MC10E/100E241 ■ Available in 28-pin PLCC package Q0 R D D1 – D6 Q Q1 – Q6 R 26 18 Q6 CLK MR VEE S-IN D0 D1 27 17 28 16 Q5 VCC NC VCCO Q4 Q3 TOP VIEW PLCC J28-1 1 2 12 6 D2 D3 D7 14 13 4 BITS 1-6 Q 15 3 5 D Q7 25 24 23 22 21 20 19 SEL1 Q7 7 8 9 10 11 Q0 Q1 Q2 D0 Q D4 VCCO D D5 VCCO SEL0 NC S-IN D7 D6 PIN CONFIGURATION BLOCK DIAGRAM R PIN NAMES SEL1 (HOLD/LOAD) SEL0 (SHIFT) CLK MR Pin Function D0–D7 Parallel Data Inputs S-IN Serial Data Input SEL0 SHIFT Control SEL1 HOLD, /LOAD Control CLK Clock MR Master Reset Q0–Q7 Data Outputs VCCO VCC to Output Rev.: C 1 Amendment: /1 Issue Date: February, 1998 SY10E241 SY100E241 Micrel TRUTH TABLE SEL0 SEL1 Function L L Load L H Hold H X Shift (Dn to Dn+1) DC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0°C Symbol Parameter TA = +25°C Min. Typ. Max. Min. Typ. IIH Input HIGH Current IEE Power Supply Current — 10E 100E — — — 125 125 150 — 150 150 — — — 125 125 TA = +85°C Max. Min. 150 — 150 150 — — Typ. Max. — 150 125 144 Unit Condition µA — mA — 150 173 AC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0°C Symbol Parameter TA = +25°C Min. Typ. Max. Min. Typ. TA = +85°C Max. Min. Typ. Max. Unit Condition MHz — ps — ps — ps — fSHIFT Max. Shift Frequency 700 900 — 700 900 — 700 900 — tPLH tPHL Propagation Delay to Output CLK MR 625 600 750 725 975 975 625 600 750 725 975 975 625 600 750 725 975 975 tS Set-up Time D SEL0 (SHIFT)350 SEL1 (HOLD/LOAD) S-IN 175 200 400 125 25 — 250 –100 — 350 — — 175 200 400 125 25 — 250 –100 — 350 — — 175 200 400 125 25 — 250 –100 — — — Hold Time D SEL0 (SHIFT) SEL1 (HOLD/LOAD) S-IN 200 100 50 300 –25 –200 –250 100 — — — — 200 100 50 300 –25 –200 –250 100 — — — — 200 100 50 300 –25 –200 –250 100 — — — — tRR Reset Recovery Time 900 600 — 900 600 — 900 600 — ps — tPW Minimum Pulse Width CLK, MR 400 — — 400 — — 400 — — ps — tskew Within-Device Skew — 60 — — 60 — — 60 — ps 1 tr tf Rise/Fall Time 20% to 80% 300 525 800 300 525 800 300 525 800 ps — tH NOTE: 1. Within-device skew is defined as identical transitions on similar paths through a device. PRODUCT ORDERING CODE Ordering Code 2 Package Type Operating Range SY10E241JC J28-1 Commercial SY10E241JCTR J28-1 Commercial SY100E241JC J28-1 Commercial SY100E241JCTR J28-1 Commercial SY10E241 SY100E241 Micrel 28 LEAD PLCC (J28-1) Rev. 03 3 SY10E241 SY100E241 Micrel MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 4