MITSUBISHI MITSUBISHI 〈DIGITAL 〈DIGITAL ASSP〉 ASSP〉 M66332FP M66332FP FACSIMILE IMAGE DATA PROCESSOR FACSIMILE IMAGE DATA PROCESSOR 0 Analog signal processing circuit control signal generation CLAMP, S/H, AGC, DSCH 0 Built-in 5-bit Flash Type A-D Converter 0 Bi-level data external input/output interface Serial output (→M66330) 8-bit MPU bus output with external DMA control signal 0 Image data processing γ correction Uniformity correction (block correction in units of 8 pixels) MTF compensation (1 dimension) Detector of background and object level (programmable) Dithering control • Dither method (16 levels using 4 × 4 matrix) Separation of image data area (1 dimension) Scale down A3 → B4, A3 → A4, B4 → A4 0 5V Single Power Supply DESCRIPTION The M66332 is a facsimile image processing controller that converts analog signals that are photoelectrically converted by an image sensor into bi-level signals. It has image processing functions such as peak detection, uniformity correction, γ correction, MTF compensation, detector of background and object levels, dither control, separation of image data area, scale down, and area specification. This controller has a built-in 5-bit flash type A-D converter and interface circuits to image sensor, analog signal processing circuit, and CODEC (Coder & Decoder) to simplify control of the readout mechanism. FEATURES 0 High Speed Scan (MAX. 2 ms/line, TYP. 5 ms/line) 0 A3 (8 pixels/mm) Line Sensor Attachment 0 Image sensor (CCD,CIS) control signal generation CCD: SH, CK1, CK2, RS Contact sensor (CIS): SH, CK1 (or CK2) APPLICATION Facsimiles 29 30 31 32 33 34 35 36 37 38 39 40 41 42 45 46 47 48 49 50 51 52 53 54 55 56 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 M66332FP TEST ASIG NC VWL VML3 VML2 GND VML1 VBL AGND AVCC DSCH Test pin Analog Signal Processing Interface White Basic Supply Voltage Middle Basic Supply Voltage 3 Middle Basic Supply Voltage 2 Middle Basic Supply Voltage 1 Black Basic Supply Voltage Analog Signal Processing Interface CK2 Sensor Interface CK1 RS Analog Signal CLAMP Prosessing S/H Interface GND Test pin TEST System clock SYSCK Test pin TEST VCC SVID CODEC SCLK Interface STIM SRDY Sensor Interface PTIM Analog Signal AGC Processing Interface GND VCC CS RD MPU Interface WR RESET GND GND DRQ DMA Interface DAK VCC SH Sensor Interface 43 44 D7 D6 D5 D4 MPU Interface D3 (DATA) D2 D1 D0 GND VCC A3 A2 MPU Interface A1 (ADDRESS) A0 DGND DVCC PIN CONFIGURATION (TOP VIEW) NC: No Connection Outline 56P6N-A 1 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR BLOCK DIAGRAM System Clock ADC Analog Vcc AVCC 18 SYSCK 8 15 56 2 1 3 CLAMP S/H AGC DSCH 4 5 16 17 Analog Signal Interface VCC 10 35 46 55 Image Processing Sequence Control Signal Sensor Control To each block Detection of Image Data Area Analog Control Correction memory (304 words × 5bits) Uniformity Correction MTF compensation PTIM SH Sensor CK1 Interface CK2 RS ADC Logic Vcc DVCC 29 Convert to bi-level Separation of Image Data Area Simple Bi-level Conversion/Background and object Level Detection SRAM 16 words × 4bits Cur out/ Scale down DMA Control Collective Dithering (16 levels) MPU Bus Interface 14 13 12 11 SRDY STIM CODEC SCLK Interface SVID 54 DAK DMA 53 DRQ Interface 50 47 48 49 31 ~ RESET CS MPU Interface RD WR A0 MPU Interface 34 A3 (Address) 37 D0 MPU 44 D7 Interface (Data) 5bit A-D converter (flash type) ASIG 27 ~ 20 21 23 24 25 VBL VML2 VWL VML1 VML3 ADC Reference Voltage 19 AGND ADC Analog GND 30 6 22 36 45 51 52 DGND GND ADC Logic GND Table 1 Image Processing Functions Image Processing Function Read Width Resolution Specifications • A4, B4, A3 • 8 pixels/mm (primary scanning direction) Read speed • 5ms/line Typ. 2ms/line maximum Uniformity Correction MTF Compensation Simple Bi-level Conversion • White correction only • Block correction in units of 8 pixels • 50% Correction range • Laplacian filter circuit for 3 × 1 pixels in current line (1 dimension) • Floating threshold method using background and object level detection circuit Pseudo half-tone • Dither method: 16 levels (4 × 4matrix) Separation of Image Data Area • Detection by brightness difference in 5 × 1 pixels area in current line • Selection method • Scale down: A3 → B4 set to 13/15; B4 → A4, 9/11; A3 → A4, 12/17 Scale down γ Correction Image Sensor Control Signal Analog Signal Processing 2 • Logarithmic correction • Control signal generation for contact sensor (CIS) and scale down CCD • Generate control signals for external CLAMP circuit, sample/hold circuit, and AGC circuit Remarks • Operated with system clock and PRE_DATA (registers 2, 3) • Built-in SRAM as correction memory (304 words × 5bits) (read/write allowed from MPU) • No need for compensation memory • Built-in SRAM as dither memory (16 words × 4bits) (read/write allowed from MPU) • No need for processing memory • Apply external voltage (resistor connection is also allowed) to A-D converter middle basic supply voltage pins. • Built-in 5-bit flash A-D converter MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR PIN DESCRIPTIONS Block Sensor Interface Pin Names SH I/O O CK1 O DMA Interface CK2 RS PTIM CLAMP S/H ASIG AGC DSCH SRDY STIM SCLK SVID DRQ O O O O O I O O I O O O O Clock MPU Interface DAK SYSCK RESET I I I CS I Analog Circuit Interface CODEC Interface RD WR A0~A3 D0~D7 I I I I/O Description CCD: Shift pulse signal to transmit photo charges from the sensor to the transfer unit. CIS: Start signal for the sensor read circuit. CCD: Clock pulse signal for sequentially transmitting the transfer unit signal charge of the sensor. CIS: Clock pulse signal for the sensor read circuit shift register. Reverse of CK1. Pulse to reset the voltage of the CCD sensor floating capacitor to initial status. Read roller pulse motor control signal. CLAMP pulse to set the dark level of the sensor to reference voltage of the digital circuit. Sample-hold signal to smooth out sensor image signal waveform. Analog signals. External AGC circuit gain down signal. External AGC circuit gain up signal. Data transmission ready signal from CODEC. Data transmission bound signal for CODEC. Clock signal for transmitting image data to CODEC. Serial output of image data to CODEC. “H”: Black; “L”: White. DMA request signal to external DMA controller for parallel output of image data through MPU bus. DMA acknowledge signal from external DMA controller for the above DRQ signal. System clock input pin. System reset signal. Resets counter, register, F/F, and latch, sets internal memory in standby mode, and halts clock generation circuit. Chip select signal used by MPU to access M66332. Set to “H” in operating mode (AGC, UNIF, SCAN). Control signal used by MPU to read data from M66332. Control signal used by MPU to write data to M66332. Address signals used to access M66332 internal registers. 8-bit bidirectional buffer. 3 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR PIN DESCRIPTIONS (CONTINUED) Block Others Pin Names VCC AVCC DVCC GND AGND DGND VWL VBL VML1 VML2 VML3 TEST(IN) TEST(OUT) I/O –– –– –– –– –– –– –– –– –– –– –– –– –– Description Plus supply voltage. Plus supply voltage for A-D converter analog units. Plus supply voltage for A-D converter logic units. GND pin. Ground for A-D converter analog units. Ground for A-D converter digital units. A-D converter white basic supply voltage pin. A-D converter black basic supply voltage pin. Middle basic supply voltage pin. VML1 =(VWL – VBL) /4 Middle basic supply voltage pin. VML2 =2 · (VWL – VBL) /4 Middle basic supply voltage pin. VML3 =3 · (VWL – VBL) /4 Test input pin. Fix to “L”. Test output pin. Keep open. FUNCTIONAL DESCRIPTION The following items which are necessary to use the image processing functions of the M66332 are described. (1) Operating mode (2) Line period and read sequence (3) Image processing function (4) Sensor unit/analog signal processing unit interface (5) CODEC interface (6) Read/write to dither memory and uniformity correction memory (7) Reset (8) Image quality control using registers 4 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR (1) Operating mode The M66332 performs three basic operations. • Peak value detection: The peak value of the analog signal output from the analog signal processing circuits is matched to the white reference voltage (V WL ) of the M66332 internal A-D converter. (See also Figs. 19 to 22 in the M66333FP document.) • Uniformity correction data creation: White reference data is created for sensor unit uniformity correction and written to the correction memory (SRAM: 304 words × 5bits). • Read operation: A document is read and the image is processed to output bi-level data as serial or parallel output. These three basic operations are performed in the following sequence depending on whether the sensor is CCD or CIS. The sensor is selected with register 0 (SENS). When the sensor is CCD: UNIF mode v SCAN mode Operation is started by setting the UNIF command in register 0 to “H”. If the sensor is CCD, peak detection (16 line periods) and white uniformity correction data creation (8 line periods) are performed consecutively. To exit this operating mode, wait 30 line periods (at least 24 lines) from the start and set the UNIF command to “L”. The read operation is started by setting the SCAN command in register 0 to “H”. Set the SCAN command to “L” to exit this operation mode. When the sensor is CIS: (Creation and transmission of uniformity correction data) UNIF mode v Data transfer This mode is started when the UNIF command in register 0 is set to “H”. When the sensor is CIS, if white correction is started with the UNIF command, peak detection (16 line periods) and uniformity white correction data creation (8 line period) are started. To exit this operating mode, wait 30 line periods (at least 24 line periods) from the start and set the UNIF command to “L”. The uniformity correction data pertaining to white correction created in UNIF mode are transferred to the backup memory. (Read operation) AGC mode v SCAN mode Peak detection is performed for 16 line periods when the AGC command in register 0 is set to “H”. To exit this operating mode, wait 20 line periods (at least 16 lines) from the start and set the AGC command to “L”. The read operation is started by setting the SCAN command in register 0 to “H”. Set the SCAN command to “L” to exit this operating mode. The signal functions and data flow in each mode are shown on pages 4–123 and 4–124. Flowcharts are shown on pages 4-158 to 4–160. 5 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Operation During Peak Detection Image sensor SYSCK Image Processing Sequence Control Signal PTIM SH CK1 CK2 RS STIM SCLK SVID Sensor Control Detection of Image Data Area To each block Separation of Image Data Area Convert to bi-level Cut out/ Scale down SRDY Correction memory (304 words × 5bits) Uniformity Correction Resolution compensation Analog signal processing circuit Analog Control CLAMP S/H AGC DSCH CODEC DAK Simple Bi-level Conversion/Background and object level detection DMA DMA Control DRQ SRAM 16 words × 4bits Collective Dithering (16 levels) MPU Bus Interface RESET CS,RD WR A0~A3 MPU ASIG 5bit A-D converter (flash type) D0~D7 VBL VML2 VWL VML1 VML3 Data Flow in Creation of Uniformity Correction Data Image sensor SYSCK Image Processing Sequence Control Signal PTIM SH CK1 CK2 RS STIM SCLK SVID Sensor Control Detection of Image Data Area To each block Separation of Image Data Area Convert to bi-level Cut out/ Scale down SRDY Correction memory (304 words × 5bits) Uniformity Correction Simple Bi-level Conversion/Background and object level detection DAK DMA DMA Control DRQ SRAM 16 words × 4bits Collective Dithering (16 levels) MPU Bus Interface RESET CS,RD WR A0~A3 MPU ASIG 5bit A-D converter (flash type) VBL VML2 VWL VML1 VML3 6 MTF Compensation Analog signal processing circuit Analog Control CLAMP S/H AGC DSCH CODEC D0~D7 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Date Flow During Read Operation (for serial output) Image sensor SYSCK Image Processing Sequence Control Signal PTIM SH CK1 CK2 RS Sensor Control To each block Detection of Image Data Area Separation of Image Data Area Convert to bi-level Cut out/ Scale down Uniformity Correction MTF Compensation Analog signal processing circuit Correction memory (304 words × 5bits) ASIG CODEC SRDY Analog Control CLAMP S/H AGC DSCH STIM SCLK SVID DAK Simple Bi-level Conversion/ Background and object level detection SRAM 16 words × 4bits DMA DMA Control DRQ Collective Dithering (16 levels) MPU Bus Interface RESET CS,RD WR A0~A3 MPU 5bit A-D converter (flash type) D0~D7 VBL VML2 VWL VML1 VML3 : Image date : Correction, Compensation date Date Flow During Read Operation (for parallel output) Image sensor SYSCK Image Processing Sequence Control Signal PTIM SH CK1 CK2 RS Sensor Control To each block Detection of Image Data Area Separation of Image Data Area Convert to bi-level Cut out/ Scale down Uniformity Correction Resolution compensation Analog signal processing circuit Correction memory (304 words × 5bits) ASIG CODEC SRDY Analog Control CLAMP S/H AGC DSCH STIM SCLK SVID DAK Simple Bi-level Conversion/ Background and object level detection SRAM 16 words × 4bits DRQ Collective Dithering (16 levels) MPU Bus Interface 5bit A-D converter (flash type) VBL VML2 VWL VML1 VML3 DMA DMA Control RESET CS,RD WR A0~A3 MPU D0~D7 : Image date : Correction, compensation date 7 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR (2) Line period and read sequence Figure 1 shows the relationship between the M66332 line period and the read sequence. • 1 line period (1/ACCK): Defines the processing time per line for M66332. The line period is determined from the line period counter registers 2 and 3 (PRE_DATA) and pixel transmission clock (ADCK). ADCK is 1/ 16th of SYSCK. 1 line period (1/ACCK) [NS] = line period counter × pixel transmission clock period [NS] = (PRE_DATA + 1) × 1/ADCK [NS] = (PRE_DATA + 1) × 16/SYSCK [NS] The line period counter is counted down with the pixel transmission clock after loading the PRE_DATA value and generates the following addresses. • Sensor start pulse (SH): Image sensor start pulse. The position of the start pulse is determined by the value in register 4 (ST_PL) which is the offset from the uniformity correction range (UNIFG). Set ST_PL to the following values according to the type of image sensor. CCD: ST_PL = sensor dummy pixel + 2 CIS: ST_PL =2 PRE_DATA load • AGC range (AGCG): • Source document read width: • Pulse motor control signal (PTIM): Down count 0 Defines the uniformity correction range. This range corresponds to the sensor width (A3 to A4). Refer to Table 2 for the relationship between sensor width and uniformity correction range. Defines the peak detection range. This range corresponds to the sensor width (A3 to A4). Auto gain control is performed for the entire width (solid line) of the sensor in AGC mode and for the range inside the sensor width (dotted line) in SCAN mode. Refer to Table 2 for the relationship between sensor width and AGC range. Defines the source document read width. If the document width is less than the sensor width, the document should be centered on the sensor because the read range is set from the center of the sensor. Refer to Table 3 for the relationship between sensor width and source document read width. Generates the pulse motor control signals for the read roller. Relationship with registers Line period (ACCK) Registers 2, 3 (PRE_DATA) Sensor start pulse (SH) Register 0 (SENS_W) Register 4 (ST_PL) ST_PL Uniformity correction range (UNIFG) Register 0 (SENS_W) AGC range (AGCG) Register 0 (SENS_W) Register 1 (SOURCE) Source document read width Register 1 (SOURCE, DEST , REDU) Pulse motor control (PTIM) Fig. 1 Line period and read sequence 8 • Uniformity correction range (UNIFG): 1 line period MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR 1 line period (ACCK) Sensor start pulse (SH) SRDY (SSCAN) (BCSCAN) STIM SCLK SVID PTIM (SSCAN), (BCSCAN) : Internal signals : Output bound Fig. 2 CODEC Interface and read sequence Table 3 Source document read width according to sensor width and source document size Table 2 Sensor width and gate signal range Sensor width A3 B4 A4 Sensor width Source document size A3 B4 A4 2487/55 2279/231 2119/391 A3 2487/55 –– –– AGC mode 2487/55 2279/231 2119/391 B4 2278/230 2278/230 –– SCAN mode 2370/162 2194/306 1760/740 A4 2118/390 2118/390 2118/390 Gate signal Uniformity correction range (UNIFG) AGC range (AGCG) X/Y X : Left end address Y : Right end address X Y 9 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR (3) Image processing function The M66332 converts image signals from the image sensor to bi-level signals. Bi-level conversion can be either simple bilevel conversion or pseudo half-tone conversion which converts image shades into bi-levels. The signal output from the image sensor must be corrected and compensated to reduce distortion and degradation before it can be converted to bi-level signals. Furthermore, for reduction in transmission time, separation of image data area and optimum bi-level conversion must be performed. The functions necessary for image processing are described below. • Peak detection • Uniformity correction • MTF compensation • Background and object level detection (simple bi-level conversion) • Pseudo half-tone dither method • Separation of image data area • Image scale down/area specification • Peak detection The A-D converter of the M66332 is used with its reference voltages (VWL, VBL) fixed. Normallly, VWL is set to VCC and VBL, is set to 0V to keep the dynamic range of the A-D converter wide. Peak detection must be performed for analog signals to match them with the full scale value of the A-D converter before they are input to the A-D converter. Peak detection is performed by reading white data in AGC mode, one of the three M66332 operating modes (AGC, UNIF, SCAN). In AGC mode, 8-line period worth of DSCH signal to raise gain—for gain control—and 16-line period worth of AGC signal to lower gain—for the overflowing of the A-D converter— are generated after AGC command start (register 0: AGC) as shown in Fig. 3. This changes the gain as shown in Fig. 4. Peak detection 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Line period DSCH (raise gain) AGC A-D converter overflow (lower gain) Peak detection preprocessing Peak gain control : Generated in pixel units only when the A-D converter overflows. Fig. 3 Peak detection Peak detection (preprocessing) Peak gain control After completing peak detection preprocessing VWL VWL White data VBL Match the peak sensor output within a line toVWL Match the output level of the last pixel of a line to VWL 1 line Fig. 4 Changes in gain during peak detection 10 After completing gain control for peak value VBL 1 line MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR • Uniformity correction Uniformity correction corrects the drop in lighting level at both ends of the light source, shading distortion due to drop in lighting level at the rim of the lens, and high frequency distortion caused by the scattering of pixel-unit image sensor characteristic (see Fig. 5). The M66332 creates uniformity correction data in UNIF mode, one of the three operating modes (AGC, UNIF, SCAN), handling 8 pixels as a unit as shown in Fig. 6. The created data is written to the internal correction memory (SRAM: 304 words × 5 bits). In SCAN mode, the correction data is read from the internal correction memory to successively correct the input image data in pixel units. Black level High frequency distortion Shading distortion White level 1 line Fig. 5 Image sensor white data output waveform Pixels Primary scanning direction 1 8 9 Correction data 1 16 17 Correction data 2 24 Correction data 3 For pixels from 1 to 8, uniformity correction is carried out by correction data 1. For pixels from 9 to 16, uniformity correction is carried out by correction data 2. For pixels from 17 to 24, uniformity correction is carried out by correction data 3. Fig. 6 Creation of uniformity correction data 11 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR • Correction The M66332 performs entire pixel correction for 50% correction range as shown in Fig. 7. Correction is not possible if the white correction data exceeds the 50% correction range as shown in Fig. 7. Therefore, be sure to keep the input signal within the correction range. White Correction Analog signal input White data VWL 25-1 50% 24-1 VBL 0 1 line If correction range is exceeded (during white correction) Analog signal input White data VWL 25-1 50% 24-1 VBL 0 1 line Fig. 7 Uniformity correction 12 White data exceeding correction range Portion exceeding correction range MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR • MTF compensation As shown in Fig. 8, characters and photos that have been photoelectrically converted by the sensor unit are characterized by a drop in resolution. The MTF compensation per- Photoelectric conversion formed by the M66332 enhances the high frequency components with a Laplacian filter to maintain the resolution of the image data and creates a perception of increased dynamic range. Photoelectric conversion Image signal Source document (characters) MTF compensation Compensated data Photoelectric conversion Image signal Source document (photo) MTF compensation Compensated data MTF compensation X’ = X + α ((X – A) + (X – B)) α = Primary scanning compensation coefficient, register 5 (MTF) Secondary scanning direction Window 3 × 1 F G A X B Primary scanning direction F–G Pixel Fig. 8 MTF Compensation 13 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR • Background and object level detection The M66332 uses the floating threshold method rather than the fixed threshold method. This method successively generates a threshold for optimum simple bi-level conversion of the target pixel. Therefore, a threshold matching the picture data is generated without modifying the image data. This value is used as the threshold of the bi-level area when simple bi-level conversion or image separation is selected as bi-level conversion mode. : register 5 (MODE) Background level counter If an image data greater (brighter) than the current counter value is input, this counter is incremented to approach the image data. If an image data less (darker) than the current counter value is input, this counter is decremented to approach the image data. The count up/down speed can be set with the following register. : register 9 (MAX_UP, MAX_DOWN) The lower limit of the background level can be set with the following register. : register B (LL_MAX) Object level counter If an image data greater (brighter) than the current counter value is input, this counter is incremented to approach the image data. It an image data less (darker) than the current counter value is input, the image data is set to this counter. The count down speed can be set with the following register. : register 9 (MIN_UP) The upper limit of the character level can be set with the following register. : register A (UL_MIN) Background level counter Image data Threshold generation Bi-level data Compare Object level counter White level Background level Threshold level Input data Object level Threshold level = (background level - object level) × K + object level K = bi-level threshold coefficient: register 9 (SLICE) Fig. 9 Background-object level 14 Black level MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR • Dither method The M66332 has a built-in 16 words × 4 bits SRAM which is used as a collective dithering memory. During initialization, threshold values are written in the dither memory, matching the desired dither pattern into 4 × 4 dither matrix. : register E (DITH_D) Table 4 Scanning line density and dither matrix size 4 × 4 matrix sequence 0 12 3 15 8 4 11 7 2 14 1 13 10 6 9 5 a)Diffused type 4 15 9 14 Fig. 10 shows some examples of dither patterns. Refer to the section on dither memory and uniformity correction memory read/write for details on how to read/write the dither memory. This is used when dither method and image data area separation are selected for bi-level conversion mode during read. : register 5 (MODE) 10 0 3 8 5 2 1 13 11 6 12 7 b) Concentrated type 11 12 7 3 4 0 8 15 6 2 10 13 9 14 5 1 Scanning Line Density Normal Fine Primary/Secondary Scanning Line (line/mm) 8 × 3.85 8 × 7.7 Level Matrix Size –– 16 –– 4×4 c) Mesh type Fig. 10 Collective dither pattern 15 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR • Separation of image data area In order to perform bi-level conversion appropriate for the image, a black and white image is separated into bi-level conversion area and gradation conversion area. Simple bi-level Black and white image conversion is applied to the bi-level conversion area and dither method is applied to the gradation area. : register 5 (MODE) Area Process Example Bi-level conversion area Simple bi-level conversion Character Gradation conversion area Pseudo half-tone conversion Photo There is no significant change in illumination of the gradation conversion area (photo) when a black and white image is viewed through a 5 × 1 window. This characteristic is used to distinguish between gradation conversion area and bi-level conversion area. Secondary scanning direction 5 × 1 window Lmax: maximum illumination in window Lmin : minimum illumination in window X Current line Primary scanning direction Pixel Identification equation 1 Lmax - Lmin > A (illumination difference in bi-level conversion area) : register 6 difference (SEPA_A) Identification equation 2 Lmin > B (area is entirely white) : register 7 minimum (SEPA_B) Identification equation 3 Lmax < C (area is entirely black) : register 8 maximum (SEPA_C) Simple bi-level conversion if identification equation 1, 2, or 3 is satisfied. Pseudo half-tone conversion when none of the identification equations is satisfied. Difference White level = 15 Minimum Lmin Maximum Lmax A Input data B C Lmin Black level = 0 Lmax – Lmin Fig. 11 Separation of image data area 16 Lmax MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR • Image scale down/area specification Scale down function The image data input from the analog signal processing circuit can be scaled down (A3 → B4, A3 → A4, B4 → A4) by leaving out pixels in the primary scanning direction for bi-level conversion. : register 1 (SOURCE, DEST, REDU) Scale down in secondary scanning direction can be performed in the same rate by MPU program. Table 5 Scaling rate IN A3 B4 A4 B4 13/15 1 –– A4 12/17 9/11 1 OUT Area specification function When area specification is selected, bi-level conversion is performed only in the specified area from the center of the source document as shown Fig. 12. : register 1 (SOURCE, DEST, REDU) Source document width Specified area Fig. 12 Cut out function 17 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR (4) Sensor unit/analog signal processing unit interface CCD-bit clamp type SH When ST_PL is odd CK1=φ 1 CK2=φ 2 φ1 φ2 When ST_PL is even CK1=φ 2 CK2=φ 1 RS Sensor output (OS) S/H CLAMP OUT (ASIG) (A-D converter clock) Register 4: STPL = dummy pixel + 2 Dummy area Valid pixel area Unit: 1/SYSCK 12 SH 2 2 16 φ1 φ2 16 8 RS 4 4 (OS) N 16 3 4 S/H 9 16 CLAMP OUT (ASIG) (A-D converter clock) 18 13 2 1 N MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR CCD-line clamp type SH When ST_PL is odd CK1=φ 1 CK2=φ 2 φ1 φ2 When ST_PL is even CK1=φ 2 CK2=φ 1 RS Sensor output (OS) S/H (Line clamp area) CLAMP OUT (ASIG) (A-D converter clock) 8: fixed Register 4: STPL = dummy pixel + 2 Valid pixel area Dummy area Note: Line clamp uses sensor output equivalent to (dummy area –8) pixels from the first pixel after SH. Unit: 1/SYSCK 12 SH 2 2 16 φ1 φ2 16 8 RS (OS) S/H CLAMP 4 4 N 16 3 4 9 3 4 9 N OUT (ASIG) (A-D converter clock) 19 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR CIS type SH CK1 CK2 Sensor output (SIG) S/H CLAMP OUT (ASIG) (A-D converter clock) Resister 4: STPL = 2 Unit: 1/SYSCK Select with register 5 SH_W SH 16 16 CK1 CK2 6 8 2 6 8 2 16 (SIG) N 16 4 1 Select with register 5 S/H_W S/H 2 1 16 16 CLAMP OUT (ASIG) 2 1 N (A-D converter clock) Note: CLAMP: In case of CIS, check with the sensor manufacturer for the use of CLAMP. SH and CK1, CK2: SH can be selected with register 5 and CK can be selected with CK1 and CK2 (2 choices each) to provide interface with various types of CIS. 20 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR (5) CODEC interface Serial output SRDY SH A B STIM 10 4 12 SCLK 2 10 2 SVID Unit: 1/SYSCK Note: A is determined by register 4 (ST_PL), and B is determined by register 1 (SOURCE, DEST, REDU). Parallel output Pixel 1 2 3 4 5 6 7 8 N+3 N+4 N+5 N+6 N+7 SCLK SVID N–1 N N+1 N+2 N+8 DRQ DAK RD D0 N–1 D1 N–2 D2 N–3 D3 N–4 D4 N–5 D5 N–6 D6 N–7 D7 N–8 Note: Handshaking of three lines SRDY, SH, and STIM, which are interface to the CODEC, is the same as serial output. 21 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR (6) Read/write to dither memory, uniformity correction memory The following figures show the sequence for writing and readDither memory write (MPU → M66332) ing dither patterns in the 16 words × 4 bits collective dithering SRAM built in the M66332. Initial setting (1) Initial setting (2) Memory address (0) Memory address (1) 1H 0H D4 = “0” D7 = “1” DATA (0) DATA (1) 1 2 3 3 CS A3 ~ A0 EH EH ~ WR D7 ~ D0 (Input) Dither memory read (M66332 → MPU) Initial setting (1) Initial setting (2) 1H 0H D4 = “0” D7 = “1” Memory address (0) Memory address (1) CS A3 ~ A0 EH EH ~ WR D7 ~ D0 (Input) RD D7 ~ D0 (Output) 1 2 DATA (0) DATA (1) 4 4 Clear D4 (PO) in register 1 to “0” in order to set the MPU bus (D7 – D0) to dither matrix memory data output mode. Set D7 (RESET) in register 0 to “1” in order to reset the dither memory address counter. Select DITH_D with register E and write DATA (0) on the MPU bus (D5 – D0). Increment the address counter of the dither memory at the rising edge of WR. (during write) Select DITH_D with register E and read DATA (0) in dither memory to the MPU bus (D5 – D0). Increment the address counter of the dither memory at the rising edge of RD. (during read) Dither matrix address A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 4 × 4 matrix 22 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR The M66332 can read/write uniformity correction data in the external correction SRAM through the MPU bus. This enables the uniformity correction data to be temporarily saved in backup memory during power off. The following figures show the uniformity correction data read/write sequence. Uniformity correction memory write (MPU → M66332) Initial setting Closing setting CS A3~A0 1H 2H 3H 1 2 FH WR D7~D0 (Input) D7 = “1” Repeats steps 1, 2, and 3 . DATA D4 = “0” 1H D7 = “0” 3 Uniformity correction memory read (M66332 → MPU) Initial setting Closing setting CS A3~A0 1H 2H 3H FH WR D7~D0 (Input) 1H Repeats steps 1, 2, and 4 . D7 = “1” D4 = “0” D7 = “0” RD D7~D0 (Output) DATA 1 2 4 D7 D6 D5 D4 D3 D2 D1 D0 R2 A4 A3 A2 A1 A0 0 R3 0 ∗ 0 0 0 0 A8 A7 A6 A5 D_LOAD : 0 for normal 1 for data load A8~A0 : UNIF memory address The last 5 digits (A4 – A0) of an address in the UNIF memory are written in register 2. The initial 4 digits (A8 – A5) of the address in the UNIF memory and D_LOAD = “1” (D6) are written in register 3. Steps and identifies the address in the UNIF memory. The UNIF memory is selected with register F, and DATA on the MPU bus (D4 – D0) is written at the identified address. The UNIF memory is selected with register F, and DATA stored at the identified address is read to the MPU bus (D4 – D0). Initial setting: D7 (UM_R/W) and D4 (P0) of register 1 are set to “1” and “0”, respectively, to select read/write mode of uniformity correction memory. Closing setting : D7 (UM_R/W) of register 1 is set to “0” while D4 (P0) is set to that taken in operation, to cancel read/write mode of uniformity correction memory. Address Space Sensor width A3 B4 A4 Left end address 310 284 264 Right end address 7 29 49 23 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Dither memory write/read Image sensor SYSCK Image Processing Sequence Control Signal PTIM SH CK1 CK2 RS Sensor Control To each block Detection of Image Data Area Separation of Image Data Area Convert to bi-level Cut out/ Scale down Correction memory (304 words × 5bits) Uniformity Correction MTF Compensation Analog signal processing circuit CODEC SRDY Analog Control CLAMP S/H AGC DSCH STIM SCLK SVID DAK Simple Bi-level Conversion/ Background and object level detection SRAM 16 words × 4bits DMA DMA Control DRQ Collective Dithering (16 levels) MPU Bus Interface RESET CS,RD WR A0~A3 MPU ASIG 5bit A-D converter (flash type) D0~D7 VBL VML2 VWL VML1 VML3 : Dither date Uniformity correction memory write/read Image sensor SYSCK Image Processing Sequence Control Signal PTIM SH CK1 CK2 RS Sensor Control To each block Detection of Image Data Area Separation of Image Data Area Convert to bi-level Cut out/ Scale down Uniformity Correction MTF Compensation Analog signal processing circuit Correction memory (304 words × 5bits) DAK Simple Bi-level Conversion/ Background and object level detection SRAM 16 words × 4bits DMA DMA Control DRQ Collective Dithering (16 levels) MPU Bus Interface RESET CS,RD WR A0~A3 MPU ASIG 5bit A-D converter (flash type) VBL VML2 VWL VML1 VML3 24 CODEC SRDY Analog Control CLAMP S/H AGC DSCH STIM SCLK SVID D0~D7 : Uniformity correction date MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR (7) Reset The M66332 has three types of reset. Each reset function is described below. Hard reset: Initializes the circuit. Hard reset also performs the following soft reset and standby reset. Soft reset: Used when cancelling a line read operation in the middle during SCAN mode. Read operation is resumed starting from the next line. Standby : Used as standby mode. The internal clock is stopped by stopping the clock generator which generates the internal clock from the system clock. Therefore, the internal circuit is stopped and power is saved. The period counter and register statuses are saved and the internal memory is placed in standby mode. Table 6 Reset function Function Reset Type Hard Reset RESET Soft Reset Register 0 (RESET) Standby Register1 (STNBY) Initialize Register Initialize Internal F/F (8) Image quality control using registers • MTF compensation If the sensor has high resolution, resolution compensation need not be performed for half-tone area. MTF compensation should be performed for bi-level area regardless of the sensor resolution in order to achieve good object reproduction. • Simple bi-level conversion, background and object level detection Set the background level detection and object level detection counters as follows in order to obtain clear output of objects that do not have completely white background and that are not entirely black. ← fast MAX_UP > MAX_DOWN > MIN_UP The output becomes darker as bi-level conversion threshold coefficient (SLICE) is increased. Select a large SLICE value for light source document. Reset Period Counter Stop Clock Generator Operation Stop Line Read • Pseudo half-tone conversion, dither method Select collective dithering (16 gradations using 4 × 4 dither matrix) for fine mode. Refer to the section on image processing function for details on providing dither pattern threshold. • Separation of image data area The optimum parameter is selected to perform the best bilevel conversion for each area: simple bi-level conversion for the object and pseudo half-tone conversion for half-tone. 25 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Table 7 shows the recommended values for parameters related to picture quality. Use these values as reference to determine the optimum parameter. Table 7 Recommended parameter values Uniformity Correction Resolution Compensation MTF Simple Bi-Level Conversion Yes 1/2 Dithering Yes Separation of Image Data Area Yes Image Background and Object Level SLICE MAX UP MAX DOWN MIN UP UL MIN LL MAX 5/8 Normal Normal Normal 04H 0AH MON –– –– –– –– –– –– MON 5/8 Normal Normal Normal 04H 0AH 0 8 1 12 2 6 4 A 3 14 3 11 2 15 C 9 4 9 2 13 5 8 6 1 7 D 10 2 7 5 B 3 Dither pattern (γ = 0.8) 26 γ Correction Dither Pattern No –– γ=0.9 VML1=1.1V VML2=2.2V VML3=3.5V γ=0.9 VML1=1.1V VML2=2.2V VML3=3.5V 4×4 diffusion pattern, γ = 0.8 4×4 diffusion pattern, γ = 0.8 Separation of Image Data Area SEPA SEPA SEPA A B C –– –– –– –– –– –– 06H 0DH 01H MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Threshold γ;0.8 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Threshold Fig. 14 Thresholds for collective dithering : Example 2 White 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Black 0 Black = 0V A-D converter output Threshold sequence Fig. 13 Thresholds for collective dithering : Example 1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 • γ correction γ correction is performed to simulate the sensitivity characteristics (exponential nature) of the human eye in order to make the image data more similar to natural image. γ = 0.45 is said to be the optimum correction when using a thermal head printer. The M66332, due to its capacity to handle 4-bit internal data, performs γ correction by means of both collective dithering and the middle reference voltage pins (VML1, VML2, and VML3) of the A-D converter. (γ Correction by Collective Dithering ) γ correction is realized applying a γ characteristic to the threshold value to be written in the dither matrix as shown in Fig. 15. The example given in Fig. 15 is an approximation of γ characteristic, γ, to 0.8. (γ Correction by the Middle Reference Voltage Pins of the AD converter) The example shown in Fig. 16 is an approximation of γ characteristic, γ, to 0.9 , which is carried out by applying VML1 = 1.1V, VML2 = 2.2V, and VML3 = 3.5V to the middle reference pins of the A-D converter. Fig. 23 in the M66332FP leaflet shows an example of circuits for applying voltages to middle reference voltage pins. Threshold sequence Threshold sequence USAGE PRECAUTIONS • Peak detection in SCAN mode In SCAN mode, successive peak detection is performed for the image data being read as shown for the AGC range (dotted line) in Fig. 1. This enables better picture reproduction when picture data brighter than the white reference used during peak detection is input in SCAN mode. This is especially effective for sensor units such as CIS that do not have a built-in white reference. • Read operation with CIS sensor If the sensor is CIS, it is possible to select whether or not to use white correction in SCAN mode. Do not select white correction for the input of analog signals already processed by entire pixel correction. • Collective dithering Thresholds written in dither matrix should be between 1 and 15 excluding 0 as shown in Fig. 13. As the M66332 carries out block correction in 8-bit units for uniformity correction, a CIS sensor may generate background noises due to irregularity of pixels. It is possible to remove noises and gain a fine image quality by reducing the maximum threshold value as shown in Fig. 14. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Threshold Fig. 15 An example of γ correction by dither matrix γ=1 γ;0.9 VML1 =1.1V VML2 VML3 =2.2V =3.5V Analog input White = 5V Fig. 16 An example of γ correction by middle reference pins 27 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR • TIME function When TIME = “1” is set in register 1, the processing time per line is doubled to 2 line periods, Data is read once every two line periods and processed. 1 line period (ACCK) N period When the read and write motors operate simultaneously during copy operation, this command can be used to reduce the processing speed to 1/2 in order to reduce the power load. N + 1 period N + 2 period Sensor start pulse (SH) SRDY (SSCAN) (BCSCAN) STIM PTIM Note: (SSCAN), (BCSCAN): internal signals Read is performed when (SSCAN) is “H”. Data read is processed when (BCSCAN) is “H”. Fig. 17 When processing speed is 1/2 28 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Register Structure Address R/W 0H W Explanation D7 D6 RESET SENS D5 D4 SENS_W D7 0 1 RESET System Reset Normal Mode Reset Mode D6 0 1 SENS Sensor Type CCD CIS D5 0 0 1 1 D4 0 1 0 1 D3 D2 D1 D0 UMODE AGC UNIF SCAN (Default is 00H) Reset while write pulse is “L” when D7 = “1” SENS_W Sensor Width A4 B4 A3 –– D3 0 1 UMODE CIS Uniformity Correction Mode With White Correction No White Correction D2 0 1 AGC AGC mode Stop Start • Controls AGC mode start/stop. D1 0 1 UNIF UNIF Mode Stop Start • Controls UNIF mode start/stop. D0 0 1 SCAN SCAN Mode Stop Start • Controls SCAN mode start/stop. • For selecting with or without correction in SCANning (with CIS only) 29 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Address R/W 1H W Explanation D7 D6 D5 D4 UM_R/W STNBY TIME P_0 D2 SOURCE D1 D0 DEST REDU (Default is 00H) D7 0 1 UM_R/W Uniformity Correction Memory Read/ Write Normal UNIF Memory Read/Write D6 0 1 STNBY Standby Mode Normal Standby Mode • Standby mode stops the clock generation circuit. The period counter and register status are saved and the internal memory is placed in standby mode. D5 0 1 TIME Line Time 1 Line Period 2 Line Period • When read and write operations are performed together as in copy operation, the power load can be reduced by selecting 2 line period. The processing speed drops to 1/2 when 2 line period is selected. D4 0 1 P_O Parallel Output Without Parallel Output Parallel Output • D0 is output in LSB format and D7, in MSB format. When SCAN data is output in SCAN mode, D7 is output in LSB (left) format and D0, is output in MSB (right) format. D3 0 0 1 1 30 D3 D2 0 1 0 1 SOURCE Source Width A4 B4 A3 –– D1 0 1 DEST Destination Width A4 B4 D0 0 1 REDU Scale down/Cut out Cut out Scale down Scaling Rate A3 → B4 13/15 B4 → A4 9/11 A3 → A4 12/17 • Refer to image scale down/ area specification for scale down/cut out. MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Address R/W 2H W Explanation D7 D6 D5 D4 D3 D2 D1 D0 PRE_DATA <7:0> (Default is 00H) D7~D0: PRE_DATA <7:0> Pre Data of Line period Counter (Lower part) D7~D4: If register 3 D_LOAD = “1” these bits will be the address denoted by lower 5 digits (A4~A0) used for read/write operations on the uniformity correction memory. 3H W D7 D6 0 D_LOAD D6 0 1 D5 D4 D3 D2 D1 D0 PRE_DATA <12:8> Uniformity correction memory address setting mode. Normal Data load (Default is 00H) • This bit is for address setting for the access form MPU to the uniformity correction memory. Set this bit to normal during access operation. D4~D0: PRE_DATA <12:8> Pre Data of Line period Counter (Upper part) • 1 line period is determined from PRE_DATA and pixel transmission clock frequency (ADCK). ADCK is 1/16 of system clock. Refer to line period and read sequence section. D3~D0: If register 3 D_LOAD = “1” these bits will be the address denoted by upper 4 digits (A8~A5) used for read/write operations on the uniformity correction memory. 4H W D7 D6 D5 D4 D3 D2 ST_PL <6:0> D1 D0 (Default is 00H) D6~D0: ST_PL <6:0> Start Pulse of Line sensor ST_PL = (sensor dummy pixel + 2) Refer to line period and read sequence Section. 31 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Address R/W 5H W 6H Explanation D7 D6 D5 D4 S/H_W SH_W CLAMP D3 D2 D1 MODE D6 0 1 S/H_W Pulse Width of S/H Normal (Sysclk period × 4) Normal × 0.5 D5 0 1 SH_W SH pulse width for CIS Normal Reverse of (normal × 2) D4 0 1 CLAMP Clamp Method of Analog Circuit Bit Clamp Line Clamp D0 MTF (Default is 00H) • In case of CCD, there is only one SH pulse width and this register is ignored. • Line clamp does not apply to CIS. D3 0 0 1 1 D2 0 1 0 1 MODE Bi-level Mode Simple Bi-level Dither Separation (Simple Bi-level + Dither) –– D1 0 0 1 1 D0 0 1 0 1 MTF Main Coefficient of MTF Compensation NON(0) A little less (1/4) Middle (1/2) A little over (1) W D7 D6 D5 D4 D3 D2 D1 D0 (Default is 00H) SEPA_A D3~D0: SEPA_A Separation of Image Data Area (Difference) 7H W D7 D6 D5 D4 D3 D2 D1 SEPA_B D3~D0: SEPA_B Separation of Image Data Area (MIN.) 32 D0 (Default is 00H) MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Address R/W 8H W Explanation D7 D6 D5 D4 D3 D2 D1 D0 (Default is 00H) SEPA_C D3~D0: SEPA_C Separation of Image Data Area (MAX.) 9H W D7 D6 SLICE D5 D4 MAX_UP D3 D2 MAX_DOWN D1 D0 MIN_UP (Default is 00H) D7 0 0 1 1 D6 0 1 0 1 SLICE Detector of Background and Object levels (SLICE) Normal (4/8) Light (3/8) Dark (5/8) Darker (6/8) D5 0 0 1 1 D4 0 1 0 1 MAX_UP Detector of Background level (Up Counter CLK) Normal (T = (1 pixel period) × 32) Slow (T = (1 pixel period) × 64) Fast (T = (1 pixel period) × 16) Faster (T = (1 pixel period) × 8) D3 0 0 1 1 D2 0 1 0 1 MAX_DOWN Detector of Background level (Down Counter CLK) Normal (T = (1 pixel period) × 128) Slow (T = (1 pixel period) × 256) Fast (T = (1 pixel period) × 64) Faster (T = (1 pixel period) × 32) D1 0 0 1 1 D0 0 1 0 1 MIN_UP Detector of Object level (Up Counter CLK) Normal (T = (1 pixel period) × 512) Slow (T = (1 pixel period) × 1024) Fast (T = (1 pixel period) × 256) Faster (T = (1 pixel period) × 128) T: Counter clock period 33 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Address R/W AH W Explanation D7 D6 D5 D4 D3 D2 D1 D0 (Default is 06H) UL_MIN D3~D0: UL_MIN Detector of background and object levels (upper limit of object level) BH W D7 D6 D5 D4 D3 D2 D1 D0 (Default is 07H) LL_MAX D3~D0: LL_MAX Detector of background and object levels (lower limit of background level) EH R/W D7 D6 D5 D4 D3 D2 D1 D0 DITH_D D3~D0: DITH_D Internal dither memory data • Refer to the section on dither memory and uniformity correction memory read/write for information concerning read/write method. FH R/W D7 D6 D5 D4 D3 D2 D1 D0 UNIF_D D4~D0: UNIF_D Internal uniformity correction data • Refer to the section on dither memory and uniformity correction memory read/write for information concerning read/write method. 34 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR ABSOLUTE MAXIMUM RATING (Ta = –20 ~ 75˚C, unless otherwise noted) Symbol VCC VI VO AVCC VWL VBL VML VAIN Tstg Parameter Supply voltage Input voltage Output voltage Analog supply voltage Reference voltage (White) Reference voltage (Black) Reference voltage (Middle) Analog Input voltage Storage temperature range Conditions Ratings –0.3 ~ +7.0 –0.3 ~ VCC + 0.3 0 ~ VCC VCC–0.3 ~ VCC+0.3 –0.3 ~ AVCC+0.3 –0.3 ~ AVCC+0.3 –0.3 ~ AVCC+0.3 –0.3 ~ AVCC+0.3 –65 ~ 150 Unit V V V V V V V V ˚C RECOMMENDED OPERATING CONDITIONS Symbol VCC GND VI AVCC AGND VWL VBL VAIN Topr Parameter Supply voltage GND voltage Input voltage Analog supply voltage Analog GND voltage (Note) Reference voltage (White) Reference voltage (Black) Analog input voltage ASIG Operating temperature range Min. 4.5 0.0 4.5 3 0.0 VBL –20 Limits Typ. 5.0 0.0 5.0 0.0 0.0 Max. 5.5 VCC 5.5 AVCC 1.0 VWL 75 Unit V V V V V V V V ˚C Note: Connect AGND with GND externally. 35 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR ELECTRICAL CHARACTERISTICS (Ta = –20 ~ 75˚C, VCC = 5 V ± 10%, unless otherwise noted) Symbol Parameter VIH “H” Input voltage VIL “L” Input voltage VT+ VT– VH VOH VOL VOH Positive-going threshold voltage Negative-going threshold voltage RESET Hysteresis voltage “H” output voltage D0~D7 “L” output voltage “H” output voltage DRQ, SH, CK1, CK2, RS, PTIM, CLAMP, S/H, AGC, DSCH, “L” output voltage STIM, SCLK, SVID VOL IIH “H” input current IIL “L” input current IOZH IOZL IAIN RL SINL ICCS ICCA ICC SYSCK, SRDY, DAK, CS, RD, WR, A0~A3, D0~D7 SYSCK, SRDY, DAK,RESET, CS, RD, WR, A0~A3 Off-state “H” output current D0~D7 Off-state “L” output current ASIG (Standby) Analog input current Reference resistance A-D converter Non-linear error (Note 1) Quiescent supply current (Standby) (Note 2) Quiescent supply current (Active state) (Note 2) Dynamic supply current Test conditions SYSCK=8MHz Limits Typ. Max. 0.8 V 2.4 V V V V V V 0.2 IOH=–12mA IOL=12mA IOH=–4mA Unit V 0.6 VCC–0.8 0.55 VCC–0.8 0.55 V 1.0 µA –1.0 µA 5.0 µA –5.0 µA ±10 µA kΩ ±0.5 ±1.0 LSB VCC=5.5V VI=VCC, GND 10 20 mA VCC=5.5V VI=VCC, GND 15 40 mA VCC=5.5V VI=VCC,GND 40 IOL=4mA VCC=5.5V VI=5.5V VCC=5.5V VI=0V VCC=5.5V VI=5.5V VCC=5.5V VI=0V 1.0 VCC=5.0V Note 1: The A-D converter has a 5-bit resolution. 2: Current flowing in the reference resistor in the A-D converter is not included. 36 Min. 2.0 mA MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR TIMING REQUIREMENTS (Ta = –20 ~ 75˚C, VCC = 5 V ± 10%, unless otherwise noted) Symbol tc(SYS) tw+(SYS) tw–(SYS) tr(SYS) tf(SYS) tw(RD) tsu(CS-RD) tsu(A-RD) tsu(DAK-RD) th(RD-CS) th(RD-A) th(RD-DAK) tw(WR) tsu(CS-WR) tsu(A-WR) tsu(D-WR) th(WR-CS) th(WR-A) th(WR-D) th(STIM-SRDY) Test conditions Parameter System clock Read pulse Write pulse STIM Period High-level pulse width Low-level pulse width Rise time Fall time Pulse width Setup time Setup time Setup time Hold time Hold time Hold time Pulse width Setup time Setup time Setup time Hold time Hold time Hold time Hold time Min. Limits Typ. 125 62.5 62.5 Max. 20 20 CS A0~A3 DAK CS A0~A3 DAK CS A0~A3 D0~D7 CS A0~A3 D0~D7 SRDY 100 20 20 20 10 10 10 100 20 20 50 20 10 0 0 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 37 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR SWITCHING CHARACTERISTICS (Ta = –20 ~ 75˚C, VCC = 5 V ± 10%, unless otherwise noted) Parameter Symbol tPZL(RD-D) tPZH(RD-D) tPLZ(RD-D) tPHZ(RD-D) tPHL(RD-DRQ) Test conditions Min. Limits Typ. Output enable time to low-level and high-level (RD-D) Max. Unit 75 ns 50 ns 50 ns CL=150pF Output disable time from low-level and high-level (RD-D) High-level to low-level output propagation time (RD-DRQ) 10 CL=50pF Test Circuit INPUT VCC OUTPUT VCC Parameter tPLH, tPHL tPLZ tPHZ tPZL tPZH RL=1kΩ P.G SW1 DUT SW2 CL 50Ω SW1 Open Closed Open Closed Open SW2 Open Open Closed Open Closed (1)The pulse generator (PG) has the following characteristics (10%~90%) : tr = 3 ns, tf = 3 ns (2)The capacitance CL = 150pF includes stray wiring capacitance and the probe input capacitance. RL=1kΩ GND System Clock tc(SYS) tf(SYS) tw+(SYS) tw-(SYS) 90% SYSCK 1.3V tr(SYS) 1.3V 90% 3V 1.3V 10% 10% 0V 38 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR MPU Interface (1) Read timing (M66332 → MPU) 3V CS 1.3V 1.3V 0V tsu(CS-RD) th(RD-CS) 3V A0~A3 1.3V 1.3V 0V tsu(A-RD) tw(RD) th(RD-A) 3V 1.3V RD 1.3V 0V tPZL(RD-D) tPLZ(RD-D) 50% D0~D7 10% tPZH(RD-D) VOL tPHZ(RD-D) VOH 90% 50% D0~D7 (2) Write timing (MPU → M66332) 3V CS 1.3V 1.3V 0V tsu(CS-WR) th(WR-CS) 3V A0~A3 1.3V 1.3V 0V tsu(A-WR) tw(WR) th(WR-A) 3V WR 1.3V 1.3V 0V tsu(D-WR) th(WR-D) 3V D0~D7 1.3V Valid data 1.3V 0V 39 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR DMA Timing Read timing (M66332 → System bus) VOH DRQ 50% 50% VOL 120/SYSCK tPHL(RD-DRQ) 3V DAK 1.3V 1.3V 0V tsu(DAK-RD) tw(RD) th(RD-DAK) 3V 1.3V RD 1.3V 0V tPZL(RD-D) tPLZ(RD-D) 50% D0~D7 10% tPZH(RD-D) VOL tPHZ(RD-D) 90% VOH 50% D0~D7 CODEC Interface th(STIM-SRDY) 3V SRDY 1.3V 0V VOH STIM 50% VOL VOH SCLK VOL VOH SVID VOL 40 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR FLOWCHART Read Operation (Sensor: CCD) Start A Power ON Soft reset Wait 1 line period × 2 Turn off light Register 0 Register 1 Set standby mode S/H, SH pulse width CLAMP Register 5 Output format Register 1 Period counter Registers 2, 3 Register 4 Initial settings Start pulse Power OFF? Y N Next document Y Next document? N Image data area separation parameter Registers 6, 7, 8 Power OFF Background and object level parameter Registers A, B Dither pattern write N End Register E Complete? Next document Y Register 0 AGC + white compensation AGC: 16 times white compensation : 8 times End uniformity correction Register 0 Document width, specification width Register 1 Bi-level mode Image processing function Start document read N Register 5 Registers 5, 9 Register 0 Complete? Y End document read Y Setting for each White compensation document Start uniformity correction Wait 1 line period × 30 (24 or more) Register 1 Register 0 Read a page Reset standby mode Turn on light Stabilize (white reference) Transfer? N A 41 MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Uniformity correction data creation, transmission (sensor: CIS) Start Soft reset Register 0 S/H, SH pulse width CLAMP Register 5 Output format Register 1 Period counter Registers 2, 3 Start pulse Start uniformity correction Wait 1 line period × 30 (24 or more) Turn off light Register 0 AGC + white compensation AGC: 16 times white compensation : 8 times End uniformity correction Register 0 Transmit correction data Registers 1, 2, 3, F N Complete? Y End 42 Register 4 stabilize Transmit uniformity Uniformity correction correction data /white Turn on light Initial settings Power ON MITSUBISHI 〈DIGITAL ASSP〉 M66332FP FACSIMILE IMAGE DATA PROCESSOR Read operation (sensor: CIS) Start A Power ON Soft reset Register 0 S/H, SH pulse width CLAMP Register 5 Wait 1 line period × 2 Turn off light Set standby mode Power OFF? Output format Register 1 Period counter Registers 2, 3 Background and object level parameter Registers A, B Dither pattern write N Next document Register 4 Image data area separation parameter Registers 6, 7, 8 Y N Y Next document? N Initial settings Start pulse Register 1 Register E Power OFF End Complete? Y Write to uniformity correction memory Register F N Complete? Next document Y Reset standby mode Register 1 End AGC Register 0 Document width, specification width Register 1 Bi-level mode Image processing function Start document read N Register 5 Registers 5, 9 Register 0 Complete? Y End document read Y Settings for each document Register 0 (AGC: 16 times) Read a page Start AGC Wait 1 line period x 20 (16 or more) AGC Turn on light stabilize (white reference) Register 0 Transmit? N A 43