May 2005 RMPA1963 i-Lo™ US-PCS CDMA, CDMA2000-1X and WCDMA Power Amplifier Module iL o ™ General Description ■ 38% CDMA/WCDMA efficiency at +28 dBm Pout The RMPA1963 Power Amplifier Module (PAM) is Fairchild’s latest innovation in 50 Ohm matched, surface mount modules targeting US-PCS CDMA/WCDMA/HSDPA and Wireless Local Loop (WLL) applications. Answering the call for ultra-low DC power consumption and extended battery life in portable electronics, the RMPA1963 uses novel proprietary circuitry to dramatically reduce amplifier current at low to medium RF output power levels (< +16 dBm), where the handset most often operates. A simple two-state Vmode control is all that is needed to reduce operating current by more than 50% at 16 dBm output power, and quiescent current (Iccq) by as much as 70% compared to traditional power-saving methods. No additional circuitry, such as DC-to-DC converters, are required to achieve this remarkable improvement in amplifier efficiency. Further, the 4x4x1.5 mm LCC package is pin-compatible and a drop-in replacement for last generation 4x4 mm PAMs widely used today, minimizing the design time to apply this performanceenhancing technology. The multi-stage GaAs Microwave Monolithic Integrated Circuit (MMIC) is manufactured using Fairchild RF’s InGaP Heterojunction Bipolar Transistor (HBT) process. ■ Meets HSDPA performance requirements ■ Linear operation in low-power mode up to +19 dBm ■ Low quiescent current (Iccq): 25 mA in low-power mode ■ Single positive-supply operation with low power and shutdown modes • 3.4V typical Vcc operation • Low Vref (2.85V) compatible with advanced handset chipsets ■ Compact Lead-free compliant LCC package – (4.0 X 4.0 x 1.5 mm nominal) ■ Industry standard pinout ■ Internally matched to 50 Ohms and DC blocked RF input/output ■ Meets IS-95/CDMA2000-1XRTT/WCDMA performance requirements Device Functional Block Diagram (Top View) MMIC Vcc1 1 RF IN 2 GND 3 Vmode 4 Vref 5 10 Vcc2 INPUT MATCH 9 GND OUTPUT MATCH BIAS/MODE SWITCH 8 RF OUT 7 GND 6 GND 11 (paddle ground on package bottom) ©2005 Fairchild Semiconductor Corporation RMPA1963 i-Lo™ Rev. H 1 www.fairchildsemi.com US-PCS CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) Features ■ 14% CDMA/WCDMA efficiency (85 mA total current) at +16 dBm Pout RMPA1963 PRELIMINARY Symbol Vcc1, Vcc2 Vref Vmode Parameter Supply Voltages Reference Voltage Value Units 5.0 V 2.6 to 3.5 V 3.5 V RF Input Power +10 dBm Tstg Storage Temperature -55 to +150 °C Note: 1. No permanent damage with one parameter set at extreme limit. Other parameters set to typical values. Electrical Characteristics1 Symbol f Parameter Operating Frequency Min Typ 1850 Max Units 1910 MHz Comments CDMA/WCDMA Operation Gp Po PAEd Itot Power Gain Linear Output Power dBm Vmode=0V dBm Vmode≥2.0V % Vmode=0V 13 % Vmode≥2.0V High Power Total Current 470 mA Po=+28dBm, Vmode=0V Low Power Total Current 85 mA Po=+16dBm, Vmode≥2.0V -50 dBc Po=+28dBm; Vmode=0V -55 dBc Po=+16dBm; Vmode≥2.0V ±1.25MHz Offset ACLR2 28 16 39 Adjacent Channel Power Ratio ACLR1 Po=+28dBm; Vmode=0V Po=+16dBm; Vmode≥2.0V PAEd (digital) @ +16dBm CDMA WCDMA dB dB PAEd (digital) @ +28dBm ACPR1 ACPR2 28 23 IS-95 A/B Modulation ±2.25MHz Offset -60 dBc Po=+28dBm; Vmode=0V -65 dBc Po=+16dBm; Vmode≥2.0V Adjacent Channel Leakage Ratio WCDMA Modulation 3GPP 3.2 03-00 DPCCH +1 DCDCH ±5.00MHz Offset ±10.00MHz Offset -40 dBc Po=+28dBm; Vmode=0V -43 dBc Po=+16dBm; Vmode≥2.0V -53 dBc Po=+28dBm; Vmode=0V -55 dBc Po=+16dBm; Vmode≥2.0V General Characteristics VSWR NF Rx No Input Impedance 2.0:1 Noise Figure Receive Band Noise Power 2.5:1 4 dB -139 dBm/Hz Po≤+28dBm; 1930 to 1990MHz 2fo Harmonic Suppression -40 dBc Po≤+28dBm 3fo-5fo Harmonic Suppression -55 dBc Po≤+28dBm S Tc Spurious Outputs2,3 -60 Ruggedness w/ Load Mismatch3 10:1 Case Operating Temperature -30 85 dBc Load VSWR ≤ 5.0:1 No permanent damage. °C DC Characteristics Iccq Quiescent Current 25 mA Iref Reference Current 7 mA Po≤+28dBm Shutdown Leakage Current 1 µA No applied RF signal Icc(off) 5 Vmode≥2.0V Notes: 1. All parameters met at Tc = +25°C, Vcc = +3.4V, Vref = 2.85V and load VSWR ≤ 1.2:1, unless otherwise noted. 2. All phase angles. 3. Guaranteed by design. 2 RMPA1963 i-Lo™ Rev. H www.fairchildsemi.com iL o ™ US-PCS CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) Power Control Voltage Pin RMPA1963 Absolute Maximum Ratings1 Symbol Parameter Min Typ Units Operating Frequency 1910 MHz Vcc1, Vcc2 Supply Voltage 3.0 3.4 4.2 V Vref Reference Voltage (Operating) (Shutdown) 2.7 0 2.85 3.1 0.5 V V Bias Control Voltage (Low-Power) (High-Power) 1.8 0 2.0 3.0 0.5 V V +28 +19 dBm dBm +85 °C Pout Tc Linear Output Power (High-Power) (Low-Power) +16 Case Operating Temperature -30 DC Turn-On Sequence 1) Vcc1 = Vcc2 = 3.4V (typical) 2) Vref = 2.85V (typical) 3) High-Power: Vmode = 0V (Pout > 16dBm) Low-Power: Vmode = 2V (Pout < 16dBm) 3 RMPA1963 i-Lo™ Rev. H www.fairchildsemi.com iL o ™ US-PCS CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) f Vmode 1850 Max RMPA1963 Recommended Operating Conditions RMPA1963 Evaluation Board Layout 1 5 6 6 3 iL o ™ 5 2 7 5 Materials List Qty Item No. 1 1 G657553-1 V2 PC Board 2 2 #142-0701-841 SMA Connector Johnson 5 3 #2340-5211TN Terminals 3M Ref 4 Assembly, RMPA1963 Fairchild 3 5 3 5 (Alt) 2 6 1 7 1 7 (Alt) A/R A/R Part Number Description Vendor Fairchild GRM39X7R102K50V 1000pF Capacitor (0603) Murata ECJ-1VB1H102K 1000pF Capacitor (0603) Panasonic C3216X5R1A335M 3.3µF Capacitor (1206) TDK Murata GRM39Y5V104Z16V 0.1µF Capacitor (0603) ECJ-1VB1C104K 0.1µF Capacitor (0603) Panasonic 8 SN63 Solder Paste Indium Corp. 9 SN96 Solder Paste Indium Corp. Evaluation Board Schematic 3.3 µF 2 8 Vmode Vref 1000 pF 50 Ohm TRL SMA2 RF OUT 3,6, 7,9 5 11 0.1 µF (package base) 4 RMPA1963 i-Lo™ Rev. H Vcc2 Z 4 XYTT 50 Ohm TRL 1963 SMA1 RF IN 10 1 Vcc1 3.3 µF 1000 pF 1000 pF www.fairchildsemi.com US-PCS CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) Z XYTT 1963 4 RMPA1963 Package Outline I/O 1 INDICATOR iL o ™ TOP VIEW 2 9 1 7 Z T T XY 9 6 3 Z 4 8 6 5 1.60mm MAX. FRONT VIEW .25mm TYP. 3.50mm TYP. See Detail A .40mm .10mm .30mm TYP. .10mm .85mm TYP. 11 3.65mm .40mm .45mm 2 1 1.08mm .18mm 1.84mm DETAIL A. TYP. BOTTOM VIEW Signal Descriptions Pin # Signal Name Description 1 Vcc1 Supply Voltage to Input Stage 2 RF In RF Input Signal 3 GND Ground 4 Vmode High Power/Low Power Mode Control 5 Vref Reference Voltage 6 GND Ground 7 GND Ground 8 RF Out RF Output Signal 9 GND Ground 10 Vcc2 Supply Voltage to Output Stage 11 GND Paddle Ground 5 RMPA1963 i-Lo™ Rev. H www.fairchildsemi.com US-PCS CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) 3 XYTT SQUARE 10 1963 (4.00mm +.100 –.050 ) 1 CAUTION: THIS IS AN ESD SENSITIVE DEVICE. Solder Materials & Temperature Profile: Reflow soldering is the preferred method of SMT attachment. Hand soldering is not recommended. Precautions to Avoid Permanent Device Damage: Reflow Profile • Ramp-up: During this stage the solvents are evaporated from the solder paste. Care should be taken to prevent rapid oxidation (or paste slump) and solder bursts caused by violent solvent out-gassing. A maximum heating rate is 3°C/sec. • Device Cleaning: Standard board cleaning techniques should not present device problems provided that the boards are properly dried to remove solvents or water residues. • Pre-heat/soak: The soak temperature stage serves two purposes; the flux is activated and the board and devices achieve a uniform temperature. The recommended soak condition is: 60-180 seconds at 150-200°C. • Static Sensitivity: Follow ESD precautions to protect against ESD damage: – A properly grounded static-dissipative surface on which to place devices. • General Handling: Handle the package on the top with a vacuum collet or along the edges with a sharp pair of bent tweezers. Avoiding damaging the RF, DC, and ground contacts on the package bottom. Do not apply excessive pressure to the top of the lid. • Reflow Zone: If the temperature is too high, then devices may be damaged by mechanical stress due to thermal mismatch or there may be problems due to excessive solder oxidation. Excessive time at temperature can enhance the formation of inter-metallic compounds at the lead/board interface and may lead to early mechanical failure of the joint. Reflow must occur prior to the flux being completely driven off. The duration of peak reflow temperature should not exceed 20 seconds. Soldering temperatures should be in the range 255–260°C, with a maximum limit of 260°C. • Device Storage: Devices are supplied in heat-sealed, moisture-barrier bags. In this condition, devices are protected and require no special storage conditions. Once the sealed bag has been opened, devices should be stored in a dry nitrogen environment. • Cooling Zone: Steep thermal gradients may give rise to excessive thermal shock. However, rapid cooling promotes a finer grain structure and a more crack-resistant solder joint. The illustration below indicates the recommended soldering profile. Device Usage: Fairchild recommends the following procedures prior to assembly. Solder Joint Characteristics: Proper operation of this device depends on a reliable void-free attachment of the heat sink to the PWB. The solder joint should be 95% void-free and be a consistent thickness. – Static-dissipative floor or mat. – A properly grounded conductive wrist strap for each person to wear while handling devices. • Assemble the devices within 7 days of removal from the dry pack. Rework Considerations: Rework of a device attached to a board is limited to reflow of the solder with a heat gun. The device should be subjected to no more than 15°C above the solder melting temperature for no more than 5 seconds. No more than 2 rework operations should be performed. • During the 7-day period, the devices must be stored in an environment of less than 60% relative humidity and a maximum temperature of 30°C • If the 7-day period or the environmental conditions have been exceeded, then the dry-bake procedure, at 125°C for 24 hours minimum, must be performed. Recommended Solder Reflow Profile 260 Temperature (°C) Ramp-Up Rate 3 °C/sec max Peak temp 260 +0/-5 °C 10 - 20 sec 217 200 Time above liquidus temp 60 - 150 sec 150 Preheat, 150 to 200 °C 60 - 180 sec 100 Ramp-Up Rate 3 °C/sec max Ramp-Down Rate 6 °C/sec max 50 25 Time 25 °C/sec to peak temp 6 minutes max Time (Sec) 6 RMPA1963 i-Lo™ Rev. H www.fairchildsemi.com iL o ™ US-PCS CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) • Cleanliness: Observe proper handling procedures to ensure clean devices and PCBs. Devices should remain in their original packaging until component placement to ensure no contamination or damage to RF, DC and ground contact areas. RMPA1963 Applications Information The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ Across the board. Around the world.™ OPTOLOGIC OPTOPLANAR™ The Power Franchise PACMAN™ Programmable Active Droop™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET UniFET™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I15 7 RMPA1963 i-Lo™ Rev. H www.fairchildsemi.com iL o ™ US-PCS CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ RMPA1963 TRADEMARKS