SEMICONDUCTOR TECHNICAL DATA L SUFFIX CERAMIC CASE 620 The MC14528B is a dual, retriggerable, resettable monostable multivibrator. It may be triggered from either edge of an input pulse, and produces an output pulse over a wide range of widths, the duration of which is determined by the external timing components, CX and RX. • Separate Reset Available • Diode Protection on All Inputs • Triggerable from Leading or Trailing Edge Pulse • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range • Pin–for–Pin Replacement with the MC14538B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol VDD Parameter DC Supply Voltage Value Unit – 0.5 to + 18.0 V Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V Iin, Iout Input or Output Current (DC or Transient), per Pin ± 10 mA PD Power Dissipation, per Package† 500 mW Tstg Storage Temperature – 65 to + 150 _C 260 _C TL Lead Temperature (8–Second Soldering) * Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B ORDERING INFORMATION MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC TA = – 55° to 125°C for all packages. BLOCK DIAGRAM CX1 1 RX1 VDD 2 6 4 A1 5 B1 7 Q1 Q1 ONE–SHOT SELECTION GUIDE 100 ns 1 ms 10 ms 100 ms 1 ms 10 ms 100 ms MC14528B MC14536B MC14538B MC14541B 1s RESET 1 10 s 3 CX2 23 HR RX2 VDD 5 MIN. 15 MC4538A* *LIMITED OPERATING VOLTAGE (2–6 V) TOTAL OUTPUT PULSE WIDTH RANGE RECOMMENDED PULSE WIDTH RANGE 12 A2 11 B2 RESET 2 14 10 9 Q2 Q2 13 VDD = PIN 16 VSS = PIN 1, PIN 8, PIN 15 RX AND CX ARE EXTERNAL COMPONENTS REV 3 1/94 MOTOROLA Motorola, Inc. 1995 CMOS LOGIC DATA MC14528B 1 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Characteristic Output Voltage Vin = VDD or 0 Symbol – 55_C 25_C 125_C VDD Vdc Min Max Min Typ # Max Min Max Unit “0” Level VOL 5.0 10 15 — — — 0.05 0.05 0.05 — — — 0 0 0 0.05 0.05 0.05 — — — 0.05 0.05 0.05 Vdc “1” Level VOH 5.0 10 15 4.95 9.95 14.95 — — — 4.95 9.95 14.95 5.0 10 15 — — — 4.95 9.95 14.95 — — — Vdc 5.0 10 15 — — — 1.5 3.0 4.0 — — — 2.25 4.50 6.75 1.5 3.0 4.0 — — — 1.5 3.0 4.0 5.0 10 15 3.5 7.0 11 — — — 3.5 7.0 11 2.75 5.50 8.25 — — — 3.5 7.0 11 — — — 5.0 5.0 10 15 – 1.2 – 0.64 – 1.6 – 4.2 — — — — – 1.0 – 0.51 – 1.3 – 3.4 – 1.7 – 0.88 – 2.25 – 8.8 — — — — – 0.7 – 0.36 – 0.9 – 2.4 — — — — 5.0 10 15 0.64 1.6 4.2 — — — 0.51 1.3 3.4 0.88 2.25 8.8 — — — 0.36 0.9 2.4 — — — mAdc IOL Input Current Iin 15 — ± 0.1 — ± 0.00001 ± 0.1 — ± 1.0 µAdc Input Capacitance (Vin = 0) Cin — — — — 5.0 7.5 — — pF Quiescent Current (Per Package) IDD 5.0 10 15 — — — 5.0 10 20 — — — 0.005 0.010 0.015 5.0 10 20 — — — 150 300 600 µAdc IT — Vin = 0 or VDD Input Voltage “0” Level (VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc) VIL “1” Level VIH (VO = 0.5 or 4.5 Vdc) (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc) Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Vdc Vdc mAdc Source IOH Sink **Total Supply Current at an external load Capacitance (CL) and at external timing capacitance (CX), use the formula — µAdc IT(CL, CX) = [(CL + 0.36CX)VDDf + 2x10–8 RXCX(VDD–2)2f] x 10–3 where: IT in µA (per circuit), CL and CX in pF, RX in megohms, VDD in Vdc, f in kHz is input frequency. #Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. ** The formulas given are for the typical characteristics only at 25_C. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. MC14528B 2 PIN ASSIGNMENT VSS 1 16 VDD CX1/RX1 2 15 VSS RESET 1 3 14 CX2/RX2 A1 4 13 RESET 2 B1 5 12 A2 Q1 6 11 B2 Q1 7 10 Q2 VSS 8 9 Q2 MOTOROLA CMOS LOGIC DATA SWITCHING CHARACTERISTICS** (CL = 50 pF, TA = 25_C) Symbol Characteristic CX pF RX kΩ — VDD Vdc Min Typ # Max 5.0 10 15 — — — 100 50 40 200 100 80 5.0 10 15 — — — 325 120 90 650 240 180 5.0 10 15 — — — 705 290 210 — — — Unit Output Rise and Fall Time tTLH, tTHL = (1.5 ns/pF) CL + 25 ns tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns tTLH, tTHL — Turn–Off, Turn–On Delay Time — A or B to Q or Q tPLH, tPHL = (1.7 ns/pF) CL + 240 ns tPLH, tPHL = (0.66 ns/pF) CL + 87 ns tPLH, tPHL = (0.5 ns/pF) CL + 65 ns tPLH, tPHL 15 Turn–Off, Turn–On Delay Time — A or B to Q or Q tPLH, tPHL = (1.7 ns/pF) CL + 620 ns tPLH, tPHL = (0.66 ns/pF) CL + 257 ns tPLH, tPHL = (0.5 ns/pF) CL + 185 ns tPLH, tPHL 1000 Input Pulse Width — A or B tWH 15 5.0 5.0 10 15 150 75 55 70 30 30 — — — ns tWL 1000 10 5.0 10 15 — — — 70 30 30 — — — ns Output Pulse Width — Q or Q (For CX < 0.01 µF use graph for appropriate VDD level.) tW 15 5.0 5.0 10 15 — — — 550 350 300 — — — ns Output Pulse Width — Q or Q (For CX > 0.01 µF use formula: tW = 0.2 RX CX Ln [VDD – VSS])† tW 10,000 10 5.0 10 15 15 10 15 30 50 55 45 90 95 µs Pulse Width Match between Circuits in the same package t1 – t2 10,000 10 5.0 10 15 — — — 6.0 8.0 8.0 25 35 35 % Reset Propagation Delay — Reset to Q or Q tPLH, tPHL 15 5.0 5.0 10 15 — — — 325 90 60 600 225 170 ns 1000 10 5.0 10 15 — — — 1000 300 250 — — — ns 15 5.0 5.0 10 15 0 0 0 — — — — — — ns 1000 10 5.0 10 15 0 0 0 — — — — — — ns — — — 5.0 — 1000 kΩ Retrigger Time trr External Timing Resistance RX ns 5.0 ns 10 ns External Timing Capacitance CX — — — No Limits* † RX is in Ohms, CX is in farads, VDD and VSS in volts, PWout in seconds. * If CX > 15 µF, Use Discharge Protection Diode DX, per Fig. 9. ** The formulas given are for the typical characteristics only at 25_C. #Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. µF FUNCTION TABLE Inputs Reset A H H L H H H H H L MOTOROLA CMOS LOGIC DATA Outputs B Q Q H L Not Triggered Not Triggered L, H, L H L, H, Not Triggered Not Triggered X X X X L H Not Triggered MC14528B 3 VDD 16 VDD 16 IOL A A OPEN Q B Q RESET IOH VSS 8 VOL B VOH RESET Q 8 Figure 1. Output Source Current Test Circuit OPEN Q VSS Figure 2. Output Sink Current Test Circuit VDD 500 pF 0.1 mF CERAMIC ID RX′ CX′ RX CX 20 ns Vin 20 ns VDD 90% A CL RESET 10% Vin Q B DUTY CYCLE = 50% Q A′ Q′ B′ Q′ 0V CL CL CL RESET′ VSS ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Figure 3. Power Dissipation Test Circuit and Waveforms VDD RX RX′ CX′ CX PULSE GENERATOR *CX = 15 pF *CL = 15 pF RX = 5.0 kW INPUT CONNECTIONS A Q B Characteristics Reset A B tPLH, tPHL, tTLH, tTHL tW VDD PG1 VDD tPLH, tPHL, tTLH, tTHL tW VDD VSS PG2 tPLH(R), tPHL(R), tW PG3 PG1 PG2 CL PULSE GENERATOR RESET Q A′ Q′ CL CL PULSE GENERATOR B′ Q′ CL RESET′ VSS * Includes capacitance of probes, wiring, and fixture parasitic. PG1 = NOTE: AC test waveforms for PG1, PG2, and PG3 on next page. PG2 = PG3 = Figure 4. AC Test Circuit MC14528B 4 MOTOROLA CMOS LOGIC DATA 90% 10% tTHL 50% A tTLH tWH tTHL B VDD 50% VSS tTLH VDD 90% 10% 50% VSS tWL tTHL RESET 90% 10% tTHL tPLH tW 50% 50% 50% Q tPHL tTLH VDD 50% VSS tWL tTLH 90% 10% tTLH trr tPHL 50% VOL tTHL tPHL VOH tPHL Q 50% 50% VOH 90% 10% 50% 50% VOL Figure 5. AC Test Waveforms t W, PULSE WIDTH ( m s) 1000 VDD = 15 V 15 V 10 V 5.0 V 10 V 5.0 V 100 RX = 100 kW 15 V 10 V 5.0 V 10 RX = 10 kW RX = 5.0 kW 1.0 0.1 15 V 10 V 5.0 V 10 100 1000 10,000 100,000 CX, EXTERNAL CAPACITANCE (pF) Figure 6. Pulse Width versus CX MOTOROLA CMOS LOGIC DATA MC14528B 5 TYPICAL APPLICATIONS Cx Cx Rx Rx VDD VDD RISING EDGE TRIGGER A Q B Q RESET VDD RISING EDGE TRIGGER A Q B Q RESET VDD VDD Cx Cx Rx Rx VDD VDD FALLING EDGE TRIGGER A Q B Q RESET FALLING EDGE TRIGGER A Q B Q RESET VDD VDD Figure 7. Retriggerable Monostables Circuitry Figure 8. Non–Retriggerable Monostables Circuitry DX Cx VDD NC 1, 15 Rx 2, 14 VDD Q NC Q RESET NC A Q B VDD Q RESET VDD Figure 9. Use of a Diode to Limit Power Down Current Surge MC14528B 6 VDD VDD Figure 10. Connection of Unused Sections MOTOROLA CMOS LOGIC DATA OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620–10 ISSUE V –A– 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. –B– C L DIM A B C D E F G H K L M N –T– K N SEATING PLANE M E F J G D 16 PL 0.25 (0.010) 16 PL 0.25 (0.010) M T A T B M S INCHES MIN MAX 0.750 0.785 0.240 0.295 ––– 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 ––– 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 S P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. –A– 16 9 1 8 B F C L S –T– SEATING PLANE K H G D J 16 PL 0.25 (0.010) MOTOROLA CMOS LOGIC DATA M T A M M DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 MC14528B 7 OUTLINE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE J –A– 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 –B– 1 P 8 PL 0.25 (0.010) 8 M B S G R K F X 45 _ C –T– SEATING PLANE M D 16 PL 0.25 (0.010) M T B S A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 Motorola reserves the right to make changes without further notice to any products herein. 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How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 MC14528B 8 ◊ *MC14528B/D* MOTOROLA CMOS LOGIC DATA MC14528B/D