FAIRCHILD 74F139_00

Revised September 2000
74F139
Dual 1-of-4 Decoder/Demultiplexer
General Description
Features
The F139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each
accepting two inputs and providing four mutually exclusive
active LOW outputs. Each decoder has an active LOW
Enable input which can be used as a data input for a
4-output demultiplexer. Each half of the F139 can be used
as a function generator providing all four minterms of two
variables.
■ Multifunction capability
■ Two completely independent 1-of-4 decoders
■ Active LOW mutually exclusive outputs
Ordering Code:
Order Number
Package Number
Package Description
74F139SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F139SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F139PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
Truth Table
Inputs
Outputs
IEEE/IEC
E
A0
A1
O0
O1
O2
O3
H
X
X
H
H
H
H
L
L
L
L
H
H
H
L
H
L
H
L
H
H
L
L
H
H
H
L
H
L
H
H
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
© 2000 Fairchild Semiconductor Corporation
DS009479
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74F139 Dual 1-of-4 Decoder/Demultiplexer
April 1988
74F139
Unit Loading/Fan Out
U.L.
Pin Names
Description
Input IIH/IIL
HIGH/LOW Output IOH/IOL
A0 , A1
Address Inputs
1.0/1.0
20 µA/−0.6 mA
E
Enable Inputs (Active LOW)
1.0/1.0
20 µA/−0.6 mA
O0–O3
Outputs (Active LOW)
50/33.3
−1 mA/20 mA
Functional Description
The F139 is a high-speed dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each of
which accepts two binary weighted inputs (A0–A1) and provides four mutually exclusive active LOW Outputs (O0–O3).
Each decoder has an active LOW enable (E). When E is
HIGH all outputs are forced HIGH. The enable can be used
as the data input for a 4-output demultiplexer application.
Each half of the F139 generates all four minterms of two
variables. These four minterms are useful in some applications, replacing multiple gate functions as shown in
Figure 1, and thereby reducing the number of packages
required in a logic network.
FIGURE 1. Gate Functions (each half)
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Free Air Ambient Temperature
Junction Temperature under Bias
−55°C to +150°C
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
3 STATE Output
−0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Current Applied to Output
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
in LOW State (Max)
twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
4000V
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
2.0
Units
VCC
Conditions
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
0.8
V
VCD
Input Clamp Diode Voltage
−1.2
V
Min
VOH
Output HIGH Voltage
V
Min
0.5
V
Min
IOL = 20 mA
10% VCC
2.5
5% VCC
2.7
V
Recognized as a HIGH Signal
Recognized as a LOW Signal
IIN = −18 mA
IOH = −1 mA
IOH = −1 mA
VOL
Output LOW Voltage
IIH
Input HIGH Current
5.0
µA
Max
VIN = 2.7V
IBVI
Input HIGH Current Breakdown Test
7.0
µA
Max
VIN = 7.0V
ICEX
Output HIGH Leakage Current
50
µA
Max
VOUT = VCC
VID
Input Leakage Test
V
0.0
3.75
µA
0.0
−0.6
mA
Max
VIN = 0.5V
−150
mA
Max
VOUT = 0V
20
mA
Max
10% VCC
4.75
IOD
Output Leakage Circuit Current
IIL
Input LOW Current
IOS
Output Short-Circuit Current
ICC
Power Supply Current
−60
13
IID = 1.9 µA
All Other Pins Grounded
VIOD = 150 mV
All Other Pins Grounded
AC Electrical Characteristics
Symbol
Parameter
TA = +25°C
TA = 0°C to +70°C
VCC = +5.0V
VCC = +5.0V
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
3.5
5.3
7.5
3.0
8.5
tPHL
A0 or A1 to On
4.0
6.1
8.0
4.0
9.0
tPLH
Propagation Delay
3.5
5.4
7.0
3.5
8.0
tPHL
E1 to On
3.0
4.7
6.5
3.0
7.5
3
Units
ns
ns
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74F139
Absolute Maximum Ratings(Note 1)
74F139
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
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74F139
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
5
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74F139 Dual 1-of-4 Decoder/Demultiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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