Revised September 2000 74F280 9-Bit Parity Generator/Checker General Description The F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output. Ordering Code: Order Number Package Number Package Description 74F280SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F280SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F280PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 Fairchild Semiconductor Corporation DS009512 www.fairchildsemi.com 74F280 9-Bit Parity Generator/Checker April 1988 74F280 Unit Loading/Fan Out Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL Data Inputs 1.0/1.0 20 µA/−0.6 mA ∑O Odd Parity Output 50/33.3 −1 mA/20 mA ∑E Even Parity Output 50/33.3 −1 mA/20 mA I0–I8 Truth Table Number of HIGH Inputs I0–I8 Outputs ∑ Even ∑ Odd 0, 2, 4, 6, 8 H L 1, 3, 5, 7, 9 L H H = HIGH Voltage Level L = LOW Voltage Level Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output in LOW State (Max) Note 2: Either voltage limit or current limit is sufficient to protect inputs. twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V DC Electrical Characteristics Symbol Parameter Min Typ Max VCC Units Input HIGH Voltage VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA V Min IOH = −1 mA 0.5 V Min IOL = 20 mA 5.0 µA Max VIN = 2.7V 7.0 µA Max VIN = 7.0V 50 µA Max VOUT = VCC V 0.0 3.75 µA 0.0 −0.6 mA Max −150 mA Max VOUT = 0V 38 mA Max VO = HIGH VOH Output HIGH Voltage VOL Output LOW Voltage IIH Input HIGH 2.0 10% VCC 2.5 5% VCC 2.7 V Conditions VIH Input HIGH Current Breakdown Test ICEX Output HIGH Leakage Current VID Input Leakage 4.75 Test IOD Output Leakage Circuit Current IIL Input LOW Current IOS Output Short-Circuit Current ICCH Power Supply Current Recognized as a LOW Signal IOH = −1 mA 10% VCC Current IBVI Recognized as a HIGH Signal −60 25 IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V AC Electrical Characteristics Symbol Parameter TA = +25°C TA = −55°C to +125°C TA = 0°C to +70°C VCC = +5.0V VCC = 5.0V VCC = 5.0V CL = 50 pF CL = 50 pF CL = 50 pF Min Typ Max Min Max Min Max tPLH Propagation Delay 6.5 10.0 15.0 6.5 20.0 6.5 16.0 tPHL In to ∑E 6.5 11.0 16.0 6.5 21.0 6.5 17.0 tPLH Propagation Delay 6.0 10.0 15.0 5.0 20.0 6.0 16.0 tPHL In to ∑O 6.5 11.0 16.0 6.5 21.0 6.5 17.0 3 Units ns ns www.fairchildsemi.com 74F280 Absolute Maximum Ratings(Note 1) 74F280 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A www.fairchildsemi.com 4 74F280 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com 74F280 9-Bit Parity Generator/Checker Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6