MOTOROLA PC33094DW

Freescale Semiconductor, Inc.
Order Number: MC33094/D
Rev. 0, 06/2001
SEMICONDUCTOR TECHNICAL DATA
Freescale Semiconductor, Inc...
Designed for automotive ignition applications in 12 V systems, the
MC33094DW provides outstanding control of the ignition coil when used
with an appropriate Motorola Power Darlington Transistor. Engine control
systems utilizing these devices for ignition coil control exhibit exceptional
fuel efficiency and low exhaust emissions. The device is designed to be
controlled from a single–ended Hall Sensor input. The circuit is built using
high–density Integrated–Injection Logic (IIL) processing incorporating high
current–gain PNP and NPN transistors.
The MC33094DW is packaged in an economical surface mount package
and specified over an ambient temperature of –40°C to 125°C with a
maximum junction temperature of 150°C.
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IGNITION CONTROL
SEMICONDUCTOR
TECHNICAL DATA
External Capacitors Program the Devices Timing Characteristics
Overvoltage Shutdown Protection
Auto Start–Up Capability After Overvoltage Condition Ceases
Allows for Push Start–Up in Automotive Applications
Ignition Coil Current Limiting
16
Ignition Coil Voltage Limiting
1
Band Gap Reference for Enhanced Stability Over Temperature
Negative Edge Filter for Hall Sensor Input Transient Protection
DW SUFFIX
PLASTIC PACKAGE
CASE 751G
(SO–16L)
Hall Sensor Inputs for RPM and Position Sensing
–40°C ≤ TA ≤ 125°C Ambient Operating Temperature
PIN CONNECTIONS
MAXIMUM RATINGS (All voltages are with respect to ground, unless
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otherwise noted.)
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
28.6
V
Junction Temperature
TJ
150
°C
Operating Ambient Temperature
Continuous
Limited
TA
Storage Temperature
Tstg
–55 to 150
°C
Operating Frequency Range
fop
1.0 to 400
Hz
Soldering Temperature
SO–16L (for 10 seconds)
Tsolder
270
°C
Thermal Resistance
Junction–to–Ambient (SO–16L)
NOTE:
°C
–30 to 105
–40 to 125
RθJA
97
°C/W
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ORDERING INFORMATION
Operating
Temperature Range
Package
PC33094DW TA = –40° to +125°C
SO–16L
Device
This document contains information on a new product. Specifications
and information herein are subject to change without notice.
ANALOG
DEVICE For
DATAMore Information On This Product,
MOTOROLA
Motorola, Inc. 2001.
All rights IC
reserved.
Go to: www.freescale.com
1
Freescale Semiconductor,
Inc.
MC33094
Simplified Ignition Circuit
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ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 6.0 V ≤ VD = VCC ≤ 16 V,
–40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values are specified for TA = 25°C.)
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Symbol
Min
Typ
Max
Unit
ICC
5.0
8.4
18
mA
Overvoltage Shutdown (Vin(–) = 0 V, VCA = VCR = Open,
VCS = 3.0 V, VST = 28 V) (Note 2)
VCC3
23.7
27.5
31
V
Start–VCC Latch (Vin(–) = 0 V, VCA = VCR = VCS = Open,
VST = 25 V, VD = 14 V, IST = 40 mA)
VCC5
8.0
16.1
–
V
Characteristic
SUPPLY AND MASTER BIAS
Supply Current (VCC = 16 V, Vin(–) = 0 V, VD = 3.0 V,
VCA = VCR = VCS = VST = Open) (Note 1)
Adaptive Dwell High Supply Voltage (Vin(–) = 11 V, VCA = Open,
VCR = 3.0 V, VCS = 3.0 V, VST = 6.0 V, VD = 13 V)
Threshold (Note 3)
Hysteresis (Note 4)
Master Bias Voltage (VCC = 16 V, Vin(–) = 0 V, VD = 3.0 V,
VCA = VCR = VCS = VST = Open) (Note 5)
V
VCC1
VCC2(hys)
16.5
0.2
18.9
0.5
19.5
0.8
VMB
1.12
1.2
1.32
V
NOTES: 1. Current sourced into Supply pin.
2. Ramp up VCC from 24 to 31 V in 0.1 V increments and note the supply voltage, VCC, which causes VO to fall below 1.0 V.
3. Ramp up VCC from 14 to 20 V in 0.1 V increments and measure VCC when ICA ≤ 2.0 µA.
4. Ramp up VCC from 20 to 14 V and measure VCC when ICA ≥ 2.0 µA and compute hysteresis difference from VCC1.
5. Voltage measured at Master Bias pin.
2
MOTOROLA ANALOG IC DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor,
Inc.
MC33094
ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 6.0 V ≤ VD = VCC ≤ 16 V,
–40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values are specified for TA = 25°C.)
Symbol
Min
Typ
Max
Unit
Input Positive Threshold Voltage (VCC = 6.0 V, VCA = VCR = Open,
VCS = 1.0 V, VST = 6.0 V) (Note 1)
Vin(–)(th)A
50
54
65
%VCC
Input Positive Threshold Voltage (VCC = 16 V, VCA = VCR = Open,
VCS = 1.0 V, VST = 10 V) (Note 2)
Vin(–)(th)B
50
54
65
%VCC
Input Hysteresis (VCC = 6.0 V, VCA = VCR = VCS = Open,
VST = 6.0 V) (Note 3)
Vin(–)(hys)A
0.6
0.72
1.2
V
Input Hysteresis (VCC = 16 V, VD = 3.0 V,
VCA = VCR = VCS = Open, VST = 10 V) (Note 4)
Vin(–)(hys)B
1.6
2.23
3.2
V
ZI
70
94
250
kΩ
Characteristic
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INPUTS
Freescale Semiconductor, Inc...
Input Impedance (VCC = 14 V , Vin(–) = 10 V , VD = 3.0 V,
VCA = VCR = VCS = VST = Open) (Note 5)
NOTES: 1. Ramp up Vin(–) from 1.0 to 5.0 V in 0.1 V increments. Record Vin(–) when ICR goes positive and convert to % of VCC by dividing by VCC.
2. Ramp up Vin(–) from 3.0 to 10 V in 0.1 V increments. Record Vin(–) when ICR goes positive and convert to % of VCC by dividing by VCC.
3. Ramp up Vin(–) from Vin(–)(th)A in 0.01 V increments. Record Vin(–) when ICA goes positive. Vin(–)(hys)A = Vin(–)(th)A – (Vin(–)).
4. Ramp up Vin(–) from Vin(–)(th)B in 0.01 V increments. Record Vin(–) when ICA goes positive. Vin(–)(hys)B = Vin(–)(th)B – (Vin(–)).
5. Measure Iin(–) into Pin 7; ZI = 10 V/Iin(–).
Figure 1. Basic Timing Diagrams
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2. During start mode, stall conditions are prevented.
3. During a stall, the coil is discharged slowly and a quick charge and spark occur on the next spark command.
MOTOROLA ANALOG IC DEVICE For
DATAMore Information On This Product,
Go to: www.freescale.com
3
Freescale Semiconductor,
Inc.
MC33094
Figure 2. Test Circuit
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ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 6.0 V ≤ VD = VCC ≤ 16 V,
–40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values are specified for TA = 25°C.)
Characteristic
Symbol
Min
Typ
Max
Unit
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OUTPUT AND DWELL
Output Current (Vin(–) = 0 V, VCA = VCR = Open,
VCS = 3.0 V, VST = 10 V, VO = 2.1 V) (Note 1)
Normal Condition (VCC = 14 V, VD = 6.0 V)
High Voltage Condition (VCC = 14 V, VD = 22 V )
mA
IO1
IO2
40
40
52
55
65
65
Output Leakage Current (VCC = 14 V, Vin(–) = 10 V,
VCA = VCR = VCS = Open, VST = 10 V, VS = 0 V,
VD = 18, VO = 0 V) (Note 2)
IO3
1.0
–1.33
100
µA
Output Clamp Voltage (VCC = 14 V, Vin(–) = 10 V,
VCA = VCR = VCS = Open, VST = 10 V, VD = 14 V, VO = 0 V,
VCL = 20 V, ICL = 10 mA) (Note 3)
VCL
13.7
14.52
15.58
V
Output Clamp Dynamic Impedance (VCC = 14 V, Vin(–) = 10 V,
VCA = VCR = VCS = Open, VST = 10 V, VD = 14 V,
VO = 0 V, ICL = 12 mA, ∆ICL = 2.0 mA) (Note 4)
ZCL
10
37
75
Ω
D1
14.5
17.6
20.5
D2
4.1
5.3
5.9
Dwell (Note 5)
Normal Condition: D1 = (ICA2/ICA1) x CR
Data from ICA2, ICA1, and CR characteristics
High Voltage Condition: D2 = (ICA3/ICA1) x CR
Data from ICA3, ICA1, and CR characteristics
%
NOTES: 1. Capability measured by forcing the Output to 2.0 V with Current Sense pin (IS) open while measuring the Output current to ground.
2. Measured by clamping the output to that output voltage with IS pin to ground; then increasing V D from 6.0 to 18 V and measuring output leakage
current to ground.
3. Output Clamp voltage with reference to ground while forcing 10 mA into the Dynamic Clamp pin (CL).
4. Output Clamp impedance measured with ICL = 11 ± 1.0 mA into the Dynamic Clamp pin (CL) and noting the corresponding Output Clamp Voltage
change (ZCL = ∆VCL/∆ICL).
5. Dwell is defined as Run Mode Down Current divided by the Run Mode Up Current times the Ramp Control Current Ratio and is calculated from other
measured characteristics as defined above.
6. Set the VCR voltage to 1.5 V; Ramp VCR voltage from 1.8 to 2.2 V in 0.02 V increments and note the Ramp voltage (VCR) which causes the Output
voltage to go > 1.0 V; VCRO = 2.0 V – VCR.
4
MOTOROLA ANALOG IC DEVICE DATA
For More Information On This Product,
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Freescale Semiconductor,
Inc.
MC33094
ELECTRICAL CHARACTERISTICS (continued) (Characteristics noted under conditions 6.0 V ≤ VD = VCC ≤ 16 V,
–40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values are specified for TA = 25°C.)
Characteristic
Symbol
Min
Typ
Max
Unit
VCRO
–60
0
60
mV
VSS
0
1.48
16.7
mV
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OUTPUT AND DWELL
Adaptive Dwell Logic, Ramp Threshold (VCC= 14 V, Vin(–) = 10 V,
VCA = VCS = Open, VST = 0 V, VD = 10 V, VS = 0 V) (Note 6)
Soft Shutdown Voltage (VCC = 6.0 V, Vin(–) = 10 V,
VCA = VCR = VCS = Open, VST = 0 V) Measure VS
Freescale Semiconductor, Inc...
NOTES: 1. Capability measured by forcing the Output to 2.0 V with Current Sense pin (IS) open while measuring the Output current to ground.
2. Measured by clamping the output to that output voltage with IS pin to ground; then increasing V D from 6.0 to 18 V and measuring output leakage
current to ground.
3. Output Clamp voltage with reference to ground while forcing 10 mA into the Dynamic Clamp pin (CL).
4. Output Clamp impedance measured with ICL = 11 ± 1.0 mA into the Dynamic Clamp pin (CL) and noting the corresponding Output Clamp Voltage
change (ZCL = ∆VCL/∆ICL).
5. Dwell is defined as Run Mode Down Current divided by the Run Mode Up Current times the Ramp Control Current Ratio and is calculated from other
measured characteristics as defined above.
6. Set the VCR voltage to 1.5 V; Ramp VCR voltage from 1.8 to 2.2 V in 0.02 V increments and note the Ramp voltage (VCR) which causes the Output
voltage to go > 1.0 V; VCRO = 2.0 V – VCR.
ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 6.0 V ≤ VD = VCC ≤ 16 V,
–40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values are specified for TA = 25°C.)
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Characteristic
Symbol
Min
Typ
Max
Unit
ICA1
–7.91
–6.53
–5.62
µA
ADAPTIVE CAPACITOR
Run Mode, Adaptive Capacitor, Charge Current (VCC = 6.0 V,
Vin(–) = 5.0 V, VCA = Open, VCR = 3.0 V, VCS = 3.0 V,
VST = 6.0 V) (Note 1)
Run Mode, Adaptive Capacitor, Discharge Current
(VCA = Open, VCS = 3.0 V, VCR = 3.0 V, VST = 6.0 V)
Normal Condition (VCC = 6.0 V, Vin(–) = 10 V)
High Voltage Condition (VCC = 22 V, Vin(–) = 17 V, VD = 13 V)
Start Mode, Adaptive Capacitor Currents
(VCA = VCR = VCS = Open, VST = 10 V)
Charge Current (VCC = 5.0 V, Vin(–) = 10 V) (Note 2)
Discharge Current (VCC = 6.0 V, Vin(–) = 0 V) (Note 3)
Start Mode, Adaptive Capacitor, Clamp Voltage
(VCC = 6.0 V, VCA = VCR = VCS = Open, VST = 10 V)
High Clamp Voltage (Vin(–) =10 V)
Low Clamp Voltage (Vin(–) = 0 V)
Adaptive Gain (VCC = 14 V, Vin(–) = 11 V, VST = 6.0 V,
VCA = Open, VCR = 3.0 V, VCS = 3.0 V , VD = 13 V) (Note 4)
µA
ICA2
ICA3
3.7
1.05
4.77
1.43
5.63
1.82
µA
ICA4
ICA5
–112
67.6
–87
89.4
–80
109
V
VCA1
VCA2
2.23
0.95
2.39
1.1
2.65
1.26
AG
0.85
0.99
1.15
Times
NOTES: 1. Open VCR initially then force VCR = 3.0 V and measure ICA1.
2. Start Mode Adaptive Control sourcing current.
3. Start Mode Adaptive Control sink current.
4. Measure ICA. Calculate: AG = ICR1/ICA.
MOTOROLA ANALOG IC DEVICE For
DATAMore Information On This Product,
Go to: www.freescale.com
5
Freescale Semiconductor,
Inc.
MC33094
ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 6.0 V ≤ VD = VCC ≤ 16 V,
–40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values are specified for TA = 25°C.)
Characteristic
Symbol
Min
Typ
Max
Unit
Start Mode, Stall Control, Charge Current (VCC = 5.0 V, Vin(–) = 0 V,
VCA = VCR = Open, VCS = 1.0 V, VST = 10 V)
ICS1
–2.7
–2.33
–2.13
µA
Run Mode, Stalled, Stall Control, Discharge Current (VCC = 14 V,
Vin(–) = 0 V, VCA = VCR = Open, VCS = 1.0 V, VST = 0 V)
ICS2
7.5
9.69
13.2
µA
Run Mode, Stall Control, Charge Current (VCC = 14 V, Vin(–) = 10 V,
VCA = 2.0 V, VCR = 3.0 V, VCS = 1.0 V, VST = 0 V)
ICS3
–33.1
–27
–23.5
µA
Run Mode, Stall Control, Discharge Current (VCC = 14 V,
Vin(–) = 10 V, VCA = 2.0 V, VCR = Open, VCS = 1.0 V,
VST = 0 V, VMB = 0 V)
ICS4
0.76
1.02
1.26
µA
Stall Control Threshold Voltage (VCC = 14 V, Vin(–) = 0 V,
VCA= VCR = Open, VST = 0 V) (Note 1)
VCS1
1.95
2.06
2.45
V
Stall Control Saturation Voltage (VCC = 14 V, Vin(–) = 0 V,
VCA = VCR = VCS = Open, VST = 0 V) (Note 2)
VCS2
20
35.3
165
mV
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Freescale Semiconductor, Inc...
STALL CAPACITOR
NOTES: 1. Ramp VCS from 1.5 to 2.5 V in 20 mV steps. Record VCS when ICS goes negative.
2. Set VST = 10 V, VCS = 1.0 V, Fail if output is on.
Set VCS = 3.0 V, Fail if output is off.
ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 6.0 V ≤ VD = VCC ≤ 16 V,
–40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values are specified for TA = 25°C.)
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Characteristic
Symbol
Min
Typ
Max
Unit
CR
22
24.3
28
%
VCR(hys)
6.0
19.19
180
mV
RAMP CAPACITOR
Ramp Control Current Ratio (VCC = 14 V, Vin(–) = 0 V,
VCR = 3.0 V, VST = 0 V, VCA = VCS = Open) (Note 1)
Ramp Capacitor Reset Hysteresis (VCC = 14 V, Vin(–) = 10 V,
VCA = 2.0 V, VCS = 3.0 V, VST = 6.0 V) (Note 2)
NOTES: 1. Set VCA to 0.5 V, then open VCA. Set VCR to 0.9 V. Percent ratio of CR Up Current as compared to the CR Down Current;
(ICR1/(ICR1 – ICR2) x 100).
2. Open VCR, Force VCR = 1.3 V. Ramp VCR down in 3.0 mV steps until ICR goes negative, VCR1. Ramp VCR up in 3.0 mV steps, toggle input
between steps, until ICR goes positive, VCR2. VCR(hys) = VCR2 – VCR1.
ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 6.0 V ≤ VD = VCC ≤ 16 V,
–40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values are specified for TA = 25°C.)
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Characteristic
Symbol
Min
Typ
Max
Unit
Negative Edge Filter, Falling Edge Time Constant (VCC = 16 V,
Vin(–) = 0 V, VCA = VCR = VCS = Open, VST = 10 V) (Note 1)
t1
400
613.65
1000
µs
Propagation Delay Time (VCC = 14 V, Vin(–) = 10 V,
VCA = VCS = Open, VCR = 3.0 V, VST = 0 V) (Note 2)
t2
0
3.45
15
µs
Start Delay, Positive Edge
(Data from ICA4, VCA1, VCA2) (Note 3)
tsdp
1.15
1.46
1.71
ms
Start Delay, Negative Edge
(Data from tests VCA1, ICA5, VCA2, t1) (Note 4)
tsdn
1.19
2.06
2.8
ms
Start to Output Disable Time (Note 5)
tsod
71
87
107
ms
Stall to Spark Output Propagation Delay
(Data from tests ICS3, VCS1, VCS2) (Note 6)
tssd
4.6
7.48
8.8
ms
TIMING
NOTES: 1. Measure time until VO > 0.2 V. The Negative Edge Filter prevents multiple output sparks caused by switching transients present at the input by
disabling the once used input for the filter time t.
2. Propagation delay time measurement of input to output response; Step change Vin(–) from 0 to 10 V. Measure the time required for
VO < 1.5 V.
3. tsdp = (VCA1 – VCA2) x CA/ICA4; CA = 0.1 µF.
4. tsdn = [(VCA1 – VCA2) x CA/ICA5] + t1; CA = 0.1 µF.
5. tsod = (VCS1 – VCS2) x CS/ICS1; CS = 0.1 µF.
6. tssd = (VCS1 – VCS2) x CS/ICS3; CS = 0.1 µF.
7. tsst = (VCS1 – VCS2) x CS/ICS2; CS = 0.1 µF.
8. fss = 1/[(5.4/Vin(+)(th)) + (4.3/ICS4) + (2/ICS2)] x CS; CS = 0.1 µF.
9. tbit = [(VCS – 0.7 V)/ICS1] x CS; CS 0.1 µF.
6
MOTOROLA ANALOG IC DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor,
Inc.
MC33094
ELECTRICAL CHARACTERISTICS (continued) (Characteristics noted under conditions 6.0 V ≤ VD = VCC ≤ 16 V,
–40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values are specified for TA = 25°C.)
Characteristic
Symbol
Min
Typ
Max
Unit
tsst
13.6
20.9
26.5
ms
Stall Frequency (Note 8)
fs
1.69
2.26
2.8
Hz
Battery Interrupt Time (VCC = Vin(–) = VST = 0 V,
VCA = VCR = Open, VCS = 6.0 V) (Note 9)
tbit
25
66.65
200
ms
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TIMING
Figure 3. Input Positive Threshold Voltage
versus Temperature
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NOTES: 1. Measure time until VO > 0.2 V. The Negative Edge Filter prevents multiple output sparks caused by switching transients present at the input by
disabling the once used input for the filter time t.
2. Propagation delay time measurement of input to output response; Step change Vin(–) from 0 to 10 V. Measure the time required for
VO < 1.5 V.
3. tsdp = (VCA1 – VCA2) x CA/ICA4; CA = 0.1 µF.
4. tsdn = [(VCA1 – VCA2) x CA/ICA5] + t1; CA = 0.1 µF.
5. tsod = (VCS1 – VCS2) x CS/ICS1; CS = 0.1 µF.
6. tssd = (VCS1 – VCS2) x CS/ICS3; CS = 0.1 µF.
7. tsst = (VCS1 – VCS2) x CS/ICS2; CS = 0.1 µF.
8. fss = 1/[(5.4/Vin(+)(th)) + (4.3/ICS4) + (2/ICS2)] x CS; CS = 0.1 µF.
9. tbit = [(VCS – 0.7 V)/ICS1] x CS; CS 0.1 µF.
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Figure 4. Input Negative Threshold Voltage
versus Temperature
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Figure 5. Output Current Change
versus Temperature
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Figure 6. Input Impedance versus Temperature
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Stall Shutdown Time
(Data from ICS2, VCS1, VCS2) (Note 7)
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MOTOROLA ANALOG IC DEVICE For
DATAMore Information On This Product,
Go to: www.freescale.com
7
Freescale Semiconductor,
Inc.
MC33094
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Figure 7. Output Clamp Voltage
versus Temperature
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versus Temperature
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Figure 9. Supply Drain Current
versus Temperature
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Block Diagram Description (Figure 10)
The Band–Gap Reference generates a nominal 1.2 V
having very good stability with temperature variations. The
Band–Gap Reference conceptually provides a low
temperature drift voltage by summing a strongly negative
Temperature Coefficient (TC) voltage with an equally strong
positive TC voltage. The negative TC voltage element is a
result of a transistor emitter–to–base voltage while the
positive TC voltage is developed as a result of a positive TC
current imposed across a resistor. The positive TC current
relies on the matching of currents in different sizes of
transistors. The result is a very stable reference voltage
independent of temperature variations. The Band–Gap
Reference voltage provides a thermally stable voltage
reference for critically sensitive circuits within the IC. It also
sets the master bias current for all precision currents on the IC.
The Vr Zener Reference block contains a 6.75 V zener
regulator, which also exhibits a very low temperature
coefficient.
The VCC Comparator and Clamp block limits the VCC
voltage to one Vbe plus three zener drops in addition to
comparing the VCC voltage to 15 and 22 V. When the VCC
voltage is greater than either of these two values, the IC
changes the adaptive capacitor discharge rate and when
above 22 V the IC forces the coil current to shutdown. The
8
minimum VCC value the IC will operate at is 4.0 V and Vbat of
5.0 V. Below 7.5 V, the Vr reference is no longer maintained,
and the IC consumes excess power and excess voltage is
dropped in the external VCC resistor.
The Master Bias Current Reference block generates
precise currents used throughout the IC. The MB pin is held
at 1.2 V by a differential amplifier with feedback. Capacitive
loading on the MB pin reduces the effectiveness of the
internal dominant pole, and loading as modest as 200 pF
may cause the differential amplifier to oscillate.
The Input Voltage Comparator block requires an input
signal between ground and Vbat and detects the swing in the
input signal. The thresholds for the input comparator are
approximately 56.2% of Vbat for rising signals and 36% of
Vbat for falling signals. The input signal may come from a Hall
effect sensor or reluctor sensor on the distributor.
The Negative Edge Filter block is an inverting buffer for the
signal from the Input Voltage Comparator and has a time
constant of approximately 0.1 µs for rising edges and 500 µs
for falling edges.
The Adaptive Capacitor Charging and Sensing block
charges, discharges, and senses the adaptive capacitor
voltage. The adaptive capacitor has a single charge rate of
8.4 µA and two discharge rates. The 1.688 µA slow discharge
rate is used only during very high VCC operation and
MOTOROLA ANALOG IC DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
represents an effort to reduce excess dwell and therefore
power dissipation during high voltage operation. The 5.88 µA
discharge rate is used under normal VCC operating
conditions. Under a start mode, this block will discharge the
adaptive capacitor forcing an enhanced start mode dwell.
The start/run modes are set internally by detecting the engine
frequency, which corresponds to the ramp capacitor voltage.
The Stall Capacitor Charging and Sensing block controls
the charging and discharging rates of the stall capacitor. The
charging rate is 31.5 µA, and the two discharging rates are
1.0 µA and 7.0 µA. The stall capacitor potential commands
the IC to maintain or reduce the coil current. When the engine
is turning very slowly (or stalled), the stall capacitor will have
enough time to discharge below threshold and thereby
reduce coil current. The output current limiter (see Output
Current Driver and Limiter block description below) forces the
coil current to be proportional to the stall capacitor voltage
when the stall capacitor voltage is less than 2.0 V.
The Ramp Capacitor Charging and Sensing block charges
the ramp capacitor at approximately 8.4 µA and discharges it
at about 33.6 µA. The charging circuit is always on and
sources current during the “not 25%” part of the engine cycle.
The discharging circuit is only on and sinking current during
the “25%” part of the engine cycle. The positive edge of the
distributor input signal sets the 25% mode, and the ramp
comparator output clears this mode.
The CR > CA Adaptive Comparator block signals the point
where the ramp capacitor voltage is greater than the adaptive
capacitor voltage. The point at which the two capacitor
voltages are equal is the point where charging of the coil is
begun. The adaptive algorithm used in the IC maintains the
required excess dwell throughout all reasonable
accelerations and decelerations without causing excess coil
power dissipation, in addition, it insures that more than
adequate spark energy is available for very high engine
speeds, when excess dwell is impossible.
The Output Current Driver and Limiter block sources a
limited supply current of about 50 mA to the base of the
Darlington power transistor. The Darlington will cause the
coil to conduct to about 6.5 amps and the voltage drop on
the IS pin of the IC will rise to the threshold of the current
limiter. The current limiter will then hold the coil current at that
level until either a spark is commanded by the logic block, or
the engine begins to stall (causing the coil to slowly
discharge).
The Internal Logic block performs the required memory
and gating functions on the IC to implement the adaptive
ignition control algorithm.
Figure 10. Block Diagram
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MC33094
Figure 11. Typical Ignition Circuit
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Introduction
The MC33094DW is designed for engine compartment
use in 12 V automotive ignition applications to provide high
performance control of the ignition coil when used with an
appropriate Motorola Power Darlington Transistor. Engine
control systems utilizing these devices for ignition coil control
exhibit superior fuel efficiency and lower exhaust emissions
over predecessor systems. The device is designed for single
input control from a Hall sensor to determine crankshaft
position.
The device, a bipolar linear integrated circuit, is built using
high–density Integrated–Injection Logic (IIL) processing
incorporating high current–gain PNP and NPN transistors. All
module inputs are transient voltage protected through the
use of resistors, capacitors, and/or zener diodes working in
conjunction with internal protection elements. These
elements provide protection of critical circuitry from externally
induced high–voltage transients which may degrade the
devices operational performance. At the module level, it is
recommended the VCC pin of the device be transient
decoupled using an external resistor and capacitor to work in
conjunction with the on–chip internal zener string to provide
robust module protection of the device power pin. The D input
of module should be protected from transients through the
use of an external resistor and zener diode. The Start Wire of
the module should be decoupled through the use of two
resistors and a capacitor to work in conjunction with the
on–chip internal clamp (Figure 11).
The output of the device incorporates a high current–gain
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PNP designed to drive an external power Darlington
transistor to provide control of the ignition coil. The output
drive is carefully synchronized with the output from the
distributor. The charging and discharging of three capacitors,
external to the device, provide timing signals which program
the dwell and charge time control of the ignition coil over a
wide rpm range.
The timing and charge/discharge rates of the three
external capacitors are accurately controlled by internal
circuitry acted upon by sensor and distributor signal detection
of the device.
A feedback path from the emitter of the external power
Darlington transistor to the device provide monitoring of the
ignition coil current. An internal comparitor of the device
senses and limits the maximum ignition coil current to
approximately 6.5 amps. Other circuitry within the device
provides an interruption of the coil current so as to generate
the spark, or slowly discharges the coil in a controlled
manner so as to prevent a spark and limit the total module
energy dissipation.
When the external Darlington is switched off, the
Darlington collector will instantly experience a dramatic
increase in voltage as a result of the collapsing field of the
ignition coil (inductive kick). The external voltage divider
working in conjunction with the internal device zener string
and power PNP form a dynamic clamp which limits the
inductive kick voltage to less than 350 V. This feature
protects the Darlington transistor from damaging stress or
breakdown.
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Ignition Circuit Operation Description
When initially powered up, all module capacitors start
discharged (0 V). The VCC capacitor will power up first, and
the IC’s internal logic latches are indeterminate. The
following conditions will hold: STALL = 1, because the stall
capacitor voltage is less than 2.0 V; 25% = 0, because the
ramp capacitor is less than the Band Gap Reference voltage
(Vbg); and Icoil = 0 amps, because the stall capacitor is at 0 V.
Because 25% = 0, the ramp capacitor charges towards Vr.
At cranking frequencies, the ramp capacitor always exceeds
the start mode threshold at the input (ZC), and therefore the
stall signal resets the start mode latch upon the first ac signal
(this causes the adaptive capacitor to be discharged). With
the adaptive capacitor held low, very high rates of
acceleration are possible. If the adaptive capacitor were
allowed to adapt the dwell at low frequencies, severe
limitations to engine acceleration would occur.
See Figure 13. At point A, a spark from the previous cycle
occurs as the field around the coil collapses rapidly. At the
same time ZC (ZC (input) = high(1)) will set the 25% clock
signal which commands the adaptive and ramp capacitors to
discharge and the stall capacitor to charge. At point B, as the
ramp capacitor voltage crosses the 1.2 V (Vbg) level, the 25%
clock is cleared and the polarities and amplitude of the ramp
and stall capacitor currents change to their appropriate
levels. At this point the adaptive capacitor is discharged and
begins to float. At point C, the coil turns on and ramps until
the coil current is limited to 6.5 amps. The adaptive capacitor,
at point D, remains discharged and the dwell is maximized to
6.5 amps because the start/run latch has yet to be set. At
point E, ZC (ZC = high) turns the coil off causing a spark to
occur and at which point a new cycle begins. As the engine
frequency increases, the peak voltage on the ramp capacitor
at the ac signal will fall below the start mode enable threshold
level. The start mode enable detector then sets the start/run
latch to the run mode (CADUMP = 0) by clocking a zero into
the start/run latch at the zero cross. At this time the adaptive
algorithm is evoked and the adaptive capacitor is allowed to
charge and discharge according to it’s other logical inputs.
After normal run mode operation is entered, the start mode
may not be reentered even though the ramp capacitor
voltage again exceeds the start mode enable threshold. A start
mode may only be evoked by a STALL signal transition from
logic 1 to 0. The STALL signal transition occurs at a ZC
frequency of approximately 2.0 Hz.
The IC and circuit provides for other than normal starting
procedures such as push starting the engine. Since the stall
capacitor will be discharged in this low frequency mode, the
IC will provide a spark timing with a maximum retardation of
about 6.5 ms.
After the start mode operation is exited, the normal
operation algorithm is entered and a different sequence of
events dominate the IC’s performance. See Figures 14, 15,
and 16. At point A, the spark from the previous cycle occurs
and the 25% part of the cycle begins. During this part of the
cycle, the stall capacitor will charge and the ramp and
adaptive capacitors will discharge. At point B, the “not 25%”
part of the cycle, also called the 75% part of the cycle, begins.
The stall capacitor discharges, while the ramp capacitor
charges. During this part of the cycle the adaptive capacitor
floats. At point C, the ramp capacitor voltage equals the
voltage on the adaptive capacitor. At this time, the coil turns
on and the coil current ramps to the point where it is limited.
When the coil current reaches the limit, point D, the adaptive
capacitor begins to charge, until zero cross (ZC = 1logic(high)),
point E. This turns the coil off and induces a spark. The 75%
part of the cycle lasts until point E, at which time the cycle
begins again.
The adaptive dwell algorithm causes the engine to
maintain a fixed percent of excess dwell time (if possible).
The mechanism that permits this involves the floating nature
of the adaptive capacitor. During engine deceleration, the
initial coil turn–on might occur early, but the next coil turn–on
will be retarded to it’s correct location due to the % adjusted
adaptive capacitor charge time. During acceleration, the coil
may not charge up as early as desired the first time, however,
the spark will still be correctly slaved to the distributor. The
side effect of this is that the adaptive capacitor will not receive
as much charge time for that cycle and will have a lower
average value the next cycle, thus starting the coil charging
sooner, as can be seen in Figure 16. In this figure, the output
voltage rises before the adaptive capacitor charge signal
occurs.
See Figure 12. In the Stall mode the output is slaved by the
stall capacitor. The stall capacitor can discharge completely,
but starting at point X it charges during the 25% of the engine
cycle (duration of when ZC is logic high = 1). At the same time
a spark from the previous cycle occurs. The DWELL signal
will be high as long as the engine is in stall, but falls gradually
preventing a spark at point Y when the STALL goes low
starting at 2.4 V. The coil will be slaved to the stall capacitor,
and at point Z the coil will charge to 6.5 amps as the stall
capacitor charges to 2.0 V. At that time the STALL
comparator will trip (STALL = 0) and the DWELL signal will
fall, triggering a reduced spark with some retardation (6.5 ms).
At this point a new cycle begins.
Each of the three different modes (Stall, Start, and Run)
have their own differences. The Stall capacitor controls the
output in the stall mode, however is disabled in both the start
and run modes. The output is clamped longer in the start
mode as compared to the run mode due to the more
energy/current in the coil causing a longer/bigger spark.
Other less likely operating sequences are possible. For
example, there is a possibility of VCC exceeding 15 V during
engine operation (High battery = logic 1). Above about 17 V
on Vbat, the excess current limit percentage falls to 5% to
conserve IC and circuit power dissipation. Above 25 V,
current to the coil is disabled. Care was placed in this design
to account for all possible operating modes.
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Figure 12. Stall Mode 60 RPM (Frequency: 2.0 Hz @ 100 ms)
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Figure 13. Start Mode 300 RPM (Frequency: 10 Hz @ 20 ms)
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Figure 14. Run Mode 900 RPM (Frequency: 30 Hz @ 10 ms)
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MC33094
Figure 15. Run Mode 2000 RPM (Frequency: 66.67 Hz @ 5.0 ms)
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Figure 16. Run Mode 5000 RPM (Frequency: 166.67 Hz @ 2.0 ms)
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MOTOROLA ANALOG IC DEVICE DATA
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MC33094
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC PACKAGE
CASE 751G–03
ISSUE B
A
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