NL27WZ125 Dual Buffer with 3-State Outputs The NL27WZ125 is a high performance dual noninverting buffer operating from a 1.65 V to 5.5 V supply. • • • • • • • • • • Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5 V Designed for 1.65 V to 5.5 V VCC Operation Over Voltage Tolerant Inputs and Outputs LVTTL Compatible – Interface Capability With 5 V TTL Logic with VCC = 3 V LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements 3–State OE Input is Active–Low Replacement for NC7WZ125 Chip Complexity = 72 FETs http://onsemi.com MARKING DIAGRAM 8 8 1 M0 US8 US SUFFIX CASE 493–01 D 1 D = Date Code Figure 1. ORDERING INFORMATION OE1 1 8 VCC A1 2 7 OE2 Y2 3 6 Y1 See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. A1 GND 5 4 A2 1 OE1 Y1 EN A2 OE2 Figure 1. Pinout (Top View) Y2 Figure 2. Logic Symbol PIN ASSIGNMENT FUNCTION TABLE Pin Function 1 OE1 2 A1 OEn An Yn 3 Y2 L L L 4 GND L H H 5 A2 H X Z 6 Y1 7 OE2 8 VCC Semiconductor Components Industries, LLC, 2002 July, 2002 – Rev. 3 Input Output X = Don’t Care n = 1, 2 1 Publication Order Number: NL27WZ125/D NL27WZ125 MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage 0.5 to 7.0 V VI DC Input Voltage 0.5 to 7.0 V VO DC Output Voltage 0.5 to 7.0 –0.5 to VCC + 0.5 Output in High Impedance State Output in HIGH or LOW State V VI < GND 50 mA VO < GND 50 mA DC Output Sink Current 50 mA ICC DC Supply Current per Supply Pin 100 mA IGND DC Ground Current per Ground Pin 100 mA TSTG Storage Temperature Range 65 to 150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature under Bias 150 °C JA Thermal Resistance 250 °C/W PD Power Dissipation in Still Air at 85°C 250 mW MSL Moisture Sensitivity FR Flammability Rating VESD ESD Withstand Voltage IIK DC Input Diode Current IOK DC Output Diode Current IO (Note 1) Level 1 Oxygen Index: 28 to 34 UL 94 V–0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) > 2000 > 200 N/A V Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm–by–1 inch, 2–ounce copper trace with no air flow. 2. Tested to EIA/JESD22–A114–A. 3. Tested to EIA/JESD22–A115–A. 4. Tested to JESD22–C101–A. RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC Supply Voltage VI Input Voltage VO Output Voltage TA Operating Free–Air Temperature t/V Input Transition Rise or Fall Rate Min Max Unit 1.65 1.5 5.5 5.5 V (Note 5) 0 5.5 V (HIGH or LOW State) 0 5.5 V 40 85 °C 0 0 0 20 10 5 ns/V Operating Data Retention Only VCC = 2.5 V 0.2 V VCC = 3.0 V 0.3 V VCC = 5.0 V 0.5 V 5. Unused inputs may not be left open. All inputs must be tied to a high– or low–logic input voltage level. http://onsemi.com 2 NL27WZ125 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Condition VCC (V) Min 0.75 VCC 0.7 VCC VIH High–Level Input Voltage 1.65 2.3 to 5.5 VIL Low–Level Input Voltage 1.65 2.3 to 5.5 VOH High Level Output High–Level Out ut VoltVolt age g VIN = VIL or VIH IOH = 100 A IOH = –3 mA 8 mA A IOH = –8 IOH = –12 mA IOH = –16 mA IOH = –24 24 mA 32 mA A IOH = –32 1.65 to 5.5 1.65 23 2.3 2.7 27 3.0 3.0 45 4.5 VOL Low Level Output Low–Level Out ut Voltage VIN = VIL IOL = 100 A IOL = 3 mA A IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA A IOL = 32 mA 1.65 to 5.5 Typ Input Leakage Current VIN = VCC or GND IOFF Power Off Leakage Current VOUT = 5.5 V VIN = 5.5 V ICC Quiescent Supply Current VIN = VCC or GND IOZ 3–State Output Leakage VIN = VIL or VIH 0V VOUT 5.5 V Max Min VCC – 0.1 1.29 19 1.9 2.2 22 2.4 2.3 38 3.8 Max 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC VCC 1.52 21 2.1 2.4 24 2.7 2.5 40 4.0 Unit V 0.25 VCC 0.3 VCC VCC–0.1 0.1 1.29 19 1.9 2.2 22 2.4 2.3 38 3.8 V V 0.1 0.24 03 0.3 0.4 04 0.4 0.55 0 55 0.55 0.1 0.24 03 0.3 0.4 04 0.4 0.55 0 55 0.55 V 5.5 0.1 1.0 A 0 1.0 10 A 0.08 0 20 0.20 0.22 0 22 0.28 0.38 0 42 0.42 2 3 2.3 2.7 27 3.0 3.0 45 4.5 IIN 40C TA 85C TA = 25C 5.5 1.0 10 A 2.3 to 5.5 0.5 5 A AC ELECTRICAL CHARACTERISTICS (tR = tF = 3.0 ns) Symbol tPLH tPHL Parameter Propagation Delay AN to YN (Figures 3 and 4) tOSLH tOSHL Output to Output Skew (Note 6) tPZH tPZL Output Enable Time (Figures 5, 6 and 7) tPHZ tPLZ 40C TA 85C TA = 25C VCC (V) Min Max Min Max Unit RL = 1 M CL = 15 pF 1.8 0.15 2.5 0.2 2.0 1.0 12 7.5 2.0 1.0 13 8 ns RL = 1 M CL = 15 pF 3.3 0.3 0.8 5.2 0.8 5.5 RL = 500 CL = 50 pF 1.2 5.7 1.2 6.0 RL = 1 M CL = 15 pF 0.5 4.5 0.5 4.8 RL = 500 CL = 50 pF 0.8 5.0 0.8 5.3 RL = 500 CL = 50 pF 3.3 0.3 1.0 1.0 RL = 500 CL = 50 pF 5.0 0.5 0.8 0.8 Condition Output Enable Time (Figures 5, 6 and 7) 5.0 0.5 Typ 1.8 0.15 2.5 0.2 3.0 1.8 14 8.5 3.0 1.8 15 9.0 3.3 0.3 1.2 6.2 1.2 6.5 5.0 0.5 0.8 5.5 0.8 5.8 1.8 0.15 2.5 0.2 2.5 1.5 12 8.0 2.5 1.5 13 8.5 3.3 0.3 0.8 5.7 0.8 6.0 5.0 0.5 0.3 4.7 0.3 5.0 ns ns ns 6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. This specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter guaranteed by design. http://onsemi.com 3 NL27WZ125 CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Unit CIN Input Capacitance VCC = 5.5 V, VI = 0 V or VCC 7.0 pF COUT Output Capacitance VCC = 5.5 V, VI = 0 V or VCC 7.0 pF CPD Power Capacitance o e Dissipation ss a o Ca ac a ce (Note 7) 10 3.3 0 MHz,, VCC = 3 3 V,, VI = 0 V or o VCC 10 MHz, VCC = 5.5 V, VI = 0 V or VCC 18 8 27 pF 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no–load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. tf = 3 ns tf = 3 ns 90% INPUT A and B 50% OE = GND VCC 90% INPUT 50% 10% 10% tPHL OUTPUT CL * GND RL tPLH VOH OUTPUT Y 50% 50% *Includes all probe and jig capacitance. A 1 MHz square input wave is recommended for propagation delay tests. VOL Figure 3. Switching Waveform Figure 4. TPLH or TPHL VCC 50% 50% OE 0V tPHZ tPZH VOH – 10% 50% On VCC ≈0V tPZL On tPLZ 50% ≈ VCC VOL + 10% GND Figure 5. AC Output Enable and Disable Waveform http://onsemi.com 4 NL27WZ125 2 VCC INPUT INPUT R1 = 500 VCC OUTPUT OUTPUT RL = 500 CL = 50 pF CL = 50 pF RL = 250 A 1 MHz square input wave is recommended for propagation delay tests. A 1 MHz square input wave is recommended for propagation delay tests. Figure 6. TPZL or TPL Figure 7. TPZH or TPHZ DEVICE ORDERING INFORMATION Device Nomenclature Device Order Number NL27WZ125US Logic Circuit Indicator No. of Gates per Package Temp Range Identifier Technology Device Function Package Suffix Package Type Tape and Reel Size NL 2 7 WZ 125 US US8 178 mm, 3000 Unit http://onsemi.com 5 NL27WZ125 CAVITY TAPE TOP TAPE TAPE TRAILER (Connected to Reel Hub) NO COMPONENTS 160 mm MIN COMPONENTS TAPE LEADER NO COMPONENTS 400 mm MIN DIRECTION OF FEED Figure 8. Tape Ends for Finished Goods TAPE DIMENSIONS mm 4.00 1.50 TYP 4.00 2.00 1.75 3.50 0.25 0.30 8.00 + – 0.10 1 1.00 ± 0.25 TYP DIRECTION OF FEED Figure 9. US8 Reel Configuration/Orientation http://onsemi.com 6 NL27WZ125 t MAX 1.5 mm MIN (0.06 in) A 13.0 mm 0.2 mm (0.512 in 0.008 in) 50 mm MIN (1.969 in) 20.2 mm MIN (0.795 in) FULL RADIUS G Figure 10. Reel Dimensions REEL DIMENSIONS Tape Size T and R Suffix A Max G t Max 8 mm US 178 mm (7 in) 8.4 mm, + 1.5 mm, –0.0 (0.33 in + 0.059 in, –0.00) 14.4 mm (0.56 in) DIRECTION OF FEED BARCODE LABEL POCKET Figure 11. Reel Winding Direction http://onsemi.com 7 HOLE NL27WZ125 PACKAGE DIMENSIONS US8 US SUFFIX CASE 493–01 ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. DIMENSION A" DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. MOLD FLASH. PROTRUSION AND GATE BURR SHALL NOT EXCEED 0.140 MM (0.0055") PER SIDE. 4. DIMENSION B" DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSION. INTER-LEAD FLASH AND PROTRUSION SHALL NOT E3XCEED 0.140 (0.0055") PER SIDE. 5. LEAD FINISH IS SOLDER PLATING WITH THICKNESS OF 0.0076-0. 0203 MM. (300-800 mINCH). 6. ALL TOLERANCE UNLESS OTHERWISE SPECIFIED ±0.0508 (0.0002"). –X– A 8 J –Y– 5 DETAIL E B L 1 4 R S G P U C –T– SEATING PLANE H 0.10 (0.004) T K D N 0.10 (0.004) M T X Y R 0.10 TYP V M DIM A B C D F G H J K L M N P R S U V MILLIMETERS MIN MAX 1.90 2.10 2.20 2.40 0.60 0.90 0.17 0.25 0.20 0.35 0.50 BSC 0.40 REF 0.10 0.18 0.00 0.10 3.00 3.20 0 6 5 10 0.28 0.44 0.23 0.33 0.37 0.47 0.60 0.80 0.12 BSC INCHES MIN MAX 0.075 0.083 0.087 0.094 0.024 0.035 0.007 0.010 0.008 0.014 0.020 BSC 0.016 REF 0.004 0.007 0.000 0.004 0.118 0.126 0 6 5 10 0.011 0.017 0.009 0.013 0.015 0.019 0.024 0.031 0.005 BSC F DETAIL E 3.8 0.5 TYP ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 1.8 TYP ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ 1.0 0.3 TYP (mm) ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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