S3C8847/C8849/P8849 1 PRODUCT OVERVIEW PRODUCT OVERVIEW SAM87 PRODUCT FAMILY Samsung's SAM87 family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include: — Efficient register-oriented architecture — Selectable CPU clock sources — Release of Idle and Stop power-down modes by interrupt — Built-in basic timer circuit with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum of six CPU clocks) can be assigned to specific interrupt levels. S3C8847/C8849/P8849 MICROCONTROLLERS The S3C8847 microcontroller has a 24-Kbyte on-chip program memory and the S3C8849 has a 32-Kbyte. Both chips have a 272-byte general-purpose internal register file. The interrupt structure has nine interrupt sources with nine interrupt vectors. The CPU recognizes seven interrupt priority levels. Using a modular design approach, the following peripherals were integrated with the SAM87 core to make the S3C8847/C8849/P8849 microcontrollers suitable for use in color television and other types of screen display applications: — Four programmable I/O ports (26 pins total: 16 general-purpose I/O pins; 10 n-channel, open-drain output pins) — 4-bit resolution A/D converter (4 channels) — 14-bit PWM output (Two channels: push-pull type, open-drain type) — Basic timer (BT) with watchdog timer function — One 8-bit timer/counter (T0) with interval timer and PWM mode — One 8-bit general-purpose timer/counter (TA) with prescalers — On-screen display (OSD) with a wide range of programmable features, including halftone control signal output The S3C8847 and the S3C8849 are available in versatile 42-pin SDIP package. OTP The S3C8847/C8849 microcontrollers are also available in OTP (One Time Programmable) version, named the S3P8849. The S3P8849 microcontroller has an on-chip 32-Kbyte one-time-programmable EPROM instead of a masked ROM. The KS88P8432 is comparable to the S3C8847/C8849, both in function and pin configuration. 1-1 PRODUCT OVERVIEW S3C8847/C8849/P8849 FEATURES CPU Pulse Width Modulation Module • • 14-bit PWM with two-channel output (push-pull type, open-drain type) • 8-bit PWM with four-channel, push-pull and opendrain • PWM counter and data capture input pin • Frequency: 5.859 kHz to 23.437 kHz with a 6 MHz CPU clock SAM87 CPU core Memory • 24-Kbyte (S3C8847) or 32-Kbyte (S3C8849) internal program memory • 272-byte general-purpose register area Instruction Set • 78 instructions On-Screen Display (OSD) • IDLE and STOP instructions added for powerdown modes • Video RAM: 252 × 13-bits • Character generator ROM: 384 × 18 × 16-bits (384 display characters; fixed; 2, variable; 382) • 252 display positions (12 rows × 21 columns) • 16-dot × 18-dot character resolution • 16 different character sizes • Eight character colors • Vertical direction fade-in/fade-out control • Eight colors for character and frame background • Halftone control signal output; selectable for individual characters • Synchronous polarity selector for H-sync and V-sync input Instruction Execution Time • 750 ns (minimum) with an 8 MHz CPU clock Interrupts • 9 interrupt sources with 9 vectors • 7 interrupt levels • Fast interrupt processing for select levels General I/O • Four I/O ports (26 pins total) • Six open-drain pins for up to 6 V loads • Four open-drain pins for up to 5 V loads 8-Bit Basic Timer • Three selectable internal clock frequencies • Watchdog or oscillation stabilization function Timer/Counters • • One 8-bit timer/counter (T0) with three internal clocks or an external clock and interval timer mode or PWM mode. One general-purpose 8-bit timer/counters with interval timer mode (timer A) A/D Converter • Four analog input pins; 4-bit resolution • 3.125 µs conversion time (8 MHz CPU clock) 1-2 Oscillator Frequency • 5 MHz to 8 MHz external crystal oscillator • Maximum 8 MHz CPU clock Operating Temperature Range • – 20°C to + 85°C Operating Voltage Range • 4.5 V to 5.5 V Package Type • 42-pin SDIP S3C8847/C8849/P8849 PRODUCT OVERVIEW BLOCK DIAGRAM RESET P0.0 - P0.7 P1.0 - P1.7 Port 0 Port 1 INT0 - INT3 XIN XOUT Test SAM87 Bus Main Osc Timer A Port I/O and Interrupt Control OSC IN OSC OUT L-C Osc TO Timer 0 T0CK H-sync V-sync Vred Vgreen Vblue Vblank OSDHT ADC0 ADC1 ADC2 ADC3 OnScreen Display 24/32-KByte 4-Bit ADC PWM Block SAM87 CPU ROM 272-Byte Register File PWM Counter and Data Capture 14-Bit PWM CAPA PWM0 PWM1 SAM87 Bus Port 2 Port 3 P2.0 - P2.7 P3.0 - P3.1 8-Bit PWM PWM2 PWM3 PWM4 PWM5 Figure 1-1. Block Diagram 1-3 PRODUCT OVERVIEW S3C8847/C8849/P8849 PIN ASSIGNMENTS P2.5/PWM0 P2.1/PWM1 P2.2/PWM2 P2.3/PWM3 P2.4/PWM4 P2.0/PWM5 P2.6/T0 P1.7/T0CK P3.0/ADC0 P3.1/ADC1 P0.6/ADC2 P0.7/ADC3 TEST P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT3 P1.4 P1.5 P1.6 P2.7/OSDHT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 S3C8847/C8849 42-SDIP (Top View) 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 P0.0 P0.1 P0.2 P0.3 P0.4 VSS2 CAPA P0.5 VDD RESET XOUT XIN VSS1 OSCOUT OSCIN V-sync H-sync Vblank Vred Vgreen Vblue Figure 1-2. S3C8847/C8849/P8849 Pin Assignment Diagram 1-4 S3C8847/C8849/P8849 PRODUCT OVERVIEW PIN DESCRIPTIONS Table 1-1. S3C8847/C8849/P8849 Pin Descriptions Pin Name Circuit Type Pin Numbers General I/O port (4-bit), configurable for digital input or n-channel open-drain, pushpull output. Pins can withstand up to 5 V loads. 2 39–42 P0.4–P0.5 General I/O port (2-bit), configurable for digital input or push-pull output. 3 38, 35 P0.6–P0.7 General I/O port (2-bit), configurable for digital input or n-channel open-drain output. P0.6–P0.7 can withstand up to 5 V loads. Multiplexed for alternative use as external inputs, ADC2–ADC3. 6 11–12 ADC2–ADC3 General I/O port (4-bit), configurable for digital input or n-channel open-drain output. P1.0–P1.3 can withstand up to 6 V loads. Multiplexed for alternative use as external interrupt inputs, INT0–INT3. 7 14–17 INT0–INT3 P1.4–P1.5 General I/O port (2-bit), configurable for digital input or n-channel open-drain output. P1.4–P1.5 can withstand up to 6 V loads. High current port(10mA) 5 18–19 P1.6–P1.7 General I/O port (2-bit), configurable for digital input or push-pull output. Each pin has an alternative function. P1.7: T0CK (Timer 0 clock input) 3 20, 8 T0CK P0.0–P0.3 P1.0–P1.3 Pin Type I/O I/O Pin Description Share Pins (see pin description) P2.0–P2.7 I/O General I/O port (8-bit). Input/output mode or n-channel open-drain, push-pull output mode are software configurable. Pins can withstand up to 5 V loads. Each pin has an alternative function. P2.0: PWM5 (8-bit PWM output) P2.1: PWM1 (14-bit PWM output) P2.2: PWM2 (8-bit PWM output) P2.3: PWM3 (8-bit PWM output) P2.4: PWM4 (8-bit PWM output) P2.5: PWM0 (14-bit PWM output) P2.6: T0 (Timer 0 PWM and interval output) P2.7: OSDHT (Halftone signal output) 2 1–7, 21 PWM0– PWM5 T0, OSDHT P3.0–P3.1 I/O General I/O port (2-bit), configurable for digital input or n-channel open-drain output. P3.0–P3.1 can withstand up to 5 V loads. Multiplexed for alternative use as external inputs ADC0–ADC1. 6 9–10 ADC0–ADC1 1-5 PRODUCT OVERVIEW S3C8847/C8849/P8849 Table 1-1. S3C8847/C8849/P8849 Pin Descriptions (Continued) Pin Name Pin Type Pin Description Circuit Type Pin Numbers Share Pins PWM0– PWM1 O Output pin for 14-bit PWM circuit 2 1, 2 P2.5, P2.1 PWM2– PWM5 O Output pin for 8-bit PWM circuit 2 3–6 P2.2–P2.4, P2.0 ADC0–ADC3 I Analog inputs for 4-bit A/D converter 6 9–12 P3.0–P3.1, P0.6–P0.7 INT0–INT3 I External interrupt input pins 7 14–17 P1.0–P1.3 T0 O Timer 0 output (interval, PWM) 2 7 P2.6 T0CK I Timer 0 clock input 3 8 P1.7 OSDHT O Halftone control signal output for OSD 2 21 P2.7 Vblue, Vgreen Vred, Vblank O Digital blue, green, red, and video blank signal outputs for OSD 4 22–25 – H-sync, V-sync I H-sync, V-sync input for OSD 1 26, 27 – OSCIN, OSCOUT I, O L-C oscillator pins for OSD clock frequency generation – 28, 29 – XIN, XOUT I, O System clock pins – 31, 32 – RESET I System reset input pin 8 33 – TEST – Test Pin (must be connected to VSS). Factory test mode is activated when 12V is applied. – 13 – VDD, VSS1, VSS2 – Power supply pins – 34, 30, 37 – CAPA I Input for capture A module 1 36 – 1-6 S3C8847/C8849/P8849 PRODUCT OVERVIEW PIN CIRCUITS Input Noise Filter Figure 1-3. Pin Circuit Type 1 (V-Sync H-Sync, CAPA) VDD Data I/O Open-drain Output Disable VSS Input Figure 1-4. Pin Circuit Type 2 (P2.0–P2.7, P0.0–P0.3, PWM0–PWM5, T0, OSDHT) 1-7 PRODUCT OVERVIEW S3C8847/C8849/P8849 VDD Data I/ O VSS Input Figure 1-5. Pin Circuit Type 3 (P0.4–P0.5, P1.6–P1.7, T0CK) VDD Data Output VSS Figure 1-6. Pin Circuit Type 4 (Vblue, Vgreen, Vred, Vblank) 1-8 S3C8847/C8849/P8849 PRODUCT OVERVIEW I/O Data VSS Input NOTE: Circuit type 5 can withstand up to 6 V loads. Figure 1-7. Pin Circuit Type 5 (P1.4–P1.5) I/O Data VSS Input A/D In NOTE: Circuit type 6 can withstand up to 5 V loads. Figure 1-8. Pin Circuit Type 6 (P3.0–P3.1, P0.6–P0.7, ADC0–ADC3) 1-9 PRODUCT OVERVIEW S3C8847/C8849/P8849 I/O Data VSS Input INT Noise Filter NOTE: Circuit type 7 can withstand up to 6 V loads. Figure 1-9. Pin Circuit Type 7 (P1.0–P1.3, INT0–INT3) 200 KΩ Input Noise Filter Figure 1-10. Pin Circuit Type 8 (RESET RESET) 1-10 S3C8847/C8849/P8849 15 ELECTRICAL DATA ELECTRICAL DATA OVERVIEW In this section, the S3C8847 and the S3C8849 electrical characteristics are presented in tables and graphs. The information is arranged in the following order: — Absolute maximum ratings — D.C. electrical characteristics — I/O capacitance — A.C. electrical characteristics — Input timing measurement points for tNF1 and tNF2 — Data retention supply voltage in Stop mode — Stop mode release timing when initiated by RESET — Main oscillator and L-C oscillator frequency — Clock timing measurement points for XIN — Main oscillator clock stabilization time (tST) — A/D converter electrical characteristics — Characteristic curves 15-1 ELECTRICAL DATA S3C8847/C8849/P8849 Table 15-1. Absolute Maximum Ratings (TA = 25 °C) Parameter Symbol Conditions Rating Unit Supply Voltage VDD – – 0.3 to + 6.0 V Input Voltage VI1 P1.0–P1.5 (open-drain) – 0.3 to + 7 V VI2 All port pins except VI1 – 0.3 to VDD + 0.3 Output Voltage VO All output pins – 0.3 to VDD + 0.3 Output Current High I OH One I/O pin active – 18 All I/O pins active – 60 One I/O pin active + 30 Total pin current for port 1 + 100 Total pin current for ports 0, 2, and 3 + 100 Output Current Low I OL V mA mA Operating Temperature TA – – 20 to + 85 °C Storage Temperature TSTG – – 65 to + 150 °C Table 15-2. D.C. Electrical Characteristics (TA = – 20 °C to + 85 °C, VDD = 4.5 V to 5.5 V) Parameter Input High Voltage Symbol Conditions VIH1 All input pins except VIH2 VIH2 XIN, XOUT VIL1 All input pins except VIL2 VIL2 XIN, XOUT Output High Voltage VOH IOH = – 500 µA P0.0–P0.5, P1.6–P1.7, P2 R, G, B, Vblank Output Low Voltage VOL1 Input Low Voltage 15-2 Min Typ Max Unit 0.8 VDD – VDD V – 0.2 VDD V 2.7 V – 1.0 V VDD – 0.8 – – V IOL = 4 mA P0.0–P0.5, P1.6–P1.7 – – 0.4 V VOL2 IOL = 10 mA P1.4–P1.5 – – 0.8 VOL3 IOL = 2 mA P1.0–P1.3, P3.0–P3.1, P0.6–P0.7 – – 0.4 VOL4 IOL = 1 mA R, G, B, Vblank, P2 – – 0.4 V S3C8847/C8849/P8849 ELECTRICAL DATA Table 15-2. D.C. Electrical Characteristics (Continued) (TA = – 20 °C to + 85 °C, VDD = 4.5 V to 5.5 V) Parameter Input High Leakage Current Input Low Leakage Current Symbol Conditions ILIH1 VIN = VDD All input pins except ILIH2 and ILIH3 ILIH2 VIN = VDD, OSCIN, OSCOUT ILIH3 VIN = VDD, XIN, XOUT ILIL1 VIN = 0 V All input pins except ILIL2, Min Typ Max Unit – – 3 µA 10 2.5 10 20 – – –3 µA ILIL3, and RESET ILIL2 VIN = 0 V, OSCIN, OSCOUT ILIL3 VIN = 0 V, XIN, XOUT ILOH1 VOUT = VDD All output pins except ILOH2 ILOH2 VOUT = 6 V P1.0–P1.5 Output Low Leakage Current ILOL VOUT = 0 V All output pins – – –3 µA Supply Current IDD1 Normal mode; VDD = 4.5 V to 5.5 V 8-MHz CPU clock – 7 20 mA IDD2 Idle mode; VDD = 4.5 V to 5.5 V 8-MHz CPU clock 2 10 IDD3 Stop mode; VDD = 4.5 V to 5.5 V 1 10 Output High Leakage Current (note) – 10 – 2.5 – 10 – 20 – – 3 µA 10 µA NOTE: Supply current does not include the current drawn through internal pull-up resistors or external output current loads. 15-3 ELECTRICAL DATA S3C8847/C8849/P8849 Table 15-3. Input/output Capacitance (TA = – 20 °C to + 85 °C, VDD = 0 V) Parameter Symbol Conditions Min Typ Max Unit Input capacitance CIN f = 1 MHz; unmeasured pins are connected to VSS – – 10 pF Output capacitance COUT I/O capacitance CIO Table 15-4. A.C. Electrical Characteristics (TA = – 20 °C to + 85 °C, VDD = 4.5 V to 5.5 V) Parameter Symbol Conditions Min Typ Max Unit V-sync Pulse Width tVW – 4 – – µs H-sync Pulse Width tHW – 3 – – µs Noise Filter tNF1 P1.0–P1.3 – 350 – ns tNF2 RESET, H-sync, V-sync – 1000 tNF3 Glitch filter (oscillator block) – 25 tNF4 CAPA – 5 – tCAPA NOTE: fCAPA = fOSC/128 1tCPU tNF1L tNF1H t NF2 0.8 VDD 0.2 VDD Figure 15-1. Input Timing Measurement Points for tNF1 and tNF2 15-4 S3C8847/C8849/P8849 ELECTRICAL DATA Table 15-5. Data Retention Supply Voltage in Stop Mode (TA = – 20 °C to + 85 °C) Parameter Symbol Data Retention Supply Voltage VDDDR Data Retention Supply Current IDDDR Conditions Min Typ Max Unit Stop mode 2 – 6 V Stop mode, VDDDR = 2.0 V – – 5 µA NOTES: 1. Supply current does not include the current drawn through internal pull-up resistors or external output current loads. 2. During the oscillator stabilization wait time (tWAIT), all the CPU operations must be stopped. OSCILLATION STABILIZATION TIME ~ ~ t SREL STOP MODE NORMAL OPERATING MODE VDD ~ ~ DATA RETENTION MODE VDDDR RESET EXECUTION OF STOP INSTRUCTION NOTE: t WAIT is the same as 4096 x 16 x 1 / f OSC t WAIT Figure 15-2. Stop Mode Release Timing When Initiated by a RESET 15-5 ELECTRICAL DATA S3C8847/C8849/P8849 Table 15-6. Main Oscillator and L-C Oscillator Frequency (TA = – 20 °C + 85 °C, VDD = 4.5 V to 5.5 V) Oscillator Crystal Clock Circuit Conditions Min Typ Max Unit 5 6 8 MHz 0.5 6 8 5 6 8 0.5 6 8 5 6 8 OSD block inactive 0.5 6 8 Recommend value; C1 = C2 = 20 pF 5 6.5 8 MHz 0.032 6.0 8 MHz OSD block active C1 XIN XOUT C2 OSD block inactive Ceramic OSD block active C1 MHz XIN XOUT C2 OSD block inactive External Clock OSD block active MHz XIN XOUT L-C Oscillator C1 OSCIN OSCOUT C2 CPU Clock Frequency – 1 / fOSC tXL tXH XIN 2.7 V 1.0 V Figure 15-3. Clock Timing Measurement Points for XIN 15-6 S3C8847/C8849/P8849 ELECTRICAL DATA Table 15-7. Main Oscillator Clock Stabilization Time (TA = – 20 °C + 85 °C, VDD = 4.5 V to 5.5 V) Oscillator Symbol Crystal – Test Condition VDD = 4.5 V to 6.0 V Min Typ Max Unit – – 20 ms 10 Ceramic (Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range.) External Clock XIN input High and Low level width (tXH, tXL) 65 – 100 ns Release Signal Setup Time tSREL Normal operation – 1000 – ns Oscillation Stabilization Wait Time (1) tWAIT CPU clock = 8 MHz; Stop mode released by RESET – 8.3 – ms (2) CPU clock = 8 MHz; Stop mode released by an interrupt NOTES: 1. Oscillation stabilization time is the time required for the CPU clock to return to its normal oscillation frequency after a power-on occurs, or when Stop mode is released. 2. The oscillation stabilization interval is determined by the basic timer (BT) input clock setting. Table 15-8. A/D Converter Electrical Characteristics (TA = – 20 °C to + 85 °C, VDD = 4.5 V to 5.5 V, VSS = 0 V) Parameter Absolute Accuracy Symbol (1) Conversion Time (2) – Conditions CPU clock = 8 MHz tCON Min Typ Max Unit – – ± 0.5 LSB tCPU × 25 – µs (3) Analog Input Voltage VIAN – VSS Analog Input Impedance RAN – 2 – VDD V – MΩ NOTES: 1. Excluding quantization error, absolute accuracy values are within ± 1/2 LSB. 2. 'Conversion time' is the time required from the moment a conversion operation starts until it ends. 3. The unit tCPU means one CPU clock period. 15-7 S3C8847/C8849/P8849 16 MECHANICAL DATA MECHANICAL DATA OVERVIEW The S3C8847 and the S3C8849 microcontrollers are available in 42-pin SIP package (42-SDIP-600). 22 0 ~ 15 ° 15.24 42-SDIP-600 0.50 ± 0.1 1.00 ± 0.1 1.778 5.08MAX (1.77) 3.30 ± 0.3 39.10 ± 0.2 3.50 ± 0.2 21 0.51MIN #1 0.25 +0.1 – 0.0 5 14.00 ± 0.2 42 NOTE: Package dimensions are in millimeters. Figure 16-1. 42-Pin SDIP Package Mechanical Data (42-SDIP-600) 16-1 S3C8847/C8849/P8849 17 S3P8849 OTP S3P8849 OTP OVERVIEW The S3P8849 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3C8847/C8849microcontroller. It has an on-chip OTP ROM instead of a masked ROM. The EPROM is accessed by serial data format. The S3P8849 is fully compatible with the S3C8847/C8849, both in function and pin configuration. The simple programming requirements of the S3P8849 make the device ideal for use as an evaluation chip for the S3C8847/C8849. P2.5/PWM0 P2.1/PWM1 SCLK/P2.2/PWM2 SDAT/P2.3/PWM3 P2.4/PWM4 P2.0/PWM5 P2.6/T0 P1.7/T0CK P3.0/ADC0 P3.1/ADC1 P0.6/ADC2 P0.7/ADC3 TEST/TEST P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT3 P1.4 P1.5 P1.6 P2.7/OSDHT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 S3P8849 42-SDIP (Top View) 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 P0.0 P0.1 P0.2 P0.3 P0.4 VSS2/VSS2 CAPA P0.5 VDD/VDD RESET/RESET RESET XOUT XIN VSS1/VSS1 OSCOUT OSCIN V-sync H-sync Vblank Vred Vgreen Vblue Figure 17-1. S3P8849 Pin Assignment (42-SDIP) 17-1 S3P8849 OTP S3C8847/C8849/P8849 Table 17-1. Descriptions of Pins Used to Read/Write the EPROM (S3P8849) Main Chip During Programming Pin Name Pin Name Pin No. I/O P2.3 (Pin 4) SDAT 4 I/O Serial data pin (output when reading, Input when writing) Input and push-pull output port can be assigned P2.2 (Pin 3) SCLK 3 I/O Serial clock pin (Input only pin) VPP (TEST) 13 I 0 V: operating mode 5 V: test mode 12.5 V: OTP mode RESET RESET 33 I 5 V: operating mode, 0 V: OTP mode VDD/VSS VDD/VSS 34/30, 37 I Logic power supply pin. TEST Function Table 17-2. Comparison of S3P8849 and S3C8847/C8849Features Characteristic S3P8849 S3C8847/C8849 Program Memory 32-K byte EPROM 24/32-K byte mask ROM Operating Voltage (VDD) 4.5 V to 5.5 V 4.5 V to 5.5 V OTP Programming Mode VDD = 5 V, TEST VPP = 12.5 V Pin Configuration 42 SDIP 42 SDIP EPROM Programmability User Program 1 time Programmed at the factory – OPERATING MODE CHARACTERISTICS When 12.5 V is supplied to the VPP (TEST) pin of the S3P8849, the EPROM programming mode is entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in Table 16-3 below. Table 17-3. Operating Mode Selection Criteria VDD VPP (TEST) REG/ MEM ADDRESS (A15–A0) R/W 5V 5V 0 0000H 1 EPROM read 12.5 V 0 0000H 0 EPROM program 12.5 V 0 0000H 1 EPROM verify 12.5 V 1 0E3FH 0 EPROM read protection NOTE: "0" means Low level; "1" means High level. 17-2 MODE