SAMSUNG S3C8095

S3C8095/P8095
1
PRODUCT OVERVIEW
PRODUCT OVERVIEW
S3C8-SERIES MICROCONTROLLERS
Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include:
— Efficient register-oriented architecture
— Selectable CPU clock sources
— Idle and Stop power-down mode release by interrupt
— Built-in basic timer with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to
specific interrupt levels.
S3C8095/P8095 MICROCONTROLLER
The S3C8095/P8095 single-chip CMOS
microcontroller is fabricated using a highly advanced
CMOS process and is based on Samsung’s newest
CPU architecture.
The S3C8095 is the microcontroller which has 16Kbytes mask-programmable ROM.
The S3P8095 is the microcontroller which has 16Kbytes one-time-programmable EPROM.
— One 8-bit timer/counter and one 16-bit
timer/counter with selectable operating modes.
— One 8-bit counter with auto-reload function and
one-shot or repeat control.
The S3C8095 is a versatile general-purpose
microcontroller. It is currently available in a 32-pin
SOP and SDIP package.
Using a proven modular design approach, Samsung
engineers developed the S3C8095/P8095 by
integrating the following peripheral modules with the
powerful SAM87 core:
— Four programmable I/O ports, including three
8-bit ports and one 2-bit port, for a total of 26
pins.
— Twelve bit-programmable pins for external
interrupts.
— One 8-bit basic timer for oscillation stabilization
and watchdog functions (system reset).
Figure 1-1. S3C8095 Microcontroller
1-1
PRODUCT OVERVIEW
S3C8095/P8095
FEATURES
CPU
Timers and Timer/Counters
•
•
One programmable 8-bit basic timer (BT) for
oscillation stabilization control or watchdog timer
(software reset) function
•
One 8-bit timer/counter (Timer 0) with three
operating modes; Interval, Capture and PWM
•
One 16-bit timer/counter (Timer 1) with two
operating modes; Interval and Capture
SAM87 CPU core
Memory
•
16K-byte internal program memory (ROM)
•
317-byte internal register file
Instruction Set
•
78 instructions
•
IDLE and STOP instructions added for powerdown modes
Carrier Frequency Generator
•
Instruction Execution Time
•
750 ns at 8-MHz f OSC (minimum)
Interrupts
One 8-bit counter with auto-reload function and
one-shot or repeat control (Counter A)
Operating Temperature Range
•
– 20°C to + 85°C
•
Six interrupt levels and 18 interrupt sources
Operating Voltage Range
•
15 vectors (14 sources have a dedicated vector
address and four sources share a single vector)
•
2.0 V to 5.5 V at 4 MHz fOSC
•
2.4 V to 5.5 V at 8 MHz fOSC
•
Fast interrupt processing feature (for one
selected interrupt level)
Package Type
I/O Ports
•
32-pin SOP
•
Three 8-bit I/O ports (P0–P2) and one 2-bit port
(P3) for a total of 26 bit-programmable pins
•
32-pin SDIP
•
Twelve input pins for external interrupts
1-2
S3C8095/P8095
PRODUCT OVERVIEW
BLOCK DIAGRAM
RESET
TEST
XIN
XOUT
MAIN
OSC
P0.0–P0.7
(INT0–INT4)
P1.0–P1.7
PORT 0
PORT 1
INTERNAL BUS
P2.0–P2.3
(INT5–INT8)
P2.4–P2.7
PORT2
8-BIT
BASIC
TIMER
I/O PORT and INTERRUPT
CONTROL
SAM8 CPU
8-BIT
TIMER/
COUNTER
16-BIT
TIMER/
COUNTER
PORT 3
P3.0/T0PWM/
T0CAP/T1CAP
P3.1/REM/T0CK
16-KB ROM
317-BYTES
REGISTER
FILE
CARRIER
GENERATOR
(COUNTER A)
Figure 1-2. Block Diagram
1-3
PRODUCT OVERVIEW
S3C8095/P8095
PIN ASSIGNMENTS
VSS
XIN
XOUT
TEST
P2.0 / INT5
P2.1 / INT6
P2.2 / INT7
P2.3 / INT8
P0.0 / INT0
P0.1 / INT1
P0.2 / INT2
P0.3 / INT3
P0.4 / INT4
P0.5 / INT4
P0.6 / INT4
P0.7 / INT4
1
2
3
4
5
6
7
S3C8095
8
32-SOP/SDIP
9
(Top View)
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VDD
RESET
P3.1 / REM / T0CK
P3.0 / T0PWM / T0CAP / T1CAP
P2.7
P2.6
P2.5
P2.4
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
Figure 1-3. Pin Assignment Diagram (32-Pin SOP/SDIP Package)
1-4
S3C8095/P8095
PRODUCT OVERVIEW
PIN DESCRIPTIONS
Table 1-1. Pin Descriptions
Pin
Names
Pin
Type
Pin
Description
Circuit
Type
Pin No.
Shared
Functions
P0.0–P0.7
I/O
I/O port with bit-programmable pins.
Configurable to input or push-pull output
mode. Pull-up resistors are assignable by
software. Pins can be assigned individually
as external interrupt inputs with noise filters,
interrupt enable/ disable, and interrupt
pending control.
1
9–16
INT0–INT4
P1.0–P1.7
I/O
I/O port with bit-programmable pins.
Configurable to Schmitt trigger input mode
or output mode. Pin circuits are either pushpull or n-channel open-drain type. Pull-up
resistors are assignable by software.
3
17–24
–
P2.0–P2.3
P2.4–P2.7
I/O
General-purpose I/O port with bitprogrammable pins. Configurable to
Schmitt trigger input mode, push-pull output
mode, or n-channel open-drain output
mode. Pull-up resistors are assignable by
software. Lower nibble pins, P2.3–P2.0, can
be assigned as external interrupt inputs with
noise filters, interrupt enable/disable, and
interrupt pending control.
2
3
5–8,
25–28
INT5–INT8
–
P3.0
P3.1
I/O
2-bit I/O port with bit-programmable pins.
Configurable to Schmitt trigger input mode,
push-pull output mode, or n-channel opendrain output mode. Pull-up resistors are
assignable by software. The two port 3 pins
have high current drive capability.
4
29
30
T0PWM/
T0CAP/
T1CAP/
REM/T0CK
XIN, XOUT
–
System clock input and output pins
–
2, 3
–
RESET
I
System reset signal input pin with schmitt
trigger circuit.
5
31
–
TEST
I
Test signal input pin (for factory use only;
must be connected to VSS).
–
4
–
VDD
–
Power supply input pin
–
32
–
VSS
–
Ground pin
–
1
–
1-5
PRODUCT OVERVIEW
S3C8095/P8095
PIN CIRCUITS
VDD
PULL-UP
RESISTOR
(Typical
50 ΚΩ)
PULL-UP
ENABLE
VDD
DATA
INPUT /
OUTPUT
OUTPUT
DISABLE
INTERRUPT INPUT
IRQ6,7 (INT0 -4)
NOISE
FILTER
VSS
NORMAL
INPUT
Figure 1-4. Pin Circuit Type 1 (Port 0)
1-6
S3C8095/P8095
PRODUCT OVERVIEW
PIN CIRCUITS (Cont.)
VDD
PULL-UP
RESISTOR
(Typical 50 ΚΩ)
PULL-UP
ENABLE
VDD
DATA
IN / OUT
OPEN-DRAIN
OUTPUT DISABLE
VSS
NORMAL INPUT
EXTERNAL
INTERRUPT
IRQ5 (INT5-8)
NOISE
FILTER
Figure 1-5. Pin Circuit Type 2 (Ports 2.0–2.3)
1-7
PRODUCT OVERVIEW
S3C8095/P8095
PIN CIRCUITS (Cont.)
VDD
PULL-UP
RESISTOR
(Typical 50 ΚΩ )
PULL-UP
ENABLE
VDD
DATA
IN / OUT
OPENDRAIN
OUTPUT
DISABLE
VSS
NORMAL INPUT
Figure 1-6. Pin Circuit Type 3 (Ports 1 and P2.4–P2.7)
1-8
S3C8095/P8095
PRODUCT OVERVIEW
PIN CIRCUITS (Cont.)
VDD
PULL-UP
RESISTOR
(Typical 50 Κ Ω)
PULL-UP
ENABLE
PORT 3
DATA
ALTERNATIVE
OUTPUT
SELECT
VDD
M
U
X
DATA
IN / OUT
OPENDRAIN
OUTPUT
DISABLE
VSS
NORMAL INPUT
ALTERNATIVE
INPUT
NOISE FILTER
Figure 1-7. Pin Circuit Type 4 (Port 3)
RESET
Figure 1-8. Pin Circuit Type 5 (R
RESET)
ESET
1-9
S3C8095/P8095
S3P8095 OTP
13
S3P8095 OTP
OVERVIEW
The S3P8095 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3C8095
microcontroller. It has an on-chip EPROM instead of masked ROM.
The S3P8095 is fully compatible with the S3C8095, both in function and in pin configuration. Because of its
simple programming requirements, the S3P8095 is ideal for use as an evaluation chip for the S3C8095.
VSS
XIN
XOUT
MODE/TEST
PGM /P2.0 / INT5
MEM_REG /P2.1 / INT6
A8/P2.2 / INT7
A9/P2.3 / INT8
A0/P0.0 / INT0
A1/P0.1 / INT1
A2/P0.2 / INT2
A3/P0.3 / INT3
A4/P0.4 / INT4
A5/P0.5 / INT4
A6/P0.6 / INT4
A7/P0.7 / INT4
1
2
3
4
5
6
7
S3P8095
8
32-SOP/SDIP
9
(Top View)
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VDD
RESET/ VPP
P3.1/REM/T0CK/ CE
P3.0/ OE
P2.7/ A13
P2.6/ A12
P2.5/ A11
P2.4/ A10
P1.7/ D7
P1.6/ D6
P1.5/ D5
P1.4/ D4
P1.3/ D3
P1.2/ D2
P1.1/ D1
P1.0/ D0
Figure 13-1. S3P8095 Pin Assignments
13-1
S3P8095 OTP
S3C8095/P8095
Table 13–1. Pin Descriptions used to read/write the EPROM
Pin Name
Pin No.
I/O
Function
A0 - A13
7 - 16, 25 - 28
O
Address lines to read/write EPROM
D0 - D7
17 - 24
I/O
8-bit data input/output lines to read/write EPROM
MODE
4
—
Select EPROM mode.
CE
30
I
Chip enable (Connect to VSS, when read/write EPROM)
OE
29
I
Output enable
PGM
5
I
EPROM Program enable
MEM_REG
6
I
Select Memory space of EPROM
VDD
32
–
Supply voltage (normally 5 V)
VPP
31
–
EPROM Program/Verify voltage (normally 12.5 V)
VSS
1
–
GROUND
XIN
2
–
System Clock input pin
XOUT
3
–
System Clock output pin
CHARACTERISTICS OF EPROM OPERATION
When +12.5 V is supplied to VPP and MODE pins of the S3P8095, the EPROM programming mode is entered.
The operating mode (read, write) is selected according to the input signals to the pins listed in Table2 as below.
Table 13-2. Operating Mode Selection Criteria
VDD
MODE
VPP
PGM
MEM
OE
5V
VPP
12.5 V
1
1
0
READ
0
1
1
PROGRAM
1
1
0
PROGRAM VERIFY
NOTE: "0" means Low level; "1" means High level.
13-2
Mode
S3C8095/P8095
S3P8095 OTP
A13 - A0
t OED
D7 - D0
t OEH
t ACC
OE
t OEW
12.5V
MODE
Figure 13-2. OTP Read Timing
Table 13-3. OTP Read characteristics
(TA = 25 °C ± 5°C, VDD = 5 V ± 5 %, VPP = 12.5 V ± 0.25V)
Parameter
Symbol
Min
Typ
Max
Units
Address to Output Delay
tACC
—
—
75
ns
OE to Address Delay
tOED
0
—
—
OE Pulse Width
tOEW
75
—
—
Output hold from OE
whichever occurs first
tOEH
0
—
—
13-3
S3P8095 OTP
S3C8095/P8095
PROGRAM
PROGRAM VERIFY
A13 - A0
D7 - D0
Data In Stable
Data Out Valid
t DS
t OEH
MODE
t DH
t VS
t OE
PGM
t PW
t OEW
OE
Figure 13-3. Program Memory Write Timing
Table 13-4. OTP Program/Program Verify Characteristics
(TA = 25 °C ± 5°C, VDD = 5 V ± 5 %, VPP = 12.5 V ± 0.25V)
Parameter
Symbol
Min
Typ
Max
Units
VPP Setup Time
tVS
—
2
—
µs
Data Setup Time
tDS
—
2
—
Data Hold Time
tDH
—
2
—
PGM Pulse Width
tPW
—
300
500
Data Valid from OE
tOE
75
—
—
OE Pulse Width
tOEW
75
—
—
Output Enable to Output Float
Delay
tOEH
0
—
130
13-4
ns
S3C8095/P8095
S3P8095 OTP
START
Address = First Location
VDD = 5 V, VPP = 12.5 V
X=0
Program One 1ms Pulse
Increment X
YES
X = 10
NO
FAIL
FAIL
Verify 1 Byte
Verify Byte
PASS
NO
Last Address
Increment Address
YES
VDD = VPP = 5V
Device Failed
FAIL
Compare All byte
PASS
Device Passed
Figure 13-4. OTP Programming Algorithm
13-5
S3C8095/P8095
14
ELECTRICAL DATA
ELECTRICAL DATA
OVERVIEW
In this section, S3C8095/P8095 electrical characteristics are presented in tables and graphs. The information is
arranged in the following order:
—
Absolute maximum ratings
—
D.C. electrical characteristics
—
Data retention supply voltage in Stop mode
—
Stop mode release timing when initiated by an external interrupt
—
Stop mode release timing when initiated by a Reset
—
I/O capacitance
—
A.C. electrical characteristics
—
Input timing for external interrupts (port 0, P2.3–P2.0)
—
Input timing for RESET
—
Oscillation characteristics
—
Oscillation stabilization time
14-1
ELECTRICAL DATA
S3C8095/P8095
Table 14-1. Absolute Maximum Ratings
(TA = 25 °C)
Parameter
Symbol
Conditions
Rating
Unit
Supply voltage
VDD
–
– 0.3 to + 6.5
V
Input voltage
VIN
–
– 0.3 to VDD + 0.3
V
Output voltage
VO
All output pins
– 0.3 to VDD + 0.3
V
Output current
High
I OH
One I/O pin active
– 18
mA
All I/O pins active
– 60
One I/O pin active
+ 30
Total pin current for ports 0, 1, and 2
+ 100
Total pin current for port 3
+ 20
Output current
Low
I OL
mA
Operating
temperature
TA
–
– 20 to + 85
°C
Storage
temperature
TSTG
–
– 65 to + 150
°C
Table 14-2. D.C. Electrical Characteristics
(TA = – 20 °C to + 85 °C, VDD = 2.0 V to 5.5 V)
Parameter
Symbol
Operating Voltage
VDD
Input High
voltage
Input Low voltage
Output High
voltage
14-2
Conditions
Min
Typ
Max
Unit
f OSC = 8 MHz
(Instruction clock = 1.33
MHz)
2.4
—
5.5
V
f OSC = 4 MHz
(Instruction clock = 0.67
MHz)
2.0
—
5.5
VIH1
All input pins except VIH2
and VIH3
0.8 VDD
–
VDD
VIH2
RESET
0.95 VDD
VDD
VIH3
XIN
VDD – 0.3
VDD
VIL1
All input pins except VIL2
and VIL3
VIL2
RESET
VIL3
XIN
VOH1
VDD= 3.0 V IOH = – 7 mA
Port 3 only
0
–
0.2 VDD
V
V
0.3 VDD
0.3
VDD – 2.0
–
–
V
S3C8095/P8095
ELECTRICAL DATA
Table 14-2. D.C. Electrical Characteristics (Continued)
(TA = – 20 °C to + 85 °C, VDD = 2.0 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output High
voltage
VOH2
VDD = 3.0 V
IOH = – 200 µA
All output pins except port 3
VDD – 1.0
–
–
V
Output Low
voltage
VOL1
VDD = 3.0 V
IOL = 1.5 mA, port 3 only
–
0.3
0.6
VOL2
IOL = 1 mA
Ports 0, 1 and 2
0.4
1.0
ILIH1
VIN = VDD; all input pins
except XIN and XOUT
–
1
ILIH2
VIN = VDD, XIN and XOUT
ILIL1
VIN = 0 V; all input pins
except XIN, XOUT, and
Input High
leakage current
Input Low
leakage current
–
µA
20
–
–
–1
µA
RESET
ILIL2
VIN = 0 V, XIN and XOUT
Output High
leakage current
ILOH
VOUT = VDD
All output pins
–
–
1
µA
Output Low
leakage current
ILOL
VOUT = 0 V
All output pins
–
–
–1
µA
Pull-up resistors
RL1
VIN = 0 V; TA = 25 °C
VDD = 5.0 V ± 10 %
Ports 0–3
30
50
100
KΩ
Supply current
IDD1
Operating mode;
VDD = 5.0 V ± 10 %
4-MHz crystal
–
4.5
9
mA
IDD2
Idle mode;
VDD = 5.0 V ± 10 %
4-MHz crystal
1.6
3
IDD3
Stop mode;
VDD = 5.0 V ± 10 %
0.3
3
VDD = 3.6 V
0.1
1
(See Note)
– 20
µA
NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads.
14-3
ELECTRICAL DATA
S3C8095/P8095
Table 14-3. Data Retention Supply Voltage in Stop Mode
(TA = – 20 °C to + 85 °C)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Data retention supply
voltage
VDDDR
–
1.0
–
5.5
V
Data retention supply
current
IDDDR
–
–
1
µA
VDDDR = 1.0 V
Stop mode
IDLE MODE
(Basic Timer active)
STOP MODE
NORMAL
OPERATING
MODE
DATA RETENTION MODE
V DD
VDDDR
EXT
INT
EXECUTION OF
STOP INSTRUCTION
0.8 V DD
0.2 V DD
t WAIT
Figure 14-1. Stop Mode Release Timing When Initiated by an External Interrupt
RESET
OCCURS
OSCILLATION
STABILIZATION
TIME
STOP MODE
NORMAL
OPERATING
MODE
DATA RETENTION MODE
VDD
VDDDR
RESET
Note :
EXECUTION OF
STOP INSTRUCTION
t WAIT is the same as 4096 x 16 x 1/f OSC
t WAIT
Figure 14-2. Stop Mode Release Timing When Initiated by a Reset
14-4
S3C8095/P8095
ELECTRICAL DATA
Table 14-4. Input/Output Capacitance
(TA = – 20 °C to + 85 °C, VDD = 0 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input
capacitance
CIN
f = 1 MHz; unmeasured pins
are connected to VSS
—
—
10
pF
Output
capacitance
COUT
I/O capacitance
CIO
Table 14-5. A.C. Electrical Characteristics
(TA = – 20 °C to + 85 °C)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Interrupt input,
High, Low width
tINTH,
tINTL
P0.0–P0.7, P2.3–P2.0
VDD = 5 V
200
300
—
ns
RESET input Low
width
tRSL
Input
VDD = 5 V
1000
—
—
t INTL
t INTH
0.8 V DD
0.2 V DD
NOTE: The unit t CPU means one CPU clock period.
Figure 14-3. Input Timing for External Interrupts (Port 0, P2.3–P2.0)
t RSL
RESET
0.3 V DD
Figure 14-4. Input Timing for RESET
14-5
ELECTRICAL DATA
S3C8095/P8095
Table 14-6. Oscillation Characteristics
(TA = – 20 °C + 85 °C)
Oscillator
Crystal
Clock Circuit
C1
XIN
Conditions
Min
Typ
Max
Unit
CPU clock oscillation
frequency
0.4
—
8
MHz
CPU clock oscillation
frequency
0.4
—
8
MHz
XIN input frequency
0.4
–
8
MHz
XOUT
C2
Ceramic
C1
XIN
XOUT
C2
External clock
Open
Pin
S3C8095
External
Clock
XIN
XOUT
Table 14-7. Recommended Oscillator Constants
(TA = – 20 °C + 85 °C, VDD = 4.5 V to 5.5 V)
Manufacturer
TDK
Product Name
Oscillator Voltage
Range (V)
Remarks
C1
C2
MIN
MAX
FCR4.0MC5 (note)
–
–
2.0
5.5
On-chip C Leaded Type
FCR4.0M5
33
33
2.0
5.5
Leaded Type
CCR4.0MC3 (note)
–
–
2.0
5.5
On-chip C SMD Type
FCR6.0MC5 (note)
–
–
2.0
5.5
On-chip C Leaded Type
FCR6.0M5
33
33
2.0
5.5
Leaded Type
(note)
–
–
2.0
5.5
On-chip C SMD Type
FCR8.0MC5 (note)
–
–
2.0
5.5
On-chip C Leaded Type
FCR8.0M5
33
33
2.0
5.5
Leaded Type
–
–
2.0
5.5
On-chip C SMD Type
CCR6.0MC3
CCR8.0MC5
(note)
NOTE: On-chip C: 30 pF ± 20 % built in.
14-6
Load Cap (pF)
S3C8095/P8095
ELECTRICAL DATA
Table 14-8. Oscillation Stabilization Time
(TA = – 20 °C + 85 °C, VDD = 4.5 V to 5.5 V)
Oscillator
Test Condition
Min
Typ
Max
Unit
Main crystal
f OSC > 400 kHz
—
—
20
ms
Main ceramic
Oscillation stabilization occurs when VDD is equal
to the minimum oscillator voltage range.
—
—
10
ms
External clock
(main system)
XIN input High and Low width (tXH, tXL)
25
—
500
ns
Oscillator
stabilization
wait time
tWAIT when released by a reset (1)
—
216 /
f OSC
—
ms
tWAIT when released by an interrupt (2)
—
—
—
ms
NOTES:
1. fOSC is the oscillator frequency.
2.
The duration of the oscillation stabilization time (tWAIT) when it is released by an interrupt is determined by the setting
in the basic timer control register, BTCON.
F OSC
(Main oscillation
frequency)
INSTRUCTION
CLOCK
C
1.33 MHz
8 MHz
B
1.00 MHz
6 MHz
A
670 kHz
4 MHz
500 kHz
250 kHz
400 kHz
8.32 kHz
1
2
3
4
5
6
7
SUPPLY VOLTAGE (V)
INSTRUCTION CLOCK = 1/6n x oscillator frequency (n = 1, 2, 8, 16)
A 2.0 V: 4 MHz,
B 2.2 V: 6 MHz,
C 2.4 V: 8 MHz
Figure 14-5. Operating Voltage Range
14-7
ELECTRICAL DATA
S3C8095/P8095
0
-1
-2
-3
VDD = 3V
-4
IOH
(mA)
-5
-6
VDD = 4V
-7
-8
VDD = 5V
-9
-10
0
0.5
1
1.5
2
2.5
3
3.5
VOH (V)
Figure 14-6. IOH vs. VOH (Port 0)
14-8
4
4.5
5
S3C8095/P8095
ELECTRICAL DATA
0
-1
-2
-3
VDD = 3V
-4
IOH
(mA)
-5
-6
VDD = 4V
-7
-8
VDD = 5V
-9
-10
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
VOH (V)
Figure 14-7. IOH vs. VOH (Port 2)
14-9
ELECTRICAL DATA
S3C8095/P8095
0
-4
-8
-12
VDD = 3V
-16
IOH
(mA) -20
-24
VDD = 4V
-28
-32
VDD = 5V
-36
-40
0
0.5
1
1.5
2
2.5
3
3.5
VOH (V)
Figure 14-8. IOH vs. VOH (Port 3)
14-10
4
4.5
5
S3C8095/P8095
ELECTRICAL DATA
20
18
16
VDD = 5V
14
12
VDD = 4V
IOL
(mA) 10
8
VDD = 3V
6
4
2
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3
VOL (V)
Figure 14-9. IOL vs. VOL (Port 0)
14-11
ELECTRICAL DATA
S3C8095/P8095
20
18
16
VDD = 5V
14
12
VDD = 4V
IOL
(mA) 10
8
VDD = 3V
6
4
2
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
VOL (V)
Figure 14-10. IOL vs. VOL (Port 2)
14-12
2.4
2.7
3
S3C8095/P8095
ELECTRICAL DATA
50
45
VDD = 5V
40
VDD = 4V
35
30
VDD = 3V
IOL
(mA) 25
20
15
10
5
0
0.35
0.7
1.05
1.4
1.75
2.1
2.45
2.8
3.15
3.5
VOL (V)
Figure 14-11. IOL vs. VOL (Port 3)
14-13
S3C8095/P8095
MECHANICAL DATA
15
MECHANICAL DATA
OVERVIEW
The S3C8095 microcontroller is currently available in a 32-pin SOP package.
0~8°
#1
#16
11.43
32-SOP-450A
0.78 ± 0.20
#17
8.34 ± 0.2
12.00± 0.3
#32
0.20 +0.10
(0.43)
0.40 ± 0.1
1.27
2.40MAX
19.90± 0.2
0.0MIN
2.00 ± 0.2
- 0.05
0.10 MAX
NOTE: Dimensions are in millimeters.
Figure 15-1. 32-Pin SOP Package Mechanical Data
15-1
MECHANICAL DATA
S3C8095/P8095
#17
1.00 ± 0.10
1.778
0.25 +0.1
5.08MAX
0.45 ± 0.10
3.30 ± 0.3
27.48 ± 0.2
3.80 ± 0.2
#16
27.88 MAX
(1.37)
– 0.05
10.16
32-SDIP-400
#1
0 – 15 °
0.51MIN
9.10 ± 0.20
#32
NOTE: Dimensions are in millimeters.
Figure 15-2. 32-Pin SDIP Package Mechanical Data
15-2