S6B0086 80 CH SEGMENT / COMMON DRIVER FOR DOT MATRIX LCD June. 2000. Ver. 0.0 Contents in this document are subject to change without notice. No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, for any purpose, without the express written permission of LCD Driver IC Team. S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD INTRODUCTION The S6B0086 is an LCD driver LSI which is fabricated by low power CMOS high voltage process technology. In segment driver mode, it can be interfaced in 1-bit serial or 4-bit parallel method by the controller. In common driver mode, dual type mode is applicable. And in segment mode application, the power down function reduces power consumption. FEATURES • Power supply voltage: + 5V ± 10 %, + 3V ± 10% • Supply voltage for display: 6 to 28V (VDD-VEE) • 4-bit parallel / 1-bit serial data processing (in segment mode) • Single mode operation / dual mode operation (in common mode) • Power down function (in segment mode) • Applicable LCD duty: 1/64 – 1/256 • Interface DRIVERS • COM (cascade) S6B0086 High voltage CMOS process • Bare die or TCP available 2 SEG (cascade) S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 TCP N C N C N C S C 8 0 S C 7 9 S C 7 8 S C 7 7 S C 7 6 S C 7 5 S C 7 4 ---------------- S C 7 S C 6 S C 5 S C 4 S C 3 S C 2 S C 1 D 4 D R D 3 D M D 2 D L D 1 S I D C L 2 A M S N C N C N C S6B0086 E R B V E E V 5 V 4 3 V 1 2 V 0 C S M #1 D I S P 0 F F B V D D S H L V S S C L 1 E L B #20 * Package Type = 100-TCP-35mm * Input Lead Pitch = 0.80mm * Output Lead Pitch = 0.22mm 3 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD 1 SC51 100 SC50 99 SC49 98 SC48 97 SC47 96 SC46 95 SC45 94 SC44 93 SC43 92 SC42 91 SC41 90 SC40 89 SC39 88 SC38 87 SC37 86 SC36 85 SC35 84 SC34 83 SC33 82 SC32 81 SC31 80 SC30 PAD DIAGRAM (S6B0086 / S6B0086 TCP) 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Y (0, 0) X Chip size: 4530 × 4390 Pad size: 98 × 98 Unit: µ m S6B0086 ERB 31 VEE 32 V5 33 V43 34 V12 35 V0 36 CS 37 M 38 DISPOFFB 39 VDD 40 SHL 41 VSS 42 D4_DR 43 D3_DM 44 D2_DL 45 D1_SID 46 CL2 47 AMS 48 CL1 49 ELB 50 SC52 SC53 SC54 SC55 SC56 SC57 SC58 SC59 SC60 SC61 SC62 SC63 SC64 SC65 SC66 SC67 SC68 SC69 SC70 SC71 SC72 SC73 SC74 SC75 SC76 SC77 SC78 SC79 SC80 4 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 SC29 SC28 SC27 SC26 SC25 SC24 SC23 SC22 SC21 SC20 SC19 SC18 SC17 SC16 SC15 SC14 SC13 SC12 SC11 SC10 SC9 SC8 SC7 SC6 SC5 SC4 SC3 SC2 SC1 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 PAD CENTER COORDINATES (S6B0086 / S6B0086TCP) Pad Pad Coordinates Pad Pad Coordinates Pad Pad No. Name X Y No. Name X Y No. Name Coordinates X Y 1 SC51 -1690 1959 35 V12 -900 -1959 69 SC19 2029 544 2 SC52 -2029 1884 36 V0 -775 -1959 70 SC20 2029 678 3 SC53 -2029 1750 37 VS -600 -1959 71 SC21 2029 812 4 SC54 -2029 1616 38 M -475 -1959 72 SC22 2029 946 5 SC55 -2029 1482 39 DISP0FFB -350 -1959 73 SC23 2029 1080 6 SC56 -2029 1348 40 VDD -225 -1959 74 SC24 2029 1214 7 SC57 -2029 1214 41 SHL -100 -1959 75 SC25 2029 1348 8 SC58 -2029 1080 42 VSS 25 -1959 76 SC26 2029 1482 9 SC59 -2029 946 43 D4_DR 266 -1959 77 SC27 2029 1616 10 SC60 -2029 812 44 D3_DM 470 -1959 78 SC28 2029 1750 11 SC61 -2029 678 45 D2_DL 711 -1959 79 SC29 2029 1884 12 SC62 -2029 544 46 D1_SID 915 -1959 80 SC30 1690 1959 13 SC63 -2029 410 47 CL2 1040 -1959 81 SC31 1529 1959 14 SC64 -2029 276 48 ELB 1165 -1959 82 SC32 1368 1959 15 SC65 -2029 142 49 CL1 1290 -1959 83 SC33 1207 1959 16 SC66 -2029 8 50 ELB 1496 -1959 84 SC34 1046 1959 17 SC67 -2029 -126 51 SC1 2029 -1884 85 SC35 885 1959 18 SC68 -2029 -260 52 SC2 2029 -1735 86 SC36 724 1959 19 SC69 -2029 -394 53 SC3 2029 -1601 87 SC37 563 1959 20 SC70 -2029 -528 54 SC4 2029 -1467 88 SC38 402 1959 21 SC71 -2029 -662 55 SC5 2029 -1333 89 SC39 241 1959 22 SC72 -2029 -797 56 SC6 2029 -1199 90 SC40 80 1959 23 SC73 -2029 -931 57 SC7 2029 -1065 91 SC41 -80 1959 24 SC74 -2029 -1065 58 SC8 2029 -931 92 SC42 -241 1959 25 SC75 -2029 -1199 59 SC9 2029 -797 93 SC43 -402 1959 26 SC76 -2029 -1333 60 SC10 2029 -662 94 SC44 -563 1959 27 SC77 -2029 -1467 61 SC11 2029 -528 95 SC45 -724 1959 28 SC78 -2029 -1601 62 SC12 2029 -394 96 SC46 -885 1959 29 SC79 -2029 -1735 63 SC13 2029 -260 97 SC47 -1046 1959 30 SC80 -2029 -1884 64 SC14 2029 -126 98 SC48 -1207 1959 31 ERB -1479 -1959 65 SC15 2029 8 99 SC49 -1368 1959 32 VEE -1275 -1959 66 SC16 2029 142 100 SC50 -1529 1959 33 V5 -1150 -1959 67 SC17 2029 276 34 V43 -1025 -1959 68 SC18 2029 410 5 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD BLOCK DIAGRAM SC1 SC2 SC3 SC78SC79SC80 V0 V12 80-bit 4-level Driver V43 V5 VEE 80-bit Driver M DISP0FFB Output Level Selector D1_SID D2_DL LCK 80-bit Data Latch/ Common Data bi-directional shift register D3_DM D4_DR SCK Data Latch Control CL1 CL2 20 x 4-bit Segment Data bi-directional Shift Register Clock Control ERB CS Power Down Function AMS VSS ELB 6 VDD 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 BLOCK DESCRIPTION Name Clock control Data latch control Power down function Output level selector Function Generates latch clock (LCK), shift clock (SCK) and control clock timing according to the input of CL1, CL2 and control inputs (CS, AMS). In common driver application mode, this block generates the shift clock (LCK) for the common data Bi-directional shift register. Determines the direction of segment data shift, and input data of each Bi-directional shift register. In 4-bit segment data parallel transfer mode, data is shifted by a 4-bit unit. In common driver application mode, data is transferred to the common data shift register directly, which disables this block. Controls the clock enable state of the current driver according to the input value of enable pin (ELB or ERB). If enable input value is “Low”, every clock of the current driver is enabled and the clock control block works. But if enable input is “High”, current driver is disabled and the input data value has no effect on the output level. So power consumption can be lowered. Controls the output voltage level according to the input control pin (M and DISPOFFB) (refer to PIN DESCRIPTION). COM / SEG COM / SEG SEG SEG COM / SEG 20x4-bit segment data I-directional shift register Stores output data value by shifting the input values. In 1-bit serial interface mode application, all 80 shift clocks (SCK) are needed to store all the display data. But in 4-bit parallel transfer mode application, only 20 clocks are needed. In common driver application mode, this block does not work. SEG 80-bit data latch / In segment driver application mode, the data from the 20x4-bit segment data shift register are latched for segment driver output. In single-type common driver application,1-bit input data (from DL or DR pin) is shifted and latched by the direction according to the SHL signal input. In dual-type common application mode, 80-bit registers are divided by two blocks and controlled independently (refer to NOTE 3). COM / SEG 80-bit level shifter Voltage level shifter block for high voltage part. The inputs of this block are of logical voltage level and the outputs of this block are at high voltage level value. These values are input in to the driver. SEG 80-bit 4-level driver Selects the output voltage level according to M and latched data value. If the data value is "High" the driver output is at selected voltage level (V0 or V5), and in the reverse case the driver output value is at the non-selected level (V12 or V43). In segment driver application mode, non-selected output value is V2 or V3. and when in common driver application, this value becomes V1 or V4. SEG common data I-directional shift register 7 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD PIN DESCRIPTION Pin I/O Name VSS Power supply VEE SC1 - SC80 Interface Logical "High" input port (+5V ± 10%, +3V ± 10%) VDD V0, V12, V43, V5 Function 0V (GND) Power Logical "Low" for high voltage part I LCD driver output voltage level O LCD driver output Bias supply voltage input to drive the LCD. Bias voltage divided by the resistance is usually used as a supply voltage source (refer to NOTE 2). Display data output pin which corresponds to the respective latch contents. One of V0, V12, V34 and V5 is selected as a display driving voltage source according to the combination of the latched data level and M signal (refer to NOTE 1). Power LCD Clock pulse input for the bi-directional shift register. – In segment driver application mode, the data is shifted to 20 x 4-bit segment data shift CL2 I Data shift clock The clock pulse, which was input when the enable bit (ELB/ERB) is in not active condition, is invalid. Controller – In common driver application mode, the data is shifted to 80-bit common data bi-directional shift register by the CL1 clock. Hence, this clock pin is not used (Open or connect this pin to VDD). M AC signal for LCD driver output Alternate signal input pin for LCD driving. Normal frame inversion signal is input in to this pin. Controller Controller I Data latch clock – In segment driver application mode, this signal is used for latching the shift register contents at the falling edge of this clock pulse. CL1 pulse "High" level initializes power-down function block. – In common driver application mode, CL1 is used as a shifting clock of common output data. DISPOFFB I Display OFF control Control input pin to fix the driver output (SC1~SC80) to V0 level, during "Low" value input. LCD becomes non-selected by V0 level output from every output of segment drivers and every output of common drivers. Controller CS I COM / SEG mode control When CS = "Low", S6B0086 is used as an 80-bit segment driver. When CS = "High", S6B0086 is set to an 80-bit common driver VDD / VSS CL1 8 I 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 According to the input value of the AMS and the CS pin, application mode of S6B0086 is differs as shown below. AMS I Application mode select CS 0 0 AMS 0 1 1 0 1 1 Application mode 4-bit parallel interface mode 1-bit serial interface mode Single type application mode Dual type application mode COM/SEG VDD / VSS COM PIN DESCRIPTION (CONTINUED) Pin I/O Name D1_SID, D2_DL, D3_DM, D4_DR I/O Display data input / serial input data / left, right data input output SHL Input Shift direction control Function In segment driver application mode, these pins are used as 4-bit data input pin (when 4-bit parallel interface mode : AMS = "Low"), or D1_SID is used as serial data input pin and other pins are not used (connect these to VDD) (when 1-bit serial interface mode : AMS = "High"). – In common driver application mode, the data is shifted from D2_DL(D4_DR) to D4_DR(D2_DL), when in single type interface mode (AMS = "Low"). In dualtype application case, the data are shifted from D2_DL and D3_DM (D4_DR and D3_DM) to D4_DR(D2_DL). In each case the direction of the data shift and the connection of data pins are determined by SHL input (refer to NOTE 3, NOTE 4). I/O Controller When SHL = "Low", data is shifted from left to right. When SHL = "High", the direction is reversed. (refer to NOTE3) – ELB, ERB Interface VDD/VSS In segment driver application mode, the internal operation is enabled only when enable input (ELB or ERB) is “Low” (power down function). When several drivers are serially connected, the enable state of each driver is shifted according to the SHL input. Connect these pins as below. Enable data input/output Segment Driver L H - ELB Output (open) Input (VSS) ERB Input (VSS) Output (open) In common driver application mode, power down function is not used. Open these pins. 9 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD NOTE 1. Output Level Control 10 M Latched data DISPOFFB L L L Output level (SC1 – SC80) SEG Mode COM Mode H V12 (V2) V12 (V1) H H V0 V5 H L H V43 (V3) V43 (V4) H H H V5 V0 X X L V0 V0 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 NOTE 2. LCD Driving Voltage Application Circuit (1) Segment driver application (CS = “Low”) VDD VDD C V0 R V1 R V2 (n-4)R R R V0 V12 V3 V4 V5 SEG1SEG80 to COM Driver to LCD Panel S6B0086 V43 V0, V5 V2, V3 to COM Driver V5 VSS VEE Selection Level Non-selection Level * n = 9 (when 1/64 duty) to 17 (when 1/256 duty) (2) Common driver application (CS = “High”) VDD VDD C V0 R R V1 V2 (n-4)R V3 R V4 R V0 V5 VEE VDD COM1COM80 V12 to LCD Panel S6B0086 to SEG Driver V43 V5 V0, V5 V1, V4 VSS Selection Level Non-selection Level * n = 9 (when 1/64 duty) to 17 (when 1/256 duty) 11 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD NOTE 3. Data Shift Direction according to Control Signals (1) When CS = “Low” (segment driver application) AMS SHL Application mode L 4-Bit Parallel Data Transfer Mode (SEG) L H Input Pin Data Direction D1 D2 D3 D4 S S S S C C C C 1 2 3 4 S C 7 3 S C 7 4 S C 7 5 D D D D 1 2 3 4 D D D D D D D D 1 2 3 4 1 2 3 4 S C 7 9 S C 8 0 S S S S C C C C 1 2 3 4 S C 7 3 D D D D 4 3 2 1 D D D D D D D D 4 3 2 1 4 3 2 1 S S S S C C C C 1 2 3 4 L S C 7 4 S C 7 5 S C 7 3 S C 7 6 S C 7 7 D1 D2 D3 D4 S C 7 4 S C 7 5 S C 7 6 S C 7 8 S C 7 9 S C 8 0 D1_SID, D2_DL, D3_DM D4_DR last data S C 7 7 S C 7 8 S C 7 9 S C 8 0 Shift Direction first data Last data (D1_SID) D1_SID S S S S C C C C 1 2 3 4 H S C 7 3 Shift Direction first data 12 S C 7 8 first data last data first data H S C 7 7 Shift Direction Shift Direction 1-Bit Serial Data Transfer Mode (SEG) S C 7 6 S C 7 4 S C 7 5 S C 7 6 S C 7 7 S C 7 8 S C 7 9 Last data S C 8 0 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 (2) When CS = “High” (common driver application) AMS SHL Application mode Input Pin Data Direction Shift Direction S S S C C C 1 2 3 L Single-type Application Mode (COM) L S C 3 8 S C 4 0 S C 4 1 S C 4 2 S C 4 3 S C 7 8 Input Data (D2_DL) S C 7 9 S C 8 0 D2_DL Output Data (D4_DR) Shift Direction S C 3 8 S S S C C C 1 2 3 H S C 3 9 S C 3 9 S C 4 0 S C 4 1 S C 4 2 S C 4 3 Output Data (D2_DL) S C 7 8 S C 7 9 S C 8 0 D4_DR Input Data (D2_DR) Shift Direction S S S C C C 1 2 3 L Dual-type Application Mode (COM) H H S C 3 8 S C 3 9 Input Data 1 (D2_DL) S C 4 0 S C 4 1 S C 4 2 S C 4 3 Input Data 2 (D3_DM) S C 7 8 S C 7 9 S C 8 0 D2_DL, D3_DM Output Data (D4_DR) Shift Direction S S S C C C 1 2 3 Output Data (D2_DL) S C 3 8 S C 3 9 S C 4 0 S C 4 1 S C 4 2 Input Data 2 (D3_DM) S C 4 3 S C 7 8 S C 7 9 S C 8 0 D4_DR, D3_DM Input Data 1 (D4_DR) 13 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD NOTE 4. Usage of Data Pins COM / SEG Application mode (CS pin) (AMS pin) SEG (CS =”Low”) COM (CS = “High”) SHL Data interface pin D1_SID D2_DL D3_DM D4_DR D2 (input2) D3 (input3) D4 (input4) 4-bit parallel interface mode (AMS = “Low”) X D1 (input) 1-bit serial interface mode (AMS = “High”) X SID (input) single-type application mode (AMS = “Low”) dual-type application mode (AMS = “High”) L H open L Connect to VDD DL (input) DL (output) DR (output) DR (input) DL (input1) DM (input2) DR (output2) DL (output2) DM (input2) DR (input1) open H Open MAXIMUM ABSOLUTE LIMIT Characteristic Symbol Value Power supply voltage VDD -0.3 – +7.0 Driver supply voltage VLCD 0 – +30 Input voltage VIN -0.3 – VDD + 0.3 Operating temperature Topr -30 – +85 Storage temperature Tstg -55 – +150 * NOTE: Voltage greater than above may do damage to the circuit. 14 Unit V °C 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS (1) Segment Driver Application (VSS = 0V, Ta = - 30 – +85°C) Typ. Max. Unit Characteristic Symbol Test Condition Min. Operating Voltage1 VDD - 2.7 - 5.5 VLCD VIN = VDD - VEE 6 - 28 VIH - 0.8VDD - VDD VIL - 0 - 0.2VDD VOH IOH = -0.4mA VDD-0.4 - - VOL IOL = 0.4mA - - 0.4 Input leakage current 1 (1) IIL1 VIN = VDD to VSS -10 - 10 Input leakage current 2 (3) IIL2 VIN = VDD to VEE -25 - 25 On resistance (4) RON ION = 100µA - 2 4 kΩ VSS pin - - 100 µA VDD = 5V - - 5 VDD = 3V - - 2 VDD = 5V - - 500 Input voltage (1) Output voltage (2) Supply current (5) V V µA ISTBY f CL1 = 32kHz M = VSS IDD f CL1 = 32kHz IEE f M = 80Hz mA µA NOTES: 1. Applied to CL1, CL2, ELB, ERB, D1_SID - D4_DR, SHL, DISPOFFB, M, CS, AMS pin 2. ELB, ERB pin 3. V0, V12, V43, V5 pin 4. VLCD = VDD - VEE, V0 = VDD = 5V, V5= VEE = -23 V V12 = VDD-2/n(VLCD), V43 = VEE+2/n(VLCD), n = 17 (1/256 duty, 1/17 bias) 5. V0 = VDD, V12 = 1.71V(VDD = 5V) or -0.06V (VDD = 3V), V43 = -19.71 V(VDD = 5V) or -19.94V (VDD = 3V), V5 = VEE = -23V, no-load condition (1/256 duty, 1/17 bias) 4-bit parallel interface mode ISTBY : VDD = 5V, fCL2 = 5.12MHz, SHL = VSS, DISPOFFB = VDD, M = VSS, display data pattern = 0000 IDD : VDD = 3V, fCL2 = 4MHz, display data pattern = 0101 VDD = 5 V, fCL2 = 5.12MHz, display data pattern = 0101 IEE : VDD = 5V, fCL2 = 5.12MHz, display data pattern = 0101, VEE pin 15 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD DC CHARACTERISTICS (CONTINUED) (2) Common Driver Application (VSS = 0V, Ta = - 30 – +85°C) Characteristic Symbol Test Condition Min. Typ. Max. Operating VDD - 2.7 - 5.5 voltage VLCD VIN = VDD - VEE 6 - 28 VIH - 0.8VDD - VDD VIL - 0 - 0.2VDD VOH IOH = -0.4mA VDD-0.4 - - VOL IOL = 0.4mA - - 0.4 Input leakage current 1 (1) IIL1 VIN = VDD to VSS -10 - 10 Input leakage current 2 (2) IIL2 VIN = 0V, VDD = 5V (PULL UP) -50 -125 -250 Input leakage current 3 (4) IIL3 VIN = VDD to VEE -25 - 25 On resistance(5) RON ION = 100µA - 2 4 VSS pin - - 100 VDD = 5V - - 200 VDD = 3V - - 120 VDD = 5V - - 150 Input voltage (1) Output voltage (3) Supply current (6) ISTBY f CL1 = 32kHz IDD f CL1 = 32kHz IEE f M = 80Hz NOTES: 1. Applied to CL1, D2_DL (SHL = LOW), D4_DR (SHL = HIGH), SHL, DISPOFFB, M, CS, AMS pin 2. Pull-up input pins : CL2, D1_SID, D3_DM (AMS = HIGH), ELB (SHL = LOW), ERB (SHL = HIGH) 3. D2_DL (SHL = HIGH) , D4_DR (SHL = LOW) pin 4. V0, V12, V43, V5 pin 5. VLCD = VDD-VEE, V0 = VDD = 5V, V5 = VEE = -23V V12 = VDD-1/n(VLCD), V43 = VEE+1/n(VLCD), n = 17(1/256 duty, 1/17 bias) 6. V0 = VDD, V12 = 3.35V (VDD = 5V) or 1.47V (VDD = 3V), V43 = -21.35V (VDD = 5 V) or -21.47V (VDD = 3 V), V5 = VEE = -23 V, no-load condition (1/256 duty, 1/17 bias) single-type mode operation : AMS = VSS, SHL = VSS, DISPOFFB = VDD D1_SID = D3_DM = VDD, D4_DR = OPEN, ELB = ERB = OPEN, ISTBY : VDD = 5V, M = VSS, D2_DL = VSS IDD : fM = 80Hz, D2_DL = VDD VDD = 3 V, display data pattern = 10000000..., 01000000..., 00100000..., 00010000..., .. VDD = 5 V, display data pattern = 10000000..., 01000000..., 00100000..., 00010000..., .. IEE : fM = 80Hz, D2_DL = VDD VDD = 5V, current through VEE Pin, display data pattern = 10000000..., 01000000..., 00100000..., 00010000... 16 Unit V V µA kΩ µA 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 AC CHARACTERISTICS (1) Segment Driver Application (VSS = 0V, Ta = - 30 – +85°C) Characteristic Symbol Test (1) VDD = 5V ± 10% (2) VDD = 3V ± 10% Condition Min. Typ. Max. Min. Typ. Max. Clock cycle time tCY Duty = 50% 125 - - 250 - - Clock pulse width tWCK - 45 - - 95 - - Clock rise / fall time tR/tF - - - - - - 30 Data set-up time tDS - 30 - - 65 - - Data hold time tDH - 30 - - 65 - - Clock set-up time tCS - 80 - - 120 - - Clock hold time tCH - 80 - - 120 - - Propagation delay time tPHL - - - - ELB,ERB set-up time tPSU DISPOFFB low pulse width ELB Output ERB Output ELB Input 30 ERB Input 30 tWDL - DISPOFFB clear time tCD - M - OUT propagation delay time tPD1 CL1 - OUT propagation delay time tPD2 DISPOFFB - OUT propagation delay time tPD3 CL = 15pF 60 60 - - 1.2 - - 100 - - 65 ns 125 125 - - 1.2 - - - 100 - - 1.0 - - 1.2 - - 1.0 - - 1.2 - - 1.0 - - - 65 Unit µs ns µs 17 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD AC CHARACTERISTICS (CONTINUED) (2) Common Driver Application (VSS = 0V, Ta = - 30 – +85°C) Characteristic Symbol Test (1) VDD = 5 V ± 10% (2) VDD = 3V ± 10% Condition Min. Typ. Max. Min. Typ. Max. Clock cycle time tCY Duty = 50% 250 - - 500 - - Clock pulse width tWCK - 45 - - 95 - - Clock rise / fall time tR/tF - - - 50 - - 50 Data set-up time tDS - 30 - - 65 - - Data hold time tDH - 30 - - 65 - - DISPOFFB low pulse width tWDL - 1.2 - - 1.2 - - DISPOFFB clear time tCD - 100 - - 100 - - Output delay time tDL - - 200 - - 250 M – OUT propagation delay time tPD1 - - 1.0 - - 1.2 CL1 - OUT propagation delay time tPD2 - - 1.0 - - 1.2 DISPOFFB - OUT propagation delay time tPD3 - - 1.0 - - 1.2 18 CL = 15pF Unit ns µs ns µs 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 AC CHARACTERISTICS (CONTINUED) (3) Segment Driver Application Timing 0.8VDD 0.2VDD CL1 0.8VDD 0.2VDD tWCK tCS CL2 0.8VDD 0.2VDD 0.8VDD 0.8VDD 0.2VDD 0.2VDD tWCK tR tCH tWCK tDS tF tCY tDH 0.8VDD 0.2VDD D1_SID - D4_DR tCD tWDL DISP0FFB CL1 1 2 3 19 20 0.8VDD CL2 0.2VDD tPHL ELB, ERB (Output 1) 0.2VDD tPSU ELB, ERB (Input 2) 0.2VDD 0.8VDD 0.2VDD M tPD1 CL1 DISPOFFB tPD2 0.2VDD 0.8VDD 0.2VDD tPD3 SC1 - SC80 (Latched Data) 19 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD AC CHARACTERISTICS (CONTINUED) (4) Common Driver Application Timing tCY CL1 0.8VDD 0.8VDD tDWCKH 0.2VDD 0.2VDD tR tF tDS (*1) DI tF tDH 0.8VDD 0.8VDD 0.2VDD 0.2VDD tDL 0.8VDD (*1) DO tCD tWDL 0.2VDD DISP0FFB (*1) When in single-type interface mode DI => D2_DL (SHL = L), D4_DR (SHL = H) DO => D4_DR (SHL = L ), D2_DL (SHL = H) When in dual-type interface mode DI => D2_DL and D3_DM (SHL = L), D4_DR and D3_DM (SHL = H) DO => D4_DR (SHL = L), D2_DL (SHL = H) 0.8VDD 0.2VDD M tPD1 CL1 DISPOFFB tPD2 0.2VDD 0.8VDD 0.2VDD tPD3 SC1 - SC80 (Latched Data 20 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 POWER DOWN FUNCTION In the case of cascade connection of segment mode drivers, S6B0086 has a "power down function" In order to reduce the power consumption. SHL Enable input Enable output Current driver status The other drivers status L ERB ELB While ERB ="Low", current driver is enabled. Disabled H ELB ERB While ELB ="Low", current driver is enabled. Disabled * In the case of common driver application, power down function does not work. CL1 n-1 n 1 2 n-1 n 1 2 n-1 n 1 2 n-1 ~ ~ 2 ~ ~ 1 ~ ~ n-1 n ~ ~ 2 ~ ~ 1 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ERB3/ELB4 (Output3/Input4) ~ ~ ERB2/ELB3 (Output2/Input3) ~ ~ ERB1/ELB2 (Output1/Input2) ~ ~ ELB1(input1) ~ ~ ~ ~ CL2 ELB4 (Output4) NOTES: 1. SHL = High (EBL = Input, ERB = Output) Current S6A0086's ERB must be connected to the next S6A0086's ELB. 2. When in 4-bit parallel interface mode: n = 20 When in 1-bit serial interface mode: n = 80 21 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD OPERATION TIMING DIAGRAM (1) 4-bit Parallel Mode Interface Segment Driver • When SHL = "Low" 19 20 D1_SID SC5 SC1 D2_DL SC6 D3_DM D4_DR 1 2 3 19 20 1 2 SC77 SC73 SC69 SC5 SC1 SC77 SC73 SC2 SC78 SC74 SC70 SC6 SC2 SC78 SC74 SC7 SC3 SC79 SC75 SC71 SC7 SC3 SC79 SC75 SC8 SC4 SC80 SC76 SC72 SC8 SC4 SC80 SC76 2 3 19 20 1 2 CL2 ELB (Input) ERB (Output) CL1 SC1 - SC80 • When SHL = “High” 19 20 1 D1_SID SC76 SC80 SC4 SC8 SC12 SC76 SC80 SC4 SC8 D2_DL SC75 SC79 SC3 SC7 SC11 SC75 SC79 SC3 SC7 D3_DM SC74 SC78 SC2 SC6 SC10 SC74 SC78 SC2 SC6 D4_DR SC73 SC77 SC1 SC5 SC9 SC73 SC77 SC1 SC5 CL2 ERB (Input) ELB (Output) CL1 SC1 - SC80 22 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 (2) 1-bit Serial Mode Interface Segment Driver • When SHL = “Low” 79 80 1 SC2 SC1 SC80 79 80 1 SC79 SC80 2 3 79 80 1 2 SC79 SC78 SC2 SC1 SC80 SC79 CL2 D1_SID ELB (Input) ERB (Output) CL1 SC1 - SC80 • When SHL = “High” 2 3 79 80 1 2 SC2 SC3 SC79 SC80 SC1 SC2 CL2 D1_SID SC1 ERB (Input) ELB (Output) CL1 SC1 - SC80 23 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD (3) Single-type Interface Mode Common Driver • When SHL = “Low” 79 80 1 2 79 80 1 2 79 80 1 2 CL1 D2_DL D4_DR COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA79 COM_DATA80 Current Driver's COMMON area • When SHL = “High” 79 80 1 2 CL1 D4_DR D2_DL COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA79 COM_DATA80 Current Driver's COMMON area 24 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 (4) DUAL-type Interface Mode Common Driver • When SHL = “Low” 1 2 3 39 40 1 2 3 39 40 39 40 CL1 D2_DL D3_DM D4_DR COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA39 COM_DATA40 COM_DATA41 COM_DATA42 COM_DATA43 COM_DATA79 COM_DATA80 • When SHL = “High” 1 2 3 39 40 1 2 3 CL1 D2_DL D3_DM D4_DR COM_DATA1 COM_DATA2 COM_DATA3 COM_DATA39 COM_DATA40 COM_DATA41 COM_DATA42 COM_DATA43 COM_DATA79 COM_DATA80 25 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD (5) Common / Segment Driver Timing (1/200 DUTY) 199 200 1 200 1 199 200 1 199 CL1 Latched Data (SEG) M COM_DATA1 COM_DATA199 COM_DATA200 COM1 V0 V1 V4 V5 V0 V1 COM199 V4 V5 V0 V1 COM200 V4 V5 SEG_DATA1 V0 V1 V2 SEG1 V3 V4 V5 1 CL2 CL1 D1 - D4 Latched_Data M Enable Out 26 2 18 19 20 1 200 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 APPLICATION INFORMATION 1-bit Serial Interface Mode (80-Ch. Segment Driver) a) Lower View (SHL = L, AMS = H ) LCD PANEL S1 S80 S81 S160 Sn Sn+80 SC80 ERB SC1 ELB SC80 ERB SC1 ELB SC80 ERB SC1 ELB CS CS CS AMS AMS AMS D2_DLSHL D1_SID D4_DR D2_DLSHL D1_SID D4_DR SHL D1_SID D2_DLD4_DR 1-bit serial data input b) Upper View (SHL = H, AMS = H) 1-bit serial data input D2_DLD4_DR D1_SID SHL AMS D2_DLD4_DR CS D1_SID SHL AMS CS ELB ERB ELB ERB SC1 SC80 SC1 S81 S1 S80 D1_SID D2_DLD4_DR SHL AMS CS ERB SC80 ELB SC1 SC80 S160 Sn Sn+80 LCD PANEL 27 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD 4-Bit Parallel Interface Mode (80 Ch. Segment Driver) a) Lower View (SHL = L, AMS = L ) LCD PANEL S1 SC80 ERB S80 S81 SC1 ELB SC80 ERB S160 Sn SC1 ELB Sn+80 SC80 ERB CS CS CS AMS AMS AMS SHL D1_SID-D4_DR SHL D1_SID-D4_DR SHL 4-bit serial data input 4 SC1 ELB D1_SID-D4_DR 4 4 b) Upper View (SHL = H, AMS = L) 4-bit serial data input 4 4 D1_SID-D4_DR SHL 4 D1_SID-D4_DR SHL AMS AMS CS SHL AMS CS CS ELB ERB ELB ERB SC1 SC80 SC1 SC80 ELB SC1 ERB SC80 S81 S160 Sn Sn+80 S1 S80 LCD PANEL 28 D1_SID-D4_DR 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 Single-type Interface Mode (80 Ch. Common Driver) input data 1 D4_DR SC80 C1 CS AMS SHL D2_DL D4_DR SC1 C80 SC80 C81 LCD PANEL CS AMS SHL D2_DL D4_DR SC1 C160 SC1 C161 SC1 C240 CS AMS SHL D2_DL 29 S6B0086 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD Dual-type Interface Mode (40 Ch. + 40 Ch. Common Driver) input data 1 D4_DR SC80 C1 SC1 C80 SC80 C81 SC1 C160 SC80 C161 SC40 C200 SC41 C201 SC1 C240 SC80 C241 CS AMS SHL D2_DL D4_DR LCD PANEL (1/2) CS AMS SHL input data 2 D3_DM D2_DL D4_DR CS AMS SHL D2_DL D4_DR CS AMS SHL D2_DL D4_DR SC1 C320 SC80 C321 SC1 C400 LCD PANEL (2/2) CS AMS SHL D2_DL NOTE: Using this application mode (dual-type common mode), the duty ratio can be reduced to half. In case, 1/200 duty can be used to drive the 400 common LCD panel. 30 80CH COMMON / SEGMENT DRIVER FOR DOT MATRIX LCD S6B0086 APPLICATION CIRCUIT EXAMPLE VDD COM /SEG R 4 4 4 4 4 4 V1 COM R V0-V5 D1_SID - D4_DR V2 (n-4)R COM VSS V5 AMS CS CS CS SHL SC1 SHL ELB V4 R AMS M V3 SEG R V0-V5 D1_SID - D4_DR DISPOFFB CL1 M CL2 ELB S6B0086 ERB AMS DISPOFFB SEG COM /SEG S6B0086 CL1 V0-V5 D1_SID - D4_DR CL1 DISPOFFB CL2 M ERB ELB SC80 SC1 SEG - SEG80 S1 VEE M DISPOFFB CS AMS D4_DR SC80 S80 CL2 S6B0086 ERB SHL SC80 SC1 SEG - SEG80 S81 S160 SC80 SEG - SEG80 S161 S240 C1 COM1 COM80 S6B0086 SC1 C80 SHL V0-V5 CL1 D2_DL M D4_DR 4 DISPOFFB CS AMS SC80 C81 240 x 240 LCD MODULE COM1 COM80 S6B0086 SC1 C161 SHL V0-V5 CL1 D2_DL M D4_DR SC80 4 DISPOFFB Controller DISPOFFB FRAME(M) CS AMS COM_DATA D1 - D4 CL1 CL2 S6B0086 SC1 SHL 4 V0-V5 CL1 C161 COM1 COM80 C240 D2_DL 31