RAiO RA0086 - NewHaven Display

RAiO
RA0086
80 CH Segment/Common Driver
For Dot Matrix LCD
Specification
Version 1.1
December 29, 2009
RAiO Technology Inc.
©Copyright RAiO Technology Inc. 2009
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
Update History
Version
Date
1.0
July 07, 2009
1.1
December 29, 2009
瑞佑科技 RAiO TECHNOLOGY INC.
Description
Preliminary version
Add Section 7-2 Die Form and 7-3 PAD Coordinate
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RA0086
Version 1.1
Chapter
80CH Common / Segment Driver For DOT Matrix LCD
Content
Page
1. Introduction .............................................................................................. 4
2. Features .................................................................................................... 4
3. Pin Configuration ..................................................................................... 4
3-1 Internal Block Diagram ........................................................................................ 4
3-2 Pin Assignment .................................................................................................... 5
3-3 System Block Diagram ........................................................................................ 5
4. Signal Description.................................................................................... 6
4-1 Block Description................................................................................................. 6
4-2 Pin Description ..................................................................................................... 7
4-2-1
4-2-2
4-2-3
4-2-4
Output Voltage Level Control............................................................................................... 8
LCD Driving Voltage Application Circuit............................................................................. 9
Data Shift Direction according to Control Signals........................................................... 10
Usage of Data Pins .............................................................................................................. 12
5. Electrical Characteristics ...................................................................... 12
5-1
5-2
5-3
5-4
5-5
Maximum Absolute Limit................................................................................... 12
DC Characteristics ............................................................................................. 13
AC Characteristics ............................................................................................. 15
Power Down Function........................................................................................ 19
Operation Timing Diagram ................................................................................ 20
5-5-1
5-5-2
5-5-3
5-5-4
5-5-5
4-bit Parallel Mode Interface Segment Driver ................................................................... 20
1-bit Serial Mode Interface Segment Driver ...................................................................... 21
Single-type Interface Mode Common Driver..................................................................... 22
Dual-type Interface Mode Common Driver........................................................................ 23
Common / Segment Driver Timming (1/200 Duty)............................................................ 24
6. Application Information ......................................................................... 25
6-1
6-2
6-3
6-4
6-5
4-bit Parallel Interface Mode (80-Ch. Segment Driver) .................................... 25
1-bit Serial Interface Mode (80-Ch. Segment Driver) ....................................... 26
Single-type Interface Mode (80-Ch. Common Driver)...................................... 27
Dual-type Interface Mode (40-Ch. + 40-Ch. Common Driver).......................... 28
Application Circuit Example.............................................................................. 29
7. Package................................................................................................... 31
7-1 Package Information .......................................................................................... 31
7-2 Die Form.............................................................................................................. 32
7-3 PAD Coordinate.................................................................................................. 33
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
1. Introduction
The RA0086 is an 80 channels LCD driver LSI which is fabricated by low power CMOS high voltage
process technology. It can be used either as a COMMON driver or as a SEGMENT driver, by connecting
its CS input to VDD or VSS. In segment driver mode, it can be interfaced in 1-bit serial or 4-bit parallel
method by the controller. In common driver mode, dual type mode is applicable. And in segment mode
application, the power down function reduces power consumption.
2. Features
‹ Power down function (in segment mode)
‹ Applicable LCD duty: 1/64 – 1/256
‹ Interface
‹ Power supply voltage: + 5V±10 %, + 3V±
10%
‹ Supply voltage for display: 6 to 30V (VDDVEE)
‹ In 80-SEGMENT driver or 80-COMMON
driver selection, to set CS-pin voltage is
VSS or VDD
‹ 4-bit parallel / 1-bit serial data processing
(in segment mode)
‹ Single mode / dual mode operation (in
common mode)
COM(Cascade)
RA0086
DRIVERS
SEG(Cascade)
RA0086
‹ High voltage CMOS process
‹ Available package Type: LQFP-100 pin, Die
3. Pin Configuration
3-1 Internal Block Diagram
SC1 SC2 SC3
SC78 SC79 SC80
V0
V12
80-bit 4-level Driver
V43
V5
VEE
M
DISP0FFB
80-bit Driver
Output
Level
Selector
D2-DL
LCK
SCK
CL1
CL2
D1-SID
80-bitData Latch/Common Data
Bi-direction Shift Register
D3-DM
D4-DR
20 x 4-bit Segment Data
Bi-direction Shift Register
Data Latch Control
Clock
Control
Power
Down
Function
CS
AMS
ERB
VDD
VSS
ELB
Figure 3-1 : Internal Block Diagram
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
SC2
SC1
ELB
CL1
AMS
CL2
D1_SID
D2_DL
D3_DM
D4_DR
VSS
SHL
VDD
DISPOFFB
M
CS
V0
V12
V34
V5
VEE
ERB
SC80
SC79
SC78
3-2 Pin Assignment
75
SC3
SC4
SC5
SC6
SC7
SC8
SC9
SC10
SC11
SC12
SC13
SC14
SC15
SC16
SC17
SC18
SC19
SC20
SC21
SC22
SC23
SC24
SC25
SC26
SC27
70
65
60
55
50
80
45
RAiO
85
TM
40
RA0086L3N
90
35
09XX-N
MXTS01
95
Date code (Year 2009)
100
10
15
20
25
SC28
SC29
SC30
SC31
SC32
SC33
SC34
SC35
SC36
SC37
SC38
SC39
SC40
SC41
SC42
SC43
SC44
SC45
SC46
SC47
SC48
SC49
SC50
SC51
SC52
PIN#1.
5
30
SC77
SC76
SC75
SC74
SC73
SC72
SC71
SC70
SC69
SC68
SC67
SC66
SC65
SC64
SC63
SC62
SC61
SC60
SC59
SC58
SC57
SC56
SC55
SC54
SC53
Figure 3-2 : LQFP-100 Pin Assignment
3-3 System Block Diagram
STN
STN Controller
Controller
RA0086
RA8822
RA8822
RA8803
RA8803
RA8806
RA8806
RA8835
RA8835
RA0086
STN LCD Panel
RA6963
RA6963
Figure 3-3 : System Block Diagram
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
4. Signal Description
4-1 Block Description
Name
Clock control
Function
COM / SEG
Generates latch clock (LCK), shift clock (SCK) and control clock timing
according to the input of CL1, CL2 and control inputs (CS, AMS). In
COM / SEG
common driver application mode, this block generates the shift clock
(LCK) for the common data Bi-directional shift register.
Data latch
control
Determines the direction of segment data shift, and input data of each
Bi-directional shift register. In 4-bit segment data parallel transfer mode,
data is shifted by a 4-bit unit. In common driver application mode, data is
transferred to the common data shift register directly, which disables this
block.
SEG
Power down
function
Controls the clock enable state of the current driver according to the
input value of enable pin (ELB or ERB). If enable input value is “Low”,
every clock of the current driver is enabled and the clock control block
works. But if enable input is “High”, current driver is disabled and the
input data value has no effect on the output level. So power
consumption can be lowered.
SEG
Output level
selector
Controls the output voltage level according to the input control pin (M COM / SEG
and DISPOFFB) (refer to Section 4-2).
20x4-bit
segment data
BI-directional
shift register
Stores output data value by shifting the input values. In 1-bit serial
interface mode application, all 80 shift clocks (SCK) are needed to store
all the display data. But in 4-bit parallel transfer mode application, only
20 clocks are needed. In common driver application mode, this block
does not work.
80-bit data
latch /
common data
BI-directional
shift register
In segment driver application mode, the data from the 20x4-bit segment
data shift register are latched for segment driver output. In single-type
common driver application,1-bit input data (from DL or DR pin) is shifted COM / SEG
and latched by the direction according to the SHL signal input. In dualtype common application mode, 80-bit registers are divided by two
blocks and controlled independently (refer to Section 4-2-3).
SEG
80-bit level
shifter
Voltage level shifter block for high voltage part. The inputs of this block
are of logical voltage level and the outputs of this block are at high
voltage level value. These values are input in to the driver.
SEG
80-bit 4-level
driver
Selects the output voltage level according to M and latched data value. If
the data value is "High" the driver output is at selected voltage level (V0
or V5), and in the reverse case the driver output value is at the nonselected level (V12 or V43). In segment driver application mode, nonselected output value is V2 or V3. and when in common driver
application, this value becomes V1 or V4.
SEG
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
4-2 Pin Description
Pin
I/O
Name
P
Power
supply
VDD
VSS
VEE
V0, V12,
V43, V5
I
SC1 SC80
O
CL2
I
M
I
CL1
I
DISPOFFB
I
CS
I
Description Function
Logical "High" input port (+5V ± 10%, +3V ± 10%)
Interface
0V (GND)
Power
Logical "Low" for high voltage part
LCD driver Bias supply voltage input to drive the LCD. Bias voltage
output
divided by the resistance is usually used as a supply
voltage
voltage source (refer to Section 4-2-2).
level
Display data output pin which corresponds to the
LCD driver respective latch contents. One of V0, V12, V34 and V5 is
selected as a display driving voltage source according to
output
the combination of the latched data level and M signal
(refer to Section 4-2-1).
Clock pulse input for the bi-directional shift register.
– In segment driver application mode, the data is shifted to
20 x 4-bit segment data shift.
Data shift The clock pulse, which was input when the enable bit
(ELB/ERB) is in not active condition, is invalid.
clock
– In common driver application mode, the data is shifted to
80-bit common data bi-directional shift register by the CL1
clock.Hence, this clock pin is not used (Open or connect
this pin to VDD).
AC signal
for LCD
Alternate signal input pin for LCD driving.
driver
Normal frame inversion signal is input in to this pin.
output
– In segment driver application mode, this signal is used
for latching the shift register contents at the falling edge of
Data latch this clock pulse. CL1 pulse "High" level initializes powerdown function block.
clock
– In common driver application mode, CL1 is used as a
shifting clock of common output data.
Control input pin to fix the driver output (SC1~SC80) to V0
Display OFF level,during "Low" value input. LCD becomes non-selected
by V0 level output from every output of segment drivers and
control
every output of common drivers.
COM / SEG When CS = "Low", RA0086 is used as an 80-bit segment
driver.
mode
When CS = "High", RA0086 is set to an 80-bit common
control
driver
Power
LCD
Controller
Controller
Controller
Controller
VDD/ VSS
According to the input value of the AMS and the CS pin,
application mode of RA0086 is differs as shown below.
AMS
I
Application
mode select
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CS
AMS
Application mode
0
0
4-bit parallel interface mode.
0
1
1
0
1-bit serial interface mode.
Single type application mode
1
1
Dual type application mode
7/34
COM
/SEG
SEG
VDD/ VSS
COM
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
D1_SID,
D2_DL,
D3_DM,
D4_DR.
I/O
SHL
I
ELB,ERB
I/O
- In segment driver application mode, these pins are used
as 4-bit data input pin (when 4-bit parallel interface mode :
AMS = "Low"), or D1_SID is used as serial data input pin
Display data and other pins are not used (connect these to VDD) (when
1-bit serial interface mode : AMS = "High").
input /
Serial input
– In common driver application mode, the data is shifted
data /
from D2_DL(D4_DR) to D4_DR(D2_DL), when in single
left,right
type interface mode (AMS = "Low"). In dual type
data input application case, the data are shifted from D2_DL and
output
D3_DM (D4_DR and D3_DM) to D4_DR(D2_DL). In each
case the direction of the data shift and the connection of
data pins are determined by SHL input (refer to Section 42-3、4-2-4).
Shift
When SHL = "Low", data is shifted from left to right.
direction
When SHL = "High", the direction is reversed. (refer to
Section 4-2-3)
control
Enable data
input/output
Controller
VDD/ VSS
– In segment driver application mode, the internal
operation is enabled only when enable input (ELB or
ERB) is “Low” (power down function). When several
drivers are serially connected, the enable state of each
driver is shifted according to the SHL input. Connect
these pins as below.
Segment Driver
ELB
ERB
Output
Input
Input
Output
SHL
L
H
- In common driver application mode, power down function
is not used. Open these pins.
4-2-1
Output Voltage Level Control
Table 4-1
M
Latched Data
DISPOFFB
L
L
H
H
X
L
H
L
H
X
H
H
H
H
L
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Output level (SC1 – SC80)
SEG Mode
COM Mode
V12 (V2)
V12 (V1)
V0
V5
V43 (V3)
V43 (V4)
V5
V0
V0
V0
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RA0086
Version 1.1
4-2-2
80CH Common / Segment Driver For DOT Matrix LCD
LCD Driving Voltage Application Circuit
(1) Segment driver application (CS = “Low”)
VDD
VDD
C
V0
R
V1
R
V2
(n-4) R
V3
V0
SEG1SEG80
To COM
Driver
V12
RA0086
V43
R
V4
R
V5
To LCD
Panel
To COM
Driver
V5
VSS
V0,V5
Selection Level
V2,V3
Non-selection Level
*n = 9 (when 1/64 duty) to
17(when 1/256 duty)
VEE
Figure 4-1
(2) Common driver application (CS = “High”)
VDD
VDD
C
V0
R
V1
R
V2
(n-4) R
V3
R
V0
VDD
SEG1SEG80
V12
To LCD
Panel
RA0086
To SEG
Driver
V0,V5
Selection Level
V1,V4
Non-selection Level
V4
V43
R
V5
V5
VSS
*n = 9 (when 1/64 duty) to
17(when 1/256 duty)
VEE
Figure 4-2
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RA0086
Version 1.1
4-2-3
80CH Common / Segment Driver For DOT Matrix LCD
Data Shift Direction according to Control Signals
(1) When CS = “Low” (Segment driver application)
AMS
SHL
Application
Mode
L
4-Bit Parallel
Data Transfer
Mode (SEG)
L
H
D1
D2
D3
D4
S
C
1
S
C
2
S
C
3
S
C
4
S
C
7
3
S
C
7
4
S
C
7
5
S
C
7
6
S
C
7
7
S
C
7
8
S
C
7
9
S
C
8
0
D
1
D
2
D
3
D
4
D
1
D
2
D
3
D
4
D
1
D
2
D
3
D
4
Last data
H
H
S
C
3
S
C
4
S
C
7
3
S
C
7
4
S
C
7
5
S
C
7
6
S
C
7
7
S
C
7
8
S
C
7
9
S
C
8
0
D
4
D
3
D
2
D
1
D
4
D
3
D
2
D
1
D
4
D
3
D
2
D
1
D1
D2
D3
D4
Shift Direction
S
S
S
S
C
C
C
C
2
3
4
Last data ( D1_SID)
S
S
S
S
C
C
C
C
1
2
3
4
S
C
7
3
S
C
7
4
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S
C
7
5
S
C
7
6
Shift Direction
S
C
7
3
S
C
7
4
Shift Direction
First data
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First data
S
C
2
1
1-Bit Serial
Data Transfer
Mode (SEG)
Shift Direction
S
C
1
First data
L
Input
Pin
Data Direction
S
C
7
5
Last data
S
C
7
7
S
C
7
8
S
C
8
0
S
C
7
9
First data
S
C
7
6
D1_SID,
D2_DL,
D3_DM,
D4_DR
S
C
7
7
S
C
7
8
D1_SID
S
C
7
9
S
C
8
0
Last data
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
(2) When CS = “High” (Common driver application)
AMS
SHL
Application
Mode
Input
Pin
Data Direction
Shift Direction
L
Single-type
Application
Mode (COM)
L
H
S
S
S
C
C
C
1
2
3
S
C
3
8
S
C
3
9
S
C
4
0
S
C
4
1
S
C
4
2
S
C
4
3
S
C
7
8
S
C
7
9
S
C
8
0
D2_DL
Output Data
( D4_DR )
Input Data
( D2_DL )
Shift Direction
S
S
S
C
C
C
1
2
3
S
C
3
8
S
C
3
9
S
C
4
0
S
C
4
1
S
C
4
2
S
C
4
3
S
C
7
8
S
C
7
9
S
C
8
0
D4_DR
Input Data
( D4_DR )
Output Data
( D2_DL )
Shift Direction
L
Dual-type
Application
Mode (COM)
H
H
S
S
S
C
C
C
1
2
3
S
C
3
8
S
C
4
0
S
C
4
1
S
C
4
2
S
C
4
3
Input Data 2
( D3_DM )
Input Data 1
( D2_DL )
S
C
7
8
S
C
7
9
S
C
8
0
D2_DL
D3_DM
Output Data
( D4_DR )
Shift Direction
S
S
S
C
C
C
1
2
3
S
C
3
8
S
C
3
9
S
C
4
0
S
C
4
1
S
C
4
2
Input Data 2
( D3_DM )
Output Data
( D2_DL )
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S
C
3
9
11/34
S
C
4
3
S
C
7
8
S
C
7
9
S
C
8
0
D4_DR
D3_DM
Input Data 1
( D4_DR )
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RA0086
Version 1.1
4-2-4
80CH Common / Segment Driver For DOT Matrix LCD
Usage of Data Pins
Table 4-2
COM /SEG
(CS pin)
Application Mode
(AMS pin)
SEG
(CS =Low)
4-bit parallel interface
mode (AMS = Low)
1-bit serial interface
mode (AMS = High)
COM
(CS =High)
SHL
single-type application
mode (AMS = Low)
dual-type application
mode (AMS =High)
D1_SID
X
D1 (input)
X
SID (input)
L
H
L
H
Open
Open
Data Interface Pin
D2_DL
D3_DM
D2 (input2)
D3 (input3)
D4_DR
D4 (input4)
Connect to VDD
DL (input)
DL (output)
DR (output)
Open
DR (input)
DL (input1)
DM (input2)
DR (output2)
DL (output2)
DM (input2)
DR (input1)
5. Electrical Characteristics
5-1 Maximum Absolute Limit
Table 5-1
Characteristic
Symbol
Value
Power supply voltage
VDD
-0.3 - +7.0
Driver supply voltage
VLCD
0 - +32
VIN
-0.3 - VDD+0.3
Operation temperature
TOPR
-30 - +90
Storage temperature
TSTG
-55 - +150
Input voltage
Unit
V
°C
NOTE : Voltage greater than above may damage to the circuit.
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
5-2 DC Characteristics
(1) Segment Driver Application
(VSS = 0V, Ta = - 30 – +85°C)
Characteristic
Operating voltage1
Input voltage (1)
Output voltage (2)
Input leakage
current 1 (1)
Input leakage
current 2 (3)
On resistance(4)
Symbol
Min
VDD
Typ
2.7
Max
Unit
5.5
VLCD
VIN = VDD - VEE
6
-
30
VIH
-
0.8VDD
-
VDD
VIL
-
0
-
0.2VDD
VOH
IOH = -0.4mA
VDD-0.4
-
-
VOL
IOL = 0.4mA
-
-
0.4
IIL1
VIN = VDD to VSS
-10
-
10
IIL2
VIN = VDD to VEE
-25
-
25
RON
ION = 100μA
-
2
4
kΩ
VSS pin
-
-
100
μA
VDD = 5V
-
-
5
V
V
μA
ISTBY
Supply current (5)
Test Condition
IDD
fCL1 = 32kHz M = VSS
fCL1 = 32kHz
fM = 80Hz
IEE
mA
VDD = 3V
-
-
2
VDD = 5V
-
-
500
μA
NOTES:
(1)
(2)
(3)
(4)
Applied to CL1, CL2, ELB, ERB, D1_SID - D4_DR, SHL, DISPOFFB, M, CS, AMS pin
ELB, ERB pin
V0, V12, V43, V5 pin
VLCD = VDD - VEE, V0 = VDD = 5V, V5= VEE = -23 V
V12 = VDD-2/n(VLCD), V43 = VEE+2/n(VLCD), n = 17 (1/256 duty, 1/17 bias)
(5) V0 = VDD, V12 = 1.71V(VDD = 5V) or -0.06V (VDD = 3V),
V43 = -19.71 V(VDD = 5V) or -19.94V (VDD = 3V),
V5 = VEE = -23V, no-load condition (1/256 duty, 1/17 bias)
4-bit parallel interface mode
ISTBY :VDD = 5V, fCL2 = 5.12MHz, SHL = VSS,
DISPOFFB = VDD,
M = VSS, display data pattern = 0000
IDD : VDD = 3V, fCL2 = 4MHz, display data pattern = 0101
VDD = 5 V, fCL2 = 5.12MHz, display data pattern = 0101
IEE : VDD = 5V, fCL2 = 5.12MHz, display data pattern = 0101, VEE pin
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
(2) Common Driver Application
(VSS = 0V, Ta = - 30 – +85°C)
Characteristic
Operating voltage
Input voltage (1)
Output voltage (3)
Input leakage
current 1 (1)
Input leakage
current 2 (2)
Input leakage
current 3 (4)
On resistance(5)
Supply current (6)
Symbol
Test Condition
VDD
Min
Typ
Max
2.7
-
5.5
VLCD
VIN = VDD - VEE
6
-
30
VIH
-
0.8VDD
-
VDD
VIL
-
0
-
0.2VDD
VOH
IOH = -0.4mA
VDD-0.4
-
-
VOL
IOL = 0.4mA
-
-
0.4
IIL1
VIN = VDD to VSS
-10
-
10
IIL2
VIN = 0V, VDD = 5V (PULL UP)
-50
-125
-250
IIL3
VIN = VDD to VEE
-25
-
25
RON
ION = 100μA
-
2
4
ISTBY
fCL1 = 32kHz M = VSS VSS pin
-
-
100
VDD = 5V
-
-
200
VDD = 3V
-
-
120
VDD = 5V
-
-
150
IDD
fCL1 = 32kHz
fM = 80Hz
IEE
Unit
V
V
μA
kΩ
μA
NOTES:
(1) Applied to CL1, D2_DL (SHL = LOW), D4_DR (SHL = HIGH), SHL, DISPOFFB, M, CS, AMS
pin
(2) Pull-up input pins : CL2, D1_SID, D3_DM (AMS = HIGH), ELB (SHL = LOW), ERB (SHL =
HIGH)
(3) D2_DL (SHL = HIGH) , D4_DR (SHL = LOW) pin
(4) V0, V12, V43, V5 pin
(5) VLCD = VDD-VEE, V0 = VDD = 5V, V5 = VEE = -23V
V12 = VDD-1/n(VLCD), V43 = VEE+1/n(VLCD), n = 17(1/256 duty, 1/17 bias)
(6) V0 = VDD, V12 = 3.35V (VDD = 5V) or 1.47V (VDD = 3V),
V43 = -21.35V (VDD = 5 V) or -21.47V (VDD = 3 V),
V5 = VEE = -23 V, no-load condition (1/256 duty, 1/17 bias)
single-type mode operation : AMS = VSS, SHL = VSS, DISPOFFB = VDD
D1_SID = D3_DM = VDD, D4_DR = OPEN, ELB = ERB = OPEN,
ISTBY : VDD = 5V, M = VSS, D2_DL = VSS
IDD : fM = 80Hz, D2_DL = VDD
VDD = 3 V, display data pattern = 10000000..., 01000000..., 00100000..., 00010000..., ..
VDD = 5 V, display data pattern = 10000000..., 01000000..., 00100000..., 00010000..., ..
IEE : fM = 80Hz, D2_DL = VDD
VDD = 5V, current through VEE Pin, display data pattern = 10000000..., 01000000...,
00100000..., 00010000...
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
5-3 AC Characteristics
(1) Segment Driver Application
(VSS = 0V, Ta = - 30 – +85°C)
Characteristic
Symbol
Test
Condition
(1) VDD = 5V ±10%
(2) VDD = 3V ±10%
Min
Typ
Max
Min
Typ
Max
Unit
Clock cycle time
tCY
Duty = 50%
125
-
-
250
-
-
Clock pulse width
tWCK
-
45
-
-
95
-
-
Clock rise / fall time
tR/tF
-
-
-
-
-
-
30
Data set-up time
tDS
-
30
-
-
65
-
-
Data hold time
tDH
-
30
-
-
65
-
-
Clock set-up time
tCS
-
80
-
-
120
-
-
Clock hold time
tCH
-
80
-
-
120
-
-
Propagation delay time
tPHL
-
-
-
-
ELB,ERB set-up time
tPSU
ELB Input
ERB Input
30
30
-
-
65
65
-
-
DISPOFFB low pulse
width
tWDL
-
1.2
-
-
1.2
-
-
μs
DISPOFFB clear time
tCD
-
100
-
-
100
-
-
ns
-
-
1.0
-
-
1.2
-
-
1.0
-
-
1.2
-
-
1.0
-
-
-
M – OUT propagation
delay time
CL1 – OUT
propagation delay time
DISPOFFB – OUT
propagation delay time
ELB Output
ERB Output
tPD1
tPD2
tPD3
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CL = 15pF
15/34
60
60
ns
125
125
μs
www.raio.com.tw
RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
(2)Common Driver Application
(VSS = 0V, Ta = - 30 – +85°C)
Characteristic
Symbol
Test
Condition
(1) VDD = 5V ±10%
(2) VDD = 3V ±10%
Min
Typ
Max
Min
Typ
Max
Clock cycle time
tCY
Duty = 50%
250
-
-
500
-
-
Clock pulse width
tWCK
-
45
-
-
95
-
-
Clock rise / fall time
tR/tF
-
-
-
50
-
-
50
Data set-up time
tDS
-
30
-
-
65
-
-
Unit
ns
Data hold time
tDH
-
30
-
-
65
-
-
DISPOFFB low pulse
width
tWDL
-
1.2
-
-
1.2
-
-
μs
DISPOFFB clear time
tCD
-
100
-
-
100
-
-
ns
Output delay time
tDL
M – OUT propagation
delay time
CL1 – OUT
propagation delay
time
DISPOFFB – OUT
propagation delay
time
200
tPD1
tPD2
tPD3
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CL = 15pF
250
-
-
1.0
-
-
1.2
-
-
1.0
-
-
1.2
-
-
1.0
-
-
1.2
16/34
μs
www.raio.com.tw
RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
(3) Segment Driver Application Timing
0.8 VDD
0.2 VDD
CL1
0.8 VDD
0.2 VDD
tWCK
tCS
CL2
0.8 VDD
0.2 VDD
tWCK
tR
tCH
tWCK
tF
tCY
0.8 VDD
0.2 VDD
tDS
D1_SID
-D4_DR
tDH
0.8 VDD
tCD
tWDL
DISP0FFB
0.2 VDD
CL1
1
2
3
19
CL2
20
0.8 VDD
0.2 VDD
tPHL
ELB, ERB
(Output 1)
0.2 VDD
ELB, ERB
(Intput 2)
0.2 VDD
tPSU
0.8 VDD
M
CL1
0.2 VDD
0.2 VDD
tPD1
tPD2
0.8 VDD
DISP0FFB
0.2 VDD
tPD3
SC1-SC80
(Latched Data)
Figure 5-1
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
(4) Common Driver Application Timing
tCY
CL1
0.8 VDD
0.2 VDD
0.8 VDD
0.2 VDD
tDWCKH
tR
tF
tDS
(*1)DI
tF
tDH
0.8 VDD
0.2 VDD
tDL
0.8 VDD
(*1)DO
0.2 VDD
tCD
tWDL
DISP0FFB
(*1) When in single-type interface mode
DI=>D2_DL (SHL=L) , D4_DR (SHL=H)
DO=>D4_DR (SHL=L), D2_DL (SHL=H)
When in dual-type interface mode
DI=>D2_DL and D3_DM (SHL=L) , D4_DR and D3_DM (SHL=H)
DO=>D4_DR (SHL=L), D2_DL (SHL=H)
0.8 VDD
M
CL1
tPD1
0.2 VDD
tPD2
0.2 VDD
0.8 VDD
DISP0FFB
0.2 VDD
tPD3
SC1-SC80
(Latched Data)
Figure 5-2
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
5-4 Power Down Function
In the case of cascade connection of segment mode drivers, RA0086 has a "power down function"
in order to reduce the power consumption.
Enable
Input
SHL
Enable
Output
The Other Drivers
Status
Current Driver Status
While ERB =Low, current
Disabled
driver is enabled.
While ELB =Low, current driver
H
ELB
ERB
Disabled
is enabled.
* In the case of common driver application, power down function does not work.
L
ERB
ELB
CL1
1
2
n -1 n
1
2
n -1 n
1
2
n -1 n
1
2
n -1 n
1
2
n -1
CL2
ELB1 (Input1)
ERB1/ELB2
(Output 1/Input 2)
ERB2/ELB3
(Output 2/Input 3)
ERB3/ELB4
(Output 3/Input 4)
ELB4 (Output 4)
Note :
1.SHL=High (ELB=Input, ERB=Output)
Current RA0086’s ERB must be connected to the next RA0086’s ELB
2.When in 4-bit parallel interface mode : n=20
When in 1-bit serial interface mode : n=80
Figure 5-3
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
5-5 Operation Timing Diagram
5-5-1
4-bit Parallel Mode Interface Segment Driver
‹ When SHL = Low
19
20
1
2
19
20
1
2
D1_SID
SC5
SC1
SC77
SC73
SC69
SC5
SC1
SC77
SC73
D2_DL
SC6
SC2
SC78
SC74
SC70
SC6
SC2
SC78
SC74
D3_DM
SC7
SC3
SC79
SC75
SC71
SC7
SC3
SC79
SC75
D4_DR
SC8
SC4
SC80
SC76
SC72
SC8
SC4
SC80
SC76
19
20
1
2
3
CL2
ERB (Input)
ELB (Output)
CL1
SC1-SC80
Figure 5-4
‹ When SHL = High
19
20
1
2
D1_SID
SC76
SC80
SC4
SC8
SC12
SC76
SC80
SC4
SC8
D2_DL
SC75
SC79
SC3
SC7
SC11
SC75
SC79
SC3
SC
D3_DM
SC74
SC78
SC2
SC6
SC10
SC74
SC78
SC2
SC6
D4_DR
SC73
SC77
SC1
SC5
SC9
SC73
SC77
SC1
SC5
3
CL2
ERB (Input)
ELB (Output)
CL1
SC1-SC80
Figure 5-5
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RA0086
Version 1.1
5-5-2
80CH Common / Segment Driver For DOT Matrix LCD
1-bit Serial Mode Interface Segment Driver
‹ When SHL = Low
79
80
1
2
SC2
SC1
SC80
SC79
3
79
80
1
2
SC2
SC1
SC80
SC79
79
80
1
2
SC79
SC80
SC1
SC2
CL2
D1_SID
SC78
ERB (Input)
ELB (Output)
CL1
SC1-SC80
Figure 5-6
‹ When SHL = High
79
80
1
2
SC79
SC80
SC1
SC2
3
CL2
D1_SID
SC3
ERB (Input)
ELB (Output)
CL1
SC1-SC80
Figure 5-7
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RA0086
Version 1.1
5-5-3
80CH Common / Segment Driver For DOT Matrix LCD
Single-type Interface Mode Common Driver
‹ When SHL = Low
79
80
1
79
2
80
1
2
80
1
2
CL1
D2_DL
D4_DR
COM_DATA1
COM_DATA2
COM_DATA3
COM_DATA79
COM_DATA80
Common area of current driver
Figure 5-8
‹ When SHL = High
79
80
1
2
79
CL1
D4_DR
D2_DL
COM_DATA1
COM_DATA2
COM_DATA3
COM_DATA79
COM_DATA80
Common area of current driver
Figure 5-9
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RA0086
Version 1.1
5-5-4
80CH Common / Segment Driver For DOT Matrix LCD
Dual-type Interface Mode Common Driver
‹ When SHL = Low
1
2
3
39
40
1
2
3
39
40
1
2
3
39
40
CL1
D2_DL
D3_DM
D4_DR
COM_DATA1
COM_DATA2
COM_DATA3
COM_DATA39
COM_DATA40
COM_DATA41
COM_DATA42
COM_DATA43
COM_DATA79
COM_DATA80
Figure 5-10
‹ When SHL = High
1
2
3
39
40
CL1
D2_DL
D3_DM
D4_DR
COM_DATA1
COM_DATA2
COM_DATA3
COM_DATA39
COM_DATA40
COM_DATA41
COM_DATA42
COM_DATA43
COM_DATA79
COM_DATA80
Figure 5-11
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RA0086
Version 1.1
5-5-5
80CH Common / Segment Driver For DOT Matrix LCD
Common / Segment Driver Timming (1/200 Duty)
Figure 5-12
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
6. Application Information
6-1 4-bit Parallel Interface Mode (80-Ch. Segment Driver)
(1) Lower View (SHL = L, AMS = L )
Figure 6-1
(2) Upper View (SHL = H, AMS = L)
Figure 6-2
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
6-2 1-bit Serial Interface Mode (80-Ch. Segment Driver)
(1) Lower View (SHL = L, AMS = L )
Figure 6-3
(2) Upper View (SHL = H, AMS = H)
Figure 6-4
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
6-3 Single-type Interface Mode (80-Ch. Common Driver)
Figure 6-5
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
6-4 Dual-type Interface Mode (40-Ch. + 40-Ch. Common Driver)
Figure 6-6
NOTE: Using this application mode (dual-type common mode), the duty ratio can be reduced to half.
In case, 1/200 duty can be used to drive the 400 common LCD panel.
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
6-5 Application Circuit Example
VDD
COM
/SEG
R
V1
COM
R
V2
SEG
4
4
V0-V5
(n-4)R
V3
SEG
R
V4
COM
R
V5
COM
/SEG
4
4
V0-V5
D1_SID-D4_DR
4
4
D1_SID-D4_DR
V0-V5
D1_SID-D4_DR
DISPOFF
CL1
DISPOFF
CL1
DISPOFF
CL1
M
CL2
M
CL2
M
CL2
ERB
ELB
ERB
ELB
ELB
RA0086
AMS
AMS
CS
CS
SHL
SHL
SC1
RA0086
CS
SHL
SC1
SC80
ERB
RA0086
AMS
SC1
SC80
SC80
VSS
SHL
CL1
D4_DR
M
SC80
CS
SHL
SC1
V0-V5
CL1
4
CL1
CL2
D2_DL
AMS
V0-V5
COM1COM80
RA0086
SHL
4
C161
SC80
CS
COM_DATA
D1-D4
240 X 240 LCD MODULE
C160
D4_DR
M
DISPOFF
DISPOFFB
FRAME(M)
C81
COM1COM80
RA0086
AMS
STN
Controller
S240
D2_DL
DISPOFF
RAiO
S161
C80
SC1
V0-V5
S160
COM1COM80
RA0086
AMS
S81
S80
C1
SC80
CS
4
S1
D4_DR
M
DISPOFF
SEG1-SEG80
SEG1-SEG80
SEG1-SEG80
VEE
SC1
CL1
C240
D2_DL
Figure 6-7 : Application Circuit
Figure 6-8 : RA6963 with RA0086 Application Circuit
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
Figure 6-9 : RA8835 with RA0086 Application Circuit
Figure 6-10 : RA8806 with RA0086 Application Circuit
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
7. Package
7-1 Package Information
Figure 7-1
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
SC54
SC53
SC52
SC51
SC50
SC49
SC48
SC47
SC46
SC45
SC44
SC43
SC42
SC41
SC40
SC39
SC38
SC37
SC36
SC35
SC34
SC33
SC32
SC31
SC30
SC29
SC28
SC27
7-2 Die Form
SC55 76
SC56 77
SC57 78
SC58 79
SC59 80
SC60 81
SC61 82
SC62 83
SC63 84
SC64 85
SC65 86
SC66 87
SC67 88
SC68 89
SC69 90
SC70 91
SC71 92
SC72 93
SC73 94
SC74 95
SC75 96
SC76 97
SC77 98
SC78 99
SC79 100
RA0086
( 0, 0 )
SC26
SC25
SC24
SC23
SC22
SC21
SC20
SC19
SC18
SC17
SC16
SC15
SC14
SC13
SC12
SC11
SC10
SC9
SC8
SC7
SC6
SC5
SC4
SC3
SC2
SC1 22
CL1 20
ELB 21
AMS 19
CL2 18
9
M
D2_DL 16
8
CS
D1_SID 17
7
V0
D3_DM 15
6
V12
VSS 13
5
V34
D4_DR 14
4
V5
SHL 12
3
VEE
VDD 11
2
DOSPOFFB 10
1
ERB
RA0086
SC80
Pad No.
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
Figure 7-2
NOTE:Die Size=2956.6*2452.6um
Table 7-1
Die Size
2956.6*2452.6um
Pad Size 1
Pad #2~#21 : 80*45um
Pad Size 2
Pad #1, #22~#100 : 68*45um
Table 7-2
Parts Number
Package
RA0086
Die
RA0086L3N
LQFP-100 pin
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
7-3 PAD Coordinate
Pad.No
Pad Name
X-axis
Y-axis
Pad.No
Pad Name
X-axis
Y-axis
1
SC80
1238.4
1082.1
36
SC15
-1383.3
-111.8
2
ERB
1098.6
1082.1
37
SC16
-1383.3
-202.8
3
VEE
977.6
1082.1
38
SC17
-1383.3
-293.8
4
V5
862.6
1082.1
39
SC18
-1383.3
-384.8
5
V34
747.6
1082.1
40
SC19
-1383.3
-475.8
6
V12
626.6
1082.1
41
SC20
-1383.3
-566.8
7
V0
511.6
1082.1
42
SC21
-1383.3
-657.8
8
CS
396.6
1082.1
43
SC22
-1383.3
-748.8
9
M
281.6
1082.1
44
SC23
-1383.3
-839.8
10
DISPOFFB
166.6
1082.1
45
SC24
-1383.3
-930.8
11
VDD
51.6
1082.1
46
SC25
-1383.3
-1021.8
12
SHL
-63.4
1082.1
47
SC26
-1383.3
-1112.8
13
VSS
-178.4
1082.1
48
SC27
-1228.5
-1131.3
14
D4_DR
-293.4
1082.1
49
SC28
-1137.5
-1131.3
15
D3_DM
-408.4
1082.1
50
SC29
-1046.5
-1131.3
16
D2_DL
-523.4
1082.1
51
SC30
-955.5
-1131.3
17
D1_SID
-638.4
1082.1
52
SC31
-864.5
-1131.3
18
CL2
-753.4
1082.1
53
SC32
-773.5
-1131.3
19
AMS
-868.4
1082.1
54
SC33
-682.5
-1131.3
20
CL1
-983.4
1082.1
55
SC34
-591.5
-1131.3
21
ELB
-1098.4
1082.1
56
SC35
-500.5
-1131.3
22
SC1
-1238.4
1082.1
57
SC36
-409.5
-1131.3
23
SC2
-1383.3
1071.2
58
SC37
-318.5
-1131.3
24
SC3
-1383.3
980.2
59
SC38
-227.5
-1131.3
25
SC4
-1383.3
889.2
60
SC39
-136.5
-1131.3
26
SC5
-1383.3
798.2
61
SC40
-45.5
-1131.3
27
SC6
-1383.3
707.2
62
SC41
45.5
-1131.3
28
SC7
-1383.3
616.2
63
SC42
136.5
-1131.3
29
SC8
-1383.3
525.2
64
SC43
227.5
-1131.3
30
SC9
-1383.3
434.2
65
SC44
318.5
-1131.3
31
SC10
-1383.3
343.2
66
SC45
409.5
-1131.3
32
SC11
-1383.3
252.2
67
SC46
500.5
-1131.3
33
SC12
-1383.3
161.2
68
SC47
591.5
-1131.3
34
SC13
-1383.3
70.2
69
SC48
682.5
-1131.3
35
SC14
-1383.3
-20.8
70
SC49
773.5
-1131.3
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RA0086
Version 1.1
80CH Common / Segment Driver For DOT Matrix LCD
Pad.No
Pad Name
X-axis
Y-axis
71
SC50
864.5
-1131.3
72
SC51
955.5
-1131.3
73
SC52
1046.5
-1131.3
74
SC53
1137.5
-1131.3
75
SC54
1228.5
-1131.3
76
SC55
1383.3
-1112.8
77
SC56
1383.3
-1021.8
78
SC57
1383.3
-930.8
79
SC58
1383.3
-839.8
80
SC59
1383.3
-748.8
81
SC60
1383.3
-657.8
82
SC61
1383.3
-566.8
83
SC62
1383.3
-475.8
84
SC63
1383.3
-384.8
85
SC64
1383.3
-293.8
86
SC65
1383.3
-202.8
87
SC66
1383.3
-111.8
88
SC67
1383.3
-20.8
89
SC68
1383.3
70.2
90
SC69
1383.3
161.2
91
SC70
1383.3
252.2
92
SC71
1383.3
343.2
93
SC72
1383.3
434.2
94
SC73
1383.3
525.2
95
SC74
1383.3
616.2
96
SC75
1383.3
707.2
97
SC76
1383.3
798.2
98
SC77
1383.3
889.2
99
SC78
1383.3
980.2
100
SC79
1383.3
1071.2
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