SANYO LA8519M

Ordering number : ENN6471
Monolithic Linear IC
LA8519M
I/O Switch/Voice Signal-Processing IC
for Cordless Telephones
Overview
Features
The LA8519M is a cordless telephone base unit IC that
provides I/O switching, voice signal processing, and other
functions. It integrates, on a single chip, crosspoint switch,
power amplifier, electronic volume and tone control,
microphone amplifier, speech network, and other
functions.
• Allows switching between two anti-sidetone networks
(near terminal/far terminal) depending on the line
current, and thus achieves excellent sidetone
characteristics over a wide range of line currents.
• Built-in transmitter/receiver amplifier driver power
supply switching circuit allows communication using
extension without power from the telephone network.
• The receiver amplifier supports both ceramic receivers
(BTL) and dynamic receiver (single).
• Built-in power amplifier (load: 8 to 32 Ω): VCC = 5 V,
RL = 8 Ω, Pomax = 200 mW
• The power amplifier signal path includes an electronic
volume control (7 steps of about 3.8 dB each)
• Includes a 10-input/9-output crosspoint switch that
provides mixing functions for easy implementation of
systems that support a diverse range of signal path
switching functions.
Functions
• Speech network block
— Impedance matching, 2-wire/4-wire converter,
line driver, BN circuit network switching circuit,
transmitter amplifier, BTL receiver amplifier,
DTMF input, key tone input, receiver volume
level switching, and power supply switching
circuit.
Package Dimensions
Unit:mm
3159-QIP64E
[LA8519M]
0.8
1.0
17.2
14.0
0.35
1.6
1.0
0.15
33
1.6
1.0
• Audio signal-processing block
— Power amplifier, electronic volume and tone
control, preamplifier with ALC, voice level
detection (VOX), beep tone input, ring tone
(OSC) input, ring tone level switching, line
volume level switching, microphone amplifier,
crosspoint switch (10 × 9 point equivalent), and
serial interface.
48
32
0.8
17.2
14.0
49
1
3.0max
1.0
17
64
16
15.6
0.8
0.1
2.7
SANYO: QIP64E
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
N3000RM (OT) No. 6471-1/29
LA8519M
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Maximum supply voltage
Conditions
Ratings
Unit
VCC max
15
V
VL max
15
V
Line current
IL max
Allowable power dissipation
Pd max
Ta ≤ 70°C (Mounted on a glass epoxy board: 120 × 120 × 1.6 mm3)
130
mA
1000
mW
Operating temperature
Topr
–20 to +70
°C
Storage temperature
Tstg
–40 to +150
°C
Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended supply voltage
VCC
Allowable operating supply voltage range
Conditions
Ratings
Other than the speech network
Unit
5.0
V
VCC op
Pin 17
4.5 to 6.5
V
VCC oppwr
Pin 28
4.5 to 9.5
V
Electrical Characteristics
Ratings
Parameter
Symbol
Conditions
min
typ
max
unit
[Speech Network Block] at Ta = 25°C, Power supplied: VCC = 5 V, fIN = 1 kHz
Line voltage
(20 mA, power supplied/power off)
VL1
IL = 20 mA
3.3
3.8
4.3
V
Line voltage
(50 mA, power supplied/power off)
VL2
IL = 50 mA
4.5
5.2
6.0
V
EVL3
IL = 120 mA
7.1
8.5
9.9
V
LV3
IL = 120 mA
7.0
8.4
9.8
V
EGt1
IL = 20 mA, VIN = –55 dBV
42.5
44.5
46.5
dB
Transmitter gain
(20 mA, power off)
Gt1
IL = 20 mA, VIN = –55 dBV
42.3
44.3
46.3
dB
Transmitter gain
(120 mA, power supplied/power off)
Gt2
IL = 120 mA, VIN = –55 dBV
38.3
40.3
42.3
dB
Receiver gain
(20 mA, power supplied)
EGr1
IL = 20 mA, VIN = –20 dBV
–0.9
1.1
3.1
dB
Receiver gain
(120 mA, power supplied)
EGr2
IL = 120 mA, VIN = –20 dBV
–7.4
–5.4
–3.4
dB
Receiver gain
(20 mA, power off)
Gr1
IL = 20 mA, VIN = –20 dBV
–5.4
–3.4
–1.4
dB
Receiver gain
(120 mA, power off)
Gr2
IL = 120 mA, VIN = –20 dBV
–8.7
–6.7
–4.7
dB
DTMF gain
(20 mA, power supplied/power off)
Gmf1
IL = 20 mA, VIN = –30 dBV
27.7
29.7
31.7
dB
DTMF gain
(120 mA, power supplied/power off)
Gmf2
IL = 120 mA, VIN = –30 dBV
23.6
25.6
27.6
dB
KT gain (power supplied)
EGkt
IL = 20 mA/120 mA, VIN = –40 dBV
10.0
12.0
14.0
dB
KT gain (20 mA, power off)
Gkt1
IL = 20 mA, VIN = –40 dBV
5.8
7.8
9.8
dB
KT gain (120 mA, power off)
Gkt2
IL = 120 mA, VIN = –40 dBV
9.0
11.0
13.0
dB
Transmitter dynamic range
(20 mA, power supplied/power off)
DRt1
IL = 20 mA, THD = 4%
2.5
5.6
Vp-p
Transmitter dynamic range
(120 mA, power supplied/power off)
DRt2
IL = 120 mA, THD = 4%
4.5
7.7
Vp-p
Receiver dynamic range
(power supplied)
EDRs
IL = 20 mA/120 mA, RL = 150 Ω, THD = 10%
0.5
1.5
Vp-p
Receiver dynamic range
(20 mA, power off)
DRs1
RL = 150 Ω, IL = 20 mA, THD = 10%
0.3
0.55
Vp-p
Receiver dynamic range
(120 mA, power off)
DRs2
RL = 150 Ω, IL = 120 mA, THD = 10%
0.5
1.4
Vp-p
Line voltage
(120 mA, power supplied)
Line voltage
(120 mA, power off)
Transmitter gain
(20 mA, power supplied)
Continued on next page.
No. 6471-2/29
LA8519M
Continued from preceding page.
Ratings
Parameter
Symbol
Receiver BTL dynamic range
(power supplied)
EDRb
Receiver BTL dynamic range
(20 mA, power off)
Conditions
max
unit
min
typ
IL = 20 mA/120 mA, RL = 3 kΩ, THD = 10%
5
10
Vp-p
DRb1
RL = 3 kΩ, IL = 20 mA, THD = 10%
2
3.4
Vp-p
Receiver BTL dynamic range
(120 mA, power off)
DRb2
RL = 3 kΩ, IL = 120 mA, THD = 10%
5
8.4
Vp-p
MUTE input high-level voltage
(power supplied/power off)
VIH
IL = 20 mA to 120 mA
0.6 VSP
MUTE input low-level voltage
(power supplied/power off)
VIL
IL = 20 mA to 120 mA
0
Transmitter PADC attenuation
(power supplied/power off)
∆Gt
IL = 40 mA, pin 34: grounded through 24 Ω
4.0
dB
Receiver PADC attenuation
(power supplied/power off)
∆Gr
IL = 40 mA, pin 34: grounded through 24 Ω
6.0
dB
V
0.4
V
Internal supply voltage
(power supplied)
EVSP
IL = 20 mA/120 mA
4.75
V
Internal supply voltage
(20 mA, power off)
VSP1
IL = 20 mA
1.92
V
Internal supply voltage
(120 mA, power off)
VSP2
IL = 120 mA
4.74
V
Internal reference voltage
(power supplied)
ES-VREF
IL = 20 mA/120 mA
2.26
V
Internal reference voltage
(20 mA, power off)
S-VREF1
IL = 20 mA
0.79
V
Internal reference voltage
(120 mA, power off)
S-VREF2
IL = 120 mA
1.92
V
[Voice Signal-Processing Block] at Ta = 25°C, VCC = 5 V, fIN = 1 kHz, RL = 10 kΩ
(Crosspoint switch)
VIN = –13 dBV, pin 58 input, pin 2 output
–2.5
–0.5
Maximum input level
VIN max
THD = 1.5%
–13.5
–7.5
Output noise voltage
VNOSW
Rg = 620 Ω, 20 to 20 kHz
Voltage gain
GSW
1.5
dB
dBV
7.0
40
µVrms
dB
(Preamplifier: input from the crosspoint switch)
Voltage gain
VGC
VIN = –45 dBV
Total harmonic distortion
THD
VIN = –20 dBV
ALC saturated output level
VOS
VIN = –20 dBV
93
From the point the ALC circuit turns on to the point the THD reaches 1%.
15
ALC range
Output noise voltage
ALCW
VNO
Rg = 620 Ω, 20 to 20 kHz
8.5
10.5
12.5
0.26
1.0
%
115
137
mVrms
65
250
µVrms
dB
dB
(Microphone amplifier)
Voltage gain
VGm
VIN = –40 dBV
Total harmonic distortion
THD
VIN = –40 dBV
Output noise voltage
VNO
Rg = 620 Ω, 20 to 20 kHz
VGp
RL = 8 Ω, VIN = –30 dBV
RL = 8 Ω, THD = 10%
27.5
29.5
31.5
0.05
1.0
%
65
250
µVrms
27.5
29.5
31.5
200
275
(Power amplifier)
Voltage gain
Maximum output power
Total harmonic distortion
Po
THD
VIN = –30 dBV
Rg = 620 Ω, fr = 100 kHz, Vr = –20 dBV
Ripple rejection ratio
SVRR
Output noise voltage
VNO
Rg = 620 Ω, 20 to 20 kHz
Sensitivity 1 low level
VOXL
VIN = –40 dBV, RL = 100 kΩ
Sensitivity 2 high level
VOXH
VIN = –44 dBV, RL = 100 kΩ
0.8
40
dB
mW
1.5
50
%
dB
35
100
µVrms
0.1
0.3
V
(VOX)
4.8
4.95
2.9
3.8
V
(Electronic volume control)
Step width
Evrw
4.7
dB
(Attenuator)
R-ATT attenuation
∆GR
5.4
6.4
7.4
dB
LINE-ATT attenuation
∆GL
4.6
5.6
6.6
dB
OSC-ATT attenuation
∆GO
13.1
14.6
16.1
dB
Continued on next page.
No. 6471-3/29
LA8519M
Continued from preceding page.
Ratings
Parameter
Symbol
Conditions
unit
min
typ
max
2.07
2.27
2.47
V
500
kHz
(VREF)
Output voltage
VREF
(Serial Control)
Clock frequency
Fck
Input signal high level
VH
Input signal low level
VL
2.3
V
1.0
V
(Power Supply Switching)
Pin 17 voltage 1
Vch1
The voltage applied to pin 17 is valid.
Pin 17 voltage 2
Vch2
The voltage supplied from pin 48 is valid.
Quiescent current
ICCO
With the power amplifier on
3.5
V
24
1.0
V
33.5
mA
No. 6471-4/29
FILTER
60
Door phone
DSP
59
Compander 2
64
63
62
61
58
Compander 1
57
56
55
54
53
52
51
50
49
L-ATT
0/–6DB
1
CODEC1
DOOR
CODEC2
RF2
RF1
46
45
+
2
3
4
07
06
05
04
5
0A
03
0F
0E
0D
0C
0B
09
08
SW1
02
01
43
SW2
44
GAIN CTL
POWER SUPPLY
47
Line amplifier
HAND-AMP
RECEIVER-AMP
BN2
BN1
48
+
6
ALC-OUT
40
10
2F
28
1B
1C
1D
14
15
16
23
8
9
ALC
SW5
2A
36
35
11
36
12
3B
3A
39
38
37
–9.5DB
HAND
SW4
PRE
AMP
VR
–9.5DB
31
34
22
32
33
30
2D
37
R-ATT
0/–6DB
38
R
21
29
2E
27
20
1A
13
12
26
1F
2C
19
2B
25
18
24
1E
17
11
LINE-AMP
9.5DB
SW3
39
10
7
41
TRANSMIT-AMP
42
KT
35
13
14
16
+
15
+
REG
MIC
AMP
VCC
PWR MONI
P.VREF
PWR-GND
17
18
19
20
21 NC
22
23
24
25
26
27
+
+
+
29 VOX OUT
30 CE
31 DATA
32 CLOCK
PWR-VCC 28
CPU
INTERFACE
POWER
AMP
33
Electronic
volume control
EVR
34
MUTE
VREF
+
BEEP-IN
OSC-ATT
0/–16DB
OSC-IN
PAD C
VOX
RECT CMP
VOX-IN
RESET
(PWR ON RESET)
VOX-RCT
T
+
+
SP
MIC
DTMF
+
5V
EXT.REG
+
1.RF1-OUT
2.RF2-OUT
3.DOOR-OUT
4.CDC1-OUT
5.CDC2-OUT
6.ALC-CNT
7.BEEP-IN
8.OSC-IN
9.GND
10.ALC-IN
11.PRE-OUT
12.PRE-NF
13.VOXA-IN
14.VOXA-OUT
15.VREF
16.VOX-RCT
17.VCC
18.MIC-OUT
19.MIC-NF
20.MIC-IN
21.NC
22.EVR-OUT
23.PWR-IN
24.P-VREF
25.PWR-NF
26.P-GND
27.PWR-OUT
28.P-VCC
29.VOX-OUT
30.CE
31.DATA
32.CLOCK
33.RESET
34.PAD-CNT
35.MUTE
36.RV-NF
37.RV-OUT1
38.RV-OUT2
39.KT-IN
40.TI-IN
Power supply
A13120
41.TI-NF
42.TI-OUT
43.TA-IN
44.DTMF-IN
45.SP-VREF
46.VSP
47.SP-VCC
48.VL
49.TOI
50.TOO
51.BN1
52.BN2
53.SP-GND
54.RI-IN
55.RI-OUT
56.HAND-NF
57.HAND-MONI
58.RF1-IN
59.RF2-IN
60.DOOR-IN
61.FIL-IN
62.FIL-OUT
63.CDC2-IN
64.LINE-OUT
LA8519M
Block Diagram
No. 6471-5/29
IL
+
6800pF
SW1-2
0.22µF
5.6KΩ
SW1-4
620Ω
SW1-1
10µF
39kΩ
0.1µF
0.1µF
OUTPUT
47kΩ
0.1µF
0.1µF
22kΩ
1.8kΩ
0.1µF
0.22µF
11kΩ
SW5-1
2SA608NP
1.3kΩ
3.3kΩ
82Ω
(1W)
82Ω
180pF
0.1µF
150
kΩ
100
kΩ
47KΩ
64 LINE-OUT
63 CDC2-IN
62 FILOUT
61 FIL-IN
60 DOOR-IN
59 RF2-IN
58 RF1-IN
57 HAND-MONI
56 HAND-NF
55 RI-OUT
54 RI-IN
53 SP-GND
52 BN2
51 BN1
50 TOO
49 TOI
51Ω
0.1µF
600Ω
SW2-1
8200pF
SW1-6
48
1
+
47
620Ω
VL
RF1-OUT
2
46
+
3
45
+
4
SW2-2
44
5
+
43
SW4-2
6
51kΩ
41
40
330pF
42
100
kΩ
0.1µF
39
7
8
0.1µF
38
11
0.1µF
10
9
LA8519M
BEEP-IN
8.2KΩ 82Ω 7.5KΩ
SW1-7
SP-VOC
RF2-OUT
0.1µF
47µF
0.1µF
220µF
SW2-3
TI-NF
OSC-IN
(10W)
10kΩ
VSP
DOOR-OUT
0.1µF
SW2-4
DTMF-IN
CDC2-OUT
SW4-3
TI-OUT
SW4-4
20kΩ
0.1µF
22µF
SP-VREF
CDC1-OUT
0.1µF
SW2-5
RV-OUT2
SW4-1
0.1µF
0.1µF
SW2-6
TI-IN
GND
TA-IN
ALC-CNT
10µF
KT-IN
ALC-IN
+
37
+
100
kΩ
36
35
12
13
14
100
kΩ 100kΩ
0.22µF 10kΩ
0.1µF
220kΩ
SW2-7
PRE-NF
0.1µF
0.1µF
SW2-8
300Ω 10µF
0.22µF
PRE-OUT
3kΩ
RV-OUT1
150Ω
BTL-SW
RV-NF
VOXA-IN
MUTE-SW
MUTE
VOXA-OUT
34
24kΩ
RAD-C-SW
PAD-CNT
VOX-IN-SW
+
15
VREF
220µF
33
RESET
16
VOX-RCT
6.2kΩ 0.47µF
10kΩ
0.01µF
1µF
1kHz
RESET-SW
VCC 17
MIC-OUT 18
MIC-NF 19
MIC-IN 20
NC 21
EVR-OUT 22
PWR-IN 23
P-VREF 24
PWR-NF 25
P-GND 26
PWR-OUT 27
P-VCC 28
VOX-OUT 29
CE 30
DATA 31
CLOCK 32
+
0.45V
VCNT
CE
DATA
CLOCK
220µF
+
0.1µF
0.1µF
3.3kΩ
0.1µF
+
1µF
DRCT-SW
0.22µF
SW3-2
RV1
SW3-3
RV2
SW3-1
100
kΩ
2kΩ
100kΩ
100µF
62kΩ
SW3-4
VL
+
470µF
100µF
150pF
SP-IN
+
8Ω (1W)
620Ω
INPUT
INPUT
1kHz
VCC
5V
A13121
PWR-OUT
VOX-OUT
Data generator
LA8519M
Test Circuit Diagram
No. 6471-6/29
8200pF
5.6KΩ
22kΩ
DSP
Door phone
Compander 2
Compander 1
0.22µF
8.2KΩ 82Ω 7.5KΩ
11kΩ
1.8kΩ
0.1µF
0.1µF
FILTER
0.1µF 10kΩ
0.1µF
0.1µF
180pF
0.1µF
330pF
0.22µF
2SA608NP
1.3kΩ
82Ω
(1W)
8.2Ω
150
kΩ
100
kΩ
64 LINE-OUT
63 CDC2-IN
62 FILOUT
61 FIL-IN
60 DOOR-IN
59 RF2-IN
58 RF1-IN
57 HAND-MONI
56 HAND-NF
55 RI-OUT
54 RI-IN
53 SP-GND
52 BN2
51 BN1
VL
1
RF1-OUT
6800pF
51Ω
50 TOO
2
RF2-OUT
49 TOI
SP-VOC
47
46
VSP
3
DOOR-OUT
48
45
4
CDC1-OUT
3.3kΩ
SP-VREF
100µF
0.1µF
44
DTMF-IN
DTMF-IN
+
5
CDC2-OUT
47µF
0.1µF
220µF
0.1µF
0.1µF
43
42
100
kΩ
51kΩ
41
40
39
7
6
8
0.1µF
11
0.1µF
330pF
10
9
LA8519M
38
R
37
36
330
pF
100
kΩ
35
12
13
100
kΩ
34
330pF
+
14
15
100
kΩ
33
16
VCC 17
MIC-OUT 18
MIC-NF 19
MIC-IN 20
NC 21
EVR-OUT 22
PWR-IN 23
P-VREF 24
PWR-NF 25
P-GND 26
PWR-OUT 27
P-VCC 28
VOX-OUT 29
CE 30
DATA 31
CLOCK 32
+
+
470µF
1µF
3.3kΩ
0.033µF
0.22µF
220µF
+
0.1µF
0.1µF
+
RING
LINE
SP
100µF
0.1µF
0.1µF
+
TI-NF
+
TI-IN
0.1µF
ALC-CNT
TA-IN
20kΩ
0.1µF
+
0.1µF
GND
RV-OUT2
PRE-OUT
KT-IN
KT-IN
ALC-IN
RV-OUT1
PRE-NF
330pF
RV-NF
VOXA-IN
620Ω
0.1µF
0.1µF
47µF
TI-OUT
BEEP-IN
220kΩ
BEEP-IN
VOX-RCT
T
0.22µF 10kΩ
OSC-IN
OSC-IN
0.47µF
10kΩ
RESET
0.01µF
1µF
6.2kΩ
MUTE
VOXA-OUT
0.22µF
PAD-CNT
24kΩ
VREF
220µF
100
kΩ
2kΩ
100
kΩ
220µF
0.1µF
62kΩ
CPU
330pF
TIP
+
MIC
A13122
VCC
5V
LA8519M
Sample Application Circuit
No. 6471-7/29
LA8519M
Serial Data Format
CE
CLOCK
A6
DATA
A5
A4
A3
A2
A1
A0
D
A6 to A0 ⇒ Sets the address of the crosspoint switch or control switch (hexadecimal ⇒ binary number)
D⇒
Sets the on/off state of the crosspoint switch or control switch.
(The switch is set to the on state when D is 1, and to the off state when 0.)
Address Table
Output
Input
LINE
HAND
RF1
RF2
DOOR
CDC1
CDC2
EVR
PRE
LINE
—
08
10
17
—
24
2B
32
37
HAND
01
—
11
18
1E
25
2C
—
38
RF1
02
09
—
19
1F
26
2D
—
—
RF2
03
0A
12
—
20
27
2E
—
—
DOOR
—
0B
13
1A
—
28
2F
—
—
CDC1
04
0C
14
1B
21
—
—
33
39
CDC2
05
0D
15
1C
22
—
—
34
3A
MIC
—
—
—
—
—
29
30
—
3B
BEEP
06
0E
16
1D
23
—
—
35
—
PRE
07
0F
—
—
—
2A
31
36
—
Other addresses
Address No.
Mode
00
Sets all crosspoint and control switches to the off state. *2
3C
ALC control (D = 1: Off, D = 0: On)
3D
Transmitter/receiver control (SW1 and SW4 in the block diagram) *1
3E
OSC input (SW5) control (D = 1: On, D = 0: Off)
3F
Power amplifier control (D = 1: On, D = 0: Off)
⇒ (Default value)
40
Electronic volume control
0 dB
41
Electronic volume control
–4 dB
42
Electronic volume control
–8 dB
43
Electronic volume control
–12 dB
44
Electronic volume control
–16 dB
45
Electronic volume control
–20 dB
46
Electronic volume control
–24 dB
47
Electronic volume control
–28 dB
7D
Line attenuator (L-ATT) setting (D = 1: –6 dB, D = 0: 0 dB)
*2
7E
Receiver attenuator (R-ATT) setting (D = 1: 0 dB, D = 0: –6 dB)
7F
Oscillator attenuator (OSC-ATT) setting (D = 1: 0 dB, D = 0: –16 dB)
* With address 3D set to the on state, SW1 is set to enable the transmitter amplifier output (pin 42) and SW4 is set to enable either the receiver amplifier
output (pin 55) or the KT (pin 39) signal. If a voltage is not supplied to VCC (pin 17) (i.e. the power off state), SW1 and SW4 are set to the same states
as when address 3D is set to the on state.
** For addresses 00 and 40 to 47, the data D may be either 0 or 1.
Notes: 1. The receiver attenuator (R-ATT) is set to –6 dB at power on or after a reset (pin 33 set to low, or address 00 accessed).
2. The line attenuator (L-ATT) is set to 0 dB at power on or after a reset (pin 33 set to low, or address 00 accessed).
3. The oscillator attenuator (OSC-ATT) is set to –16 dB at power on or after a reset (pin 33 set to low, or address 00 accessed).
4. The electronic volume control is set to 0 dB at power on or after a reset (pin 33 set to low, or address 00 accessed).
5. Addresses are expressed as hexadecimal numbers.
6. Since the LA8519M includes a power on reset function, all the crosspoint and control switches are reset to their default states when external power
(pin 17: VCC) is applied.
7. Switches SW2 and SW3 in the block diagram are controlled by the MUTE pin (pin 35). The table lists the signals enabled by this pin.
MUTE pin (pin 35)
SW2
SW3
High/Open
Transmitter (pin 42) and TA-IN (pin 43)
Receiver (pin 55)
Low
DTMF pin (pin 44)
KT pin (pin 39)
No. 6471-8/29
LA8519M
Serial Data Timing
fMAX
tCS
tCH tWC
tWH tWH
CE
CLOCK
DATA
A6
A5
A4
A3
A2
A1
A0
D
A6
A5
tDS tDS
• fMAX (maximum clock frequency)
• tWL (clock low-level pulse width)
• tWH (clock high-level pulse width)
• tCS (chip enable setup time)
• tCH (chip enable hold time)
• tDS (data setup time)
• tDH (data hold time)
• tWC (chip enable pulse width)
500 kHz
At least 1 µs
At least 1 µs
At least 1 µs
At least 1 µs
At least 1 µs
At least 1 µs
At least 1 µs
Note: The control data must be input at least 400 ms after the supply voltage is applied to the VCC pin (pin 17).
No. 6471-9/29
LA8519M
Pin Functions
Pin No.
Pin
Notes
Equivalent circuit
VCC
VREF
1
RF1-OUT
2
RF2-OUT
3
DOOR-OUT
4
CDC1-OUT
5
CDC2-OUT
1
• These are the IC outputs.
2
10 kΩ
3
CP-SW
4
10 kΩ
5
VCC
6
• Adjusts the ALC time constants
6
ALC-CNT
This pin can be used to adjust the ALC attack time
and recovery time.
VCC
VREF
7
BEEP-IN
• Beep tone amplifier input
8
OSC-IN
• Oscillator amplifier input
58
RF1-IN
• Compander 1 input
59
RF2-IN
• Compander 2 input
63
CDC2-IN
• CDC2 amplifier input
30 kΩ
8
7
30 kΩ
58
59
63
9
GND
Signal-processing system ground
VCC
VREF
24 kΩ
10
ALC-IN
• ALC input. The PRE output (pin 11) is input to this
pin through a coupling capacitor. The ALC level
can be adjusted by inserting a resistor in series.
10
10 kΩ
Continued on next page.
No. 6471-10/29
LA8519M
Continued from preceding page.
Pin No.
Pin
Notes
Equivalent circuit
VCC
11
PRE-OUT
12
PRE-NF
VREF
11
• Preamplifier output
12
VCC
VREF
13
VOXA-IN
14
VOXA-OUT
• VOX amplifier input
• VOX amplifier output
14
13
300 Ω
VCC
15
VREF
• Internal reference voltage output
15
2.25 V
5 kΩ
VCC
4.7 kΩ
16
VOX-RCT
• VOX detection output. This circuit can also be
used as a waveform shaping circuit by forcibly
setting this pin to the high state.
16
4.7 kΩ
17
VCC
• External power supply input. This voltage is
supplied to the signal-processing system and VSP
(pin 46).
Continued on next page.
No. 6471-11/29
LA8519M
Continued from preceding page.
Pin No.
Pin
Notes
Equivalent circuit
VCC
VRE
18
MIC-OUT
100 kΩ
• Microphone amplifier output
19
MIC-NF
• Microphone amplifier minus input
20
MIC-IN
• Microphone amplifier plus input
21
NC
22
EVR-OUT
19
20
18
• Unused.
• EVR amplifier output
22
P.VCC
23
PWR-IN
24
P-VREF
25
PWR-NF
27
PWR-OUT
50 kΩ
• Power amplifier plus input
• Power amplifier reference voltage
(about 4/9 × P-VCC)
24
27
• Power amplifier minus input
23
25
15 kΩ
• Power amplifier output
40 kΩ
26
P-GND
• Power system ground
28
P-VCC
• Power system power supply
VCC
29
29
VOX-OUT
• VOX output
This is an open-collector output.
Continued on next page.
No. 6471-12/29
LA8519M
Continued from preceding page.
Pin No.
Pin
Notes
Equivalent circuit
VCC
100 kΩ
30
CE
• Chip enable input
30
31
DATA
• Data input
31
32
CLOCK
• Clock input
33
RESET
• Reset
Power on reset.
1.5 V
1 kΩ
Logic
32
33
S-VCC
4.7 kΩ
34
PAD C
• Pad control. The gain control based on line
current and the BN switching operating current
can be controlled by connecting this pin through a
resistor to either ground or S-VCC (pin 47).
34
22 kΩ
VSP
REF
50 kΩ
35
MUTE
• Muting control. This pin switches the transmitted
audio and DTMF signals in the transmitter system
and the KT and received signals in the receiver
system. (Switches SW2 and SW3 in the block
diagram.) When low, the DTMF and KT signals
are enabled.
35
1 kΩ
VSP
37
36
RV-NF
37
RV-OUT1
• Receiver amplifier 1 output
38
RV-OUT2
• Receiver amplifier 2 output
REF
• Receiver amplifier noise figure connection
VSP
38
36
10 kΩ
10 kΩ
Continued on next page.
No. 6471-13/29
LA8519M
Continued from preceding page.
Pin No.
Pin
Notes
Equivalent circuit
VSP
REF
VSP
44 kΩ
39
39
KT-IN
• Key tone input
VSP
40
TI-IN
41
TI-NF
42
TI-OUT
• Transmitter input amplifier plus input. Since no
bias voltage is applied internally, a bias voltage
must be applied through a resistor from the REF
pin (pin 61).
VSP
41
40
42
• Transmitter input amplifier minus input
• Transmitter input amplifier output
VSP
REF
40 kΩ
43
43
TA-IN
• Input for the line output
VSP
REF
VSP
20 kΩ
44
44
DTMF-IN
• DTMF input
Continued on next page.
No. 6471-14/29
LA8519M
Continued from preceding page.
Pin No.
Pin
Notes
Equivalent circuit
VSP
15 kΩ
45
REF
• Speech network system internal reference voltage
output. When the VCC (pin 17) voltage is over
3.5 V, the reference voltage is output from VREF
(pin 15). When the VCC voltage is under 1.2 V, a
voltage of about (2/5) × V is output.
46
VSP
• Speech network system internal power supply. A
voltage of about 0.3 V less than the voltage
applied to VCC is output when the VCC (pin 17)
voltage is over 3.5 V. When the V CC voltage is
under 1.2 V, a voltage of about 0.3 V less than the
S-VCC (pin 47) voltage is output.
47
S-VCC
• Speech network system power supply. When the
VCC voltage is under 1.2 V, power is supplied to
VSP (pin 46) based on the line power.
VREF
45
10 kΩ
48
3 kΩ
48
VL
• Line current input and line voltage
49
TOI
• Current input for the transmitter output current
50
TOO
• Transmitter output current output
49
6.2 kΩ
100 Ω
50
48
VL
• First BN switching control input
51
BN1
52
BN2
• Second BN switching control input
51
Connect these inputs when two balancing
networks are used. When unused, leave these
pins open.
52
53
SP-GND
• Speech network system ground
VSP
REF
54
RI-IN
55
RI-OUT
• Receiver input amplifier minus input
55
54
• Receiver input amplifier output
Continued on next page.
No. 6471-15/29
LA8519M
Continued from preceding page.
Pin No.
Pin
Notes
Equivalent circuit
VCC
56
HAND-NF
57
HAND-MONI
• Handset amplifier minus input
• Handset amplifier output
57
56
VCC
VREF
60
DOOR-IN
• Door phone input
50 kΩ
60
10 kΩ
VCC
VREF
61
FIL-IN
62
FIL-OUT
• FIL amplifier input
62
• FIL amplifier output
61
300 Ω
VCC
64
LINE-OUT
• Line amplifier output
64
10 kΩ
No. 6471-16/29
LA8519M
Usage Notes
Speech Network Circuit Block
• External driver transistor
C2
+
R3
620Ω
Line
47
VL
S-VCC
51Ω
3.3kΩ
7.5kΩ
Tr
220µF
48
49 TOI
82Ω
C1
R1
50 TOO
R2
82Ω
8200pF
LA8519M
8.2Ω
51 BN1
8.2kΩ
1.3kΩ
5.6kΩ
1.8kΩ
52 BN2
6800pF
A13123
Figure 1
Since the IC includes a built-in power amplifier, due to the allowable power dissipation limits, include a heat
dissipation transistor as shown in figure 1, and dissipate the circuit current outside the IC. Set the allowable power
dissipation for R1 and R2 according to the maximum expected circuit current. (The values shown are for reference
purposes only.)
Note: If oscillation occurs due to the load state between VL and ground, insert the capacitor C1 (about 0.1 µF)
shown in the figure.
• Changing the DC resistance
The DC resistance can be modified by using a variable resistor for R2 in figure 1. (See the figure below.)
Note: Note that changing R2 will also change the transmitter gain and the balancing network conditions.
• Determining the AC impedance
The AC impedance is basically determined by R3 (620 Ω) and C2 (220 µF) shown in figure 1 above page. Since in
actual operation there will be other AC loads in addition to the speech network, adjust the total AC impedance for
the whole system in combination with the speech network impedance.
Note: Note that if R3 is changed, the DC resistance will change as well.
Line Voltage vs. Line Current
12
Power supplied: VCC = 5 V
11
Power supplied: R2 = 10 Ω
10
Power off: R2 = 10 Ω
9
Power supplied: R2 = 8.2 Ω
Line
8
Power off: R2 = 8.2 Ω
7
6
Power supplied: R2 = 6.8 Ω
5
Power off: R2 = 6.8 Ω
4
3
2
10
20
30
40
50
60
70
80
90
100 110 120 130
Line current — mA
No. 6471-17/29
LA8519M
• Anti-sidetone network
The LA8519M can switch between two anti-sidetone networks, one for the near terminal and one for the far
terminal, depending on the circuit current. (See figure 1 for the connections used.) The switching point can be
changed by connecting PADC (pin 34) through a resistor to either ground or S-VCC (pin 47).
If only one anti-sidetone network is used, short pin 51 to pin 52 as shown in figure 2. (The component values
shown are for reference purposes only.)
+
620Ω
Line
1.5kΩ
Tr
11kΩ
0.01µF
47
VL
S-VCC
51Ω
3.3kΩ
6.2kΩ
48
49 TOI
82Ω
50 TOO
82Ω
LA8519M
8.2Ω
51 BN1
52 BN2
A13124
Figure 2
• Line voltage VL DC characteristics when VCC is not applied (Values shown are for reference purposes only.)
+
+
Load
620Ω
BN
3.3kΩ
Tr
82Ω
51Ω
48
47
46
VL
S-VCC
VSP
49 TOI
LA8519M
82Ω
50 TOO
8.2Ω
A13125
The slope of the DC characteristics when VCC is not applied can be increased without changing the DC
characteristics when VCC is applied by applying a load to VSP (pin 46).
No. 6471-18/29
LA8519M
• Receiver amplifier application circuits
(1) When a dynamic receiver is used (Values shown are for reference purposes only.)
Due to drive capacity considerations,
a 300 Ω resistor must be inserted in series.
300Ω
0.47µF
10µF
6.2kΩ
+
330pF
100kΩ
38
37
36
RV-OUT2
RV-OUT1
RV-NF
A13126
(2) When a ceramic receiver is used (Values shown are for reference purposes only.)
0.47µF
6.2kΩ
330pF
100kΩ
38
37
36
RV-OUT2
RV-OUT1
RV-NF
A13127
• Receiver attenuator
RV-OUT2
RV-OUT1
RV-NF
38
37
36
ATT
SW4
A13128
Normally, the receiver attenuator is set to –6 dB. It can be set to 0 dB by setting address 7E to the on state with a
serial data transfer.
No. 6471-19/29
LA8519M
• Speech network gain distribution
DTMF-IN
TA-IN
44
43
42
100 kΩ
VL
48
20 kΩ
41
40 TI-IN
Line driver
amplifier
30 dB
Transmitter PAD
0 dB *1
–3.5 dB *2
SW2
0 dB
SW1
0 dB
Transmitter amplifier
(15.5 dB)
A13129
* IL = 20 mA
** IL = 120 mA
Note: For a 600 Ω line termination
KT-IN
39
38
VL
48
11 kΩ
ATT
54
BN
300 Ω 150 Ω
37
150 kΩ
100 kΩ
55
36
6.2 kΩ
Anti-sidetone
circuit
(–33.6 dB)
Receiver input
amplifier
(22.7 dB)
Receiver PAD
0 dB *1
–6.5 dB *2
SW3
0 dB
SW4
4 dB
ATT
–6.5 dB
0 dB *3
Receiver output
amplifier
(24.7 dB)
Attenuator
(–9.5 dB)
A13130
* IL = 20 mA
** IL = 120 mA
*** When address 7E is set to the on state with a serial data transfer.
Notes: 1. The gain values are rough values, and should be seen as target values during the design process.
2. Values in parentheses can be modified by external components.
No. 6471-20/29
LA8519M
47
46
45
44
43
42
Power supply
41
40
38
2
1
37
36
34
33
ATT
2
SW1
2
1
Line amplifier SW2
49
39
TRANSMIT
AMP
1
RESET
(PWR ON RESET)
+
PAD-CNT
48
+
35
R
T
+
MUTE
• Speech network internal analog switch operation
SW4
2
SW3
1
CPU
INTERFACE
50
51
52
53
54
GAIN CTL
BN1
BN2
–9.5 dB
RECEIVER
AMP
HAND
55
A13131
Note: Switches SW2 and SW3 are controlled by the MUTE pin (pin 35). Switches SW1 and SW4 are controlled by address 3D as set by serial data
transfers. Note that switches SW2 and SW3 operate together, as do switches SW1 and SW4.
SW1 and SW4 Operation
State
SW1
Power supplied (initial state)
1
SW4
1
Address 3D
2
2
Power off
2
2
Note: When the power is off, SW1 and SW4 go to the "2" positions, and their states cannot be changed.
SW2 and SW3 Operation
Pin 35 (MUTE)
SW2
High
1
SW3
1
Low
2
2
Note: SW2 and SW3 operate as described above regardless of the power supplied/off state.
• Line amplifier attenuator
Normally, the line attenuator is set to 0 dB. It can be set to –6 dB by setting address to 7D and mode to D = 1 with
a serial data transfer.
64
ATT
Crosspoint Switch
LINE-OUT
A13132
• Oscillator amplifier attenuator
Normally, the oscillator amplifier attenuator is set to –16 dB. It can be set to 0 dB by setting address to 7F and
mode to D = 1 with a serial data transfer.
8
OSC-IN
ATT
SW5
A13133
No. 6471-21/29
LA8519M
• VOX circuit
(1) The VOX circuit detects whether there is conversation or not. When the signal level in the VOXA input block
(when the application constants in the application circuit diagram are used) becomes over about –42 dBV, the
VOX output pin (pin 29) goes low. The detection level can be set by setting the gain of the VOX input amplifier
with resistors R1 and R2.
(2) This circuit can be used as a waveform shaping circuit if VOX-RCT (pin 16) is connected to VCC, i.e. if pin 16 is
set to the high level. Thus this circuit can also be used to recognize a 400 Hz beep tone. In this mode, there is no
need to connect a capacitor to pin 16.
RECT CMP
29
+
–
13
14
VOXA-IN
VREF
VOX-RCT
15
16
+
R2
R1
A13134
• Power amplifier circuit applications (The component values are for reference purposes only.)
C3
C4
PWR-VCC 28
+
C2
PWR-OUT 27
C1
SP
+
C5
62 kΩ
PWR-GND 26
• Voltage gain: 20 to 30 dB
• A frequency characteristics adjustment capacitor cannot
be attached to the feedback resistor.
PWR-NF 25
2 kΩ
PWR-VREF 24
C1: 0.1 µF
C2: 0.1 µF
C3: 0.1 µF
C4: 220 µF
C5: 100 to 470 µF
C6: 220 µF
SP: 8 to 32 Ω
+
C6
Note: The power amplifier output goes to the high-impedance state in the muted state,
i.e. when address 3F has been set to the off state.
PWR-IN 23
0.22 µF
PWR-MONI 22
A13135
• Power amplifier phase compensation capacitors
Of the external components, the capacitors C1 between pin 27 (output) and pin 26 (ground) and C2 between pin 27
and pin 28 (VCC) are power amplifier phase compensation capacitors. If these components are separated from their
pins in the PCB layout, their phase compensation effect may be reduced and high-frequency oscillation may occur.
We therefore strongly recommend using a layout in which the capacitors C1 and C2 are located as close as possible
to their respective IC pins. In particular, C1, which is connected to ground, should be given priority in positioning
close to the IC. Note that phase compensation not with capacitors alone, but with series resistors (on the order of 1
to 2.2 Ω) inserted is also possible. While this can increase the phase compensation effect, since it increases the
parts count, we recommend using capacitors only. However, we do recommend phase compensation with resistors
inserted if, due to the details of the layout, the power amplifier is subject to oscillation.
Also note that the ceramic capacitor C3 between pins 26 and 28 has only a minimal phase compensation effect on
normal power amplifiers, so is not required. However, there are cases where it does have a large effect due to the
pattern layout, so we recommend creating a dummy pattern for this capacitor and handling it as a reserve
component.
No. 6471-22/29
LA8519M
• Power amplifier VREF (pin 24) line
Pin 24 is the reference voltage pin for the power amplifier, and is connected to pin 23 (the input) by an internal bias
resistor. This means that pin 24 is part of the power amplifier plus input line system. If this line is affected by the
power amplifier output or the VCC line, the resultant positive feedback can cause oscillation.
Therefore, if at all possible, the pin 24 line should not be routed around other lines. If it must be routed around
other lines, do not rout it adjacent to output or VCC lines, but rout it adjacent to ground lines to prevent
interference.
• LA8519M ground line rerouting (See the figure on the next page.)
The LA8519M circuit blocks can be classified into three systems: (1) power amplifier, (2) speech network system,
and (3) crosspoint switch and other small-signal processing systems. Since the IC itself, naturally, has a three-block
structure, each block has independent VCC and ground pins. The best possible ground system design, is for external
components that are connected to ground to be connected to the ground for the block to which they belong, and for
the pattern to be formed so that these three lines are independent and connect to the ground of the power supply
(regulator) that is the reference.
However, since there are limitations on the area available on the printed circuit board, there are cases where a
single line is connected to the reference ground. In this case, ground lines must be routed so that the ground lines
that carry larger currents (power amplifier and line connection blocks) are closer to the power supply ground (and
thus have a lower impedance)than ground lines for circuits with a lower current drain.
If the large currents used by the power amplifier or other high-current system flow in the ground lines that handle
the smaller currents from small-signal system or other low-current system, a loop may be formed and low band
oscillation may occur.
Therefore we recommend that the ground lines are designed, as described above, so that lines in which large
currents flow are routed closest to the power supply ground.
IC Usage Notes
1. If the LA8519M is used in the vicinity of its maximum ratings, even slight variations in operating conditions may
result in the maximum ratings being exceeded. Since this can lead to damage to or destruction of the device,
provide adequate margin in the fluctuations in the supply voltage and other parameters, and do not allow the
maximum ratings to be exceeded.
2. Pin shorting
If the LA8519M is left with output loads shorted for extended periods, it may be damaged or destroyed. Always
use this device in a manner such that output loads are never shorted.
No. 6471-23/29
8200pF
5.6KΩ
0.22µF
0.22µF
2SA60BNP
8.2KΩ 82Ω 7.5KΩ
22kΩ
11kΩ
1.8kΩ
1.3kΩ
82Ω
(1W)
0.1µF
0.1µF
FILTER
0.1µF 10kΩ
0.1µF
0.1µF
180pF
0.1µF
330pF
8.2Ω
150
KΩ
100
KΩ
64 LINE-OUT
63 CDC2-IN
62 FILOUT
61 FIL-IN
60 DOOR-IN
59 RF2-IN
58 RF1-IN
57 HAND-MONI
56 HAND-NF
55 RI-OUT
54 RI-IN
53 SP-GND
52 BN2
51 BN1
50 TOO
VL
1
RF1-OUT
6800pF
51Ω
49 TOI
SP-VOC
2
RF2-OUT
3
45
4
CDC1-OUT
46
VSP
DOOR-OUT
100µF
SP-VREF
0.1µF
44
DTMF-IN
DTMF-IN
+
5
CDC2-OUT
47
43
47µF
0.1µF
220µF
0.1µF
0.1µF
0.1µF
42
51kΩ
41
40
39
7
8
0.1µF
38
11
0.1µF
330pF
10
9
LA8519M
6
TA-IN
ALC-CNT
48
0.1µF
3.3kΩ
TI-NF
620Ω
R
37
330
pF
100
kΩ
36
35
12
13
100
kΩ
34
330pF
+
14
15
100
kΩ
33
16
1µF
0.1µF
330pF
TI-IN
100
kΩ
TI-OUT
20kΩ
0.1µF
+
0.1µF
0.1µF
47µF
0.1µF
GND
RV-OUT2
PRE-OUT
KT-IN
KT-IN
ALC-IN
RV-OUT1
PRE-NF
+
10kΩ
BEEP-IN
220kΩ
BEEP-IN
0.47µF
0.22µF 10kΩ
OSC-IN
OSC-IN
RV-NF
VOXA-IN
0.01µF
RESET
VOX-RCT
+
VCC 17
MIC-OUT 18
MIC-NF 19
MIC-IN 20
NC 21
EVR-OUT 22
PWR-IN 23
P-VREF 24
PWR-NF 25
P-GND 26
PWR-OUT 27
P-VCC 28
VOX-OUT 29
CE 30
DATA 31
CLOCK 32
+
+
1µF
+
470µF
3.3kΩ
0.033µF
0.22µF
220µF
+
0.1µF
0.1µF
330pF
6.2kΩ
MUTE
VOXA-OUT
0.22µF
PAD-CNT
24kΩ
VREF
220µF
100
kΩ
2kΩ
100
kΩ
220µF
0.1µF
62kΩ
T
100µF
SP
+
MIC
A13136
VCC
5V
LA8519M
Ground Line Routing
No. 6471-24/29
LA8519M
Transmitter Gain vs. Line Current (Power off)
Line Voltage vs. Line Current
10
46
VCC = 0 V
VIN= –55 dBV
fin = 1 kHz
Input: pin 40
Output: pin 48
Power supplied: VCC = 5 V
9
Line voltage — V
75 k
Ω
90 100 110 120 130 140
ugh
80
PAD-C: Grounded through 51 kΩ
10
20
30
40
50
Line current — mA
Transmitter Gain vs. Line Current (Power supplied)
f
hro
Of
ed t
C:
und
75
rough
ugh
ed th
42
D-
Gro
43
PA
-C:
round
kΩ
24 kΩ
Transmitter gain — dB
D
PA
-C: G
PAD
44
41
9
PAD-C: Grounded through 51 kΩ PAD-C: Grounded through 36 kΩ
39
0
90 100 110 120 130 140
10
20
30
40
50
60
70
80
8
7
6
5
4
3
2
1
0
0
90 100 110 120 130 140
VCC = 0 V
THD = 4 %
fin = 1 kHz
Input: pin 40
Output: pin 48
10
20
30
40
50
Line current — mA
60
70
80
90 100 110 120 130 140
Line current — mA
DTMF Gain vs. Line Current (Power off)
Transmitter Dynamic Range vs. Line Current (Power supplied)
10
32
VCC = 5 V
THD = 4 %
fin = 1 kHz
Input: pin 40
Output: pin 48
8
30
80
24
0
90 100 110 120 130 140
f
70
kΩ
60
Of
50
75
40
gh
30
rou
20
C:
D-
10
d th
0
0
nde
25
rou
kΩ
26
2
1
PA
:G
D-C
4
gh 2
hrou
27
ded t
roun
3
28
-C: G
5
4
29
PAD
6
PA
7
VCC = 0 V
VIN = –30 dBV
fin = 1 kHz
Input: pin 44
Output: pin 48
31
DTMF gain — dB
9
Transmitter dynamic range — Vp-p
80
Transmitter Dynamic Range vs. Line Current (Power off)
Transmitter dynamic range — Vp-p
VCC = 5 V
VIN = –55 dBV
fin = 1 kHz
Input: pin 40
Output: pin 48
40
PAD-C: Grounded through 51 kΩ
PAD-C: Grounded through 36 kΩ
10
20
30
40
50
Line current — mA
70
60
80
90 100 110 120 130 140
Line current — mA
DTMF Gain vs. Line Current (Power off)
DTMF Gain vs. Line Current (Power supplied)
0
32
PA
DC:
Of
ugh
hro
f
ed t
–5
–6
Ω
75 k
–7
kΩ
30
und
75
24 kΩ
20
Gro
gh
rou
rough
10
–4
ed through 24 kΩ
–8
PAD-C: Grounded through 51 kΩ
PAD-C: Grounded through 36 kΩ
0
–3
-C:
f
d th
nde
ed th
26
Of
rou
:G
round
27
-C:
D-C
-C: G
28
D
PA
PA
PAD
29
VCC = 0 V
VIN = –20 dBV
fin = 1 kHz
Input: pin 48
Output: TP65
PAD-C: Grounded through 51 kΩ
–2
Receiver gain — dB
30
–1
PAD
VCC = 5 V
VIN = –30 dBV
fin = 1 kHz
Input: pin 44
Output: pin 48
31
DTMF gain — dB
70
10
45
24
60
PAD-C: Grounded through 24 kΩ
Line current — mA
46
25
f
Of
C:
DPA
70
thro
39
0
60
de d
2
0
40 50
oun
: Gr
40
20 30
6 kΩ
41
3
10
D-C
42
gh 3
4
43
hrou
5
44
ded t
6
PA
Power off
roun
-C: G
PAD
Power supplied
7
Transmitter gain — dB
45
8
40
50
60
70
80
90 100 110 120 130 140
Line current — mA
PAD-C: Ground
–9
PAD-C: Grounded through 36 kΩ
–10
0
10
20
30
40
50
60
70
80
90 100 110 120 130 140
Line current — mA
No. 6471-25/29
LA8519M
Receiver Characteristics vs. Line Current (Power supplied)
Receiver BTL Dynamic Range vs. Line Current (Power off)
10
VCC = 5 V
VIN = –20 dBV
fin = 1 kHz
Input: pin 48
Output: TP65
1
Receiver gain — dB
24 kΩ
–5
PAD-C: Grounded through 51 kΩ
PAD-C: Grounded through 36 kΩ
–7
–8
0
f
Of
Ω
C:
D75 k
PA
ugh
thro
ded
rough
–4
–6
un
Gro
–3
nded th
–2
-C:
PAD
–1
: Grou
PAD-C
0
10
20 30
40 50
60
70
80
Receiver BTL dynamic range — Vp-p
2
VCC = 0 V
THD = 10 %
fin = 1 kHz
Input: pin 48
Output: pins 37 and 38
RL = 3 kΩ
9
8
7
6
5
4
3
2
1
0
0
90 100 110 120 130 140
10
20
30
40
Line current — mA
Receiver BTL Dynamic Range vs. Line Current (Power supplied)
10
9
8
7
10
20
30
40
50
60
70
80
Receiver dynamic range — Vp-p
Receiver BTL dynamic range — Vp-p
VCC = 5 V
THD = 10 %
fin = 1 kHz
Input: pin 48
Output: pins 37 and 38
RL = 3 kΩ
1.5
80
90 100 110 120 130 140
VCC = 0 V
THD = 10 %
fin = 1 kHz
Input: pin 48
Output: TP65
RL = 150 Ω
1
0.5
0
0
90 100 110 120 130 140
Line current — mA
10
20
30
40
50
60
70
80
90 100 110 120 130 140
Line current — mA
Receiver Dynamic Range vs. Line Current (Power supplied)
KT Gain vs. Line Current (Power off)
3
12
VCC = 5 V
THD = 10 %
fin = 1 kHz
Input: pin 48
Output: TP65
RL = 150 Ω
2.5
2
1.5
1
11
KT gain — dB
Receiver dynamic range — Vp-p
70
2
11
10
VCC = 0 V
VIN = –40 dBV
fin = 1 kHz
Input: pin 39
Output: TP65
9
8
7
0.5
0
0
60
Receiver Dynamic Range vs. Line Current (Power off)
12
6
0
50
Line current — mA
10
20
30
40
50
60
70
80
6
0
90 100 110 120 130 140
10
20
30
40
Line current — mA
50
70
60
80
90 100 110 120 130 140
Line current — mA
Quiescent Current vs. Supply Voltage
KT Gain vs. Line Current (Power supplied)
30
14
13
KT gain — dB
11
10
9
VCC = 5 V
VIN = –40 dBV
fin = 1 kHz
Input: pin 39
Output: TP65
8
7
6
0
10
20
30
40
50
60
70
80
90 100 110 120 130 140
Line current — mA
Quiescent current — mA
25
12
Power
er on
amplifi
20
ifier off
Power ampl
15
10
5
3
4
5
6
7
8
9
Supply voltage, VCC — V
No. 6471-26/29
LA8519M
Power Amplifier: Output Power vs. Distortion
Reference Voltage (pin 15) vs. Supply Voltage
100
7
5
2.4
Total harmonic distortion, THD — %
2.6
Reference voltage (pin 15)
Voltage — V
2.2
2.0
1.8
1.6
1.4
1.2
1.0
2
4
3
5
6
7
8
3
2
10
7
5
3
2
5V
1
7
5
7.5 V
3
2
0.1
10
9
Supply voltage, VCC — V
2
3
5
7
2
100
3
5
7
1000
Output power — mW
Power Amplifier: Output Noise Voltage vs. Supply Voltage
Power Amplifier: Output Power vs. Power Dissipation
100
1000
With the input shorted
Output: pin 27
RL = 8 Ω
fin = 1 kHz
Input: pin 23
Output: pin 27
RL = 8 Ω
7
5
Power dissipation — mV
7
Output noise voltage — µVrms
fin = 1 kHz
Input: pin 23
Output: pin 27
RL = 8 Ω
5
3
2
7.5 V
3
2
5V
100
7
5
3
2
4
5
6
7
8
9
10
11
10
10
12
Supply voltage, VCC — V
Output power — mV
2
1000
7
5
5
7
2
100
2
100
7
5
40
30
fin = 100 Hz
Vrin = 100 mVrms
RL = 8 Ω
RL = 620 Ω
2
5
6
7
8
9
10
11
20
4
12
5
6
Supply voltage, VCC — V
10
7
5
3
2
100
7
5
3
2
1
7
5
3
2
10
7
5
3
2
1
1
0.1
7
5
3
2
Distortion
2
3
5
7
10
2
Input voltage — mVrms
3
5
7
0.01
100
10000
7
5
3
2
Output voltage — mVrms
l
eve
ut l
tp
Ou
Total harmonic distortion, THD — %
Output voltage — mVrms
1000
7
5
3
2
9
10
11
12
Crosspoint Switch Input/Output Characteristics
100
7
5
3
2
VCC = 5 V
fin = 1 kHz
Input: pin 20
Output: pin 18
8
7
Supply voltage, VCC — V
Microphone Amplifier Input/Output Characteristics
10000
7
5
3
2
7 1000
50
3
4
5
Power Amplifier Ripple Rejection Ratio vs. Supply Voltage
3
10
3
60
THD : 10 %
fin = 1 kHz
Input: pin 23
Output: pin 27
RL = 8 Ω
Ripple rejection ratio — dB
3
3
Output power — mW
Power Amplifier: Supply Voltage vs. Output Power
10000
7
5
2
1000
7
5
3
2
VCC = 5 V
fin = 1 kHz
Input: pin 58
Output: pin 2
100
7
5
3
2
vel
t le
tpu
Ou
10
7
5
3
2
100
7
5
3
2
1
7
5
3
2
on
rti
isto
D
10
7
5
3
2
1
10
0.1
7
5
3
2
2
3
5
7
100
2
3
5
Total harmonic distortion, THD — %
10
0.01
7 1000
Input voltage — mVrms
No. 6471-27/29
LA8519M
Electronic Volume Control Step Width
Preamplifier ALC Characteristics
0
VCC = 5 V
fin = 1 kHz
VIN = –20 dBV
–2
–4
Output level
–6
100
7
5
3
2
Voltage gain — dB
Output voltage — mVrms
1000
7
5
3
2
n
Distortio
10
7
5
3
2
VCC = 5 V
fin = 1 kHz
Input: pin 63
Output: pin 11
Address 3A: On
1
7
5
3
2
1.0
10
2
3
5
7
2
100
3
5
7
–8
–10
–12
–14
–16
–18
–20
–22
–24
–26
–28
0
1000
1
2
3
Input voltage — mVrms
4
5
6
7
Step
PRE/Microphone Amplifier Output Noise Voltage vs. Supply Voltage
Crosspoint Switch Output Noise Voltage vs. Supply Voltage
100
100
7
PRE-OUT
5
Output noise voltage — µVrms
Output noise voltage — µVrms
7
MIC-OUT
5
3
2
TP65-OUT
3
EVR-OUT
2
10
RF1-OUT
7
5
3
2
10
4
5
6
7
8
1
9
4
5
6
Supply voltage, VCC — V
Crosspoint Switch Crosstalk vs. Input Level
–60
TP65-OUT
–100
PRE-OUT
MIC-OUT
RF1-OUT
–80
–90
–100
–110
–40
TP65-OUT/ADDRESS : 08 ON
DRESS
T/AD
RE-OU
P
S
ES
MIC-OUT/ADDRESS : 30 ON
: 12
ON
DR
/AD
T
OU
1-
RF
EVR-OUT/ADDRESS : 33 ON
–30
–20
–10
–130
–50
0
–40
–30
Input level — dBV
–40
VCC = 5 V
f = 1 kHz
With the VOX.C pin
connected to VCC
80
–10
0
VOX Attenuation vs. Supply Voltage
VOX Waveform Shaper Duty Ratio vs. Input Level
90
–20
Input level — dBV
100
60
50
40
30
f = 1 kHz
Input: pin 13
Output: pin 29
–41
Output level — dBV
70
Duty — %
: 39 ON
–120
EVR-OUT
–130
–50
VCC = 5 V
with 1 k-BPF
Input: pin 58
–70
Output level — dBV
Output level — dBV
–90
–120
9
Crosspoint Switch Crosstalk vs. Input Level
–80
–110
8
–60
VCC = 5 V
with 1 k-BPF
Input: pin 58
–70
7
Supply voltage, VCC — V
ON
–42
OFF
–43
20
10
0
–50
–45
–40
–35
–30
–25
Input level — dBV
–20
–15
–10
–44
4
5
6
7
8
9
Supply voltage, VCC — V
No. 6471-28/29
LA8519M
Equivalent Input Noise Voltage vs. Supply Voltage
Equivalent input noise voltage — µVrms
10
7
PRE-OUT
5
3
2
MIC-OUT
1
4
5
6
7
8
9
Supply voltage, VCC — V
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of October, 2000. Specifications and information herein are subject
to change without notice.
PS No. 6471-29/29