SANYO LA8518NM

Ordering number: EN5421
Monolithic Linear IC
LA8518NM
Signal Processor for Cordless Telephone Base Sets
Functions
Package Dimensions
Speech network block
c 2-wire/4-wire conversion
c Line driver
c Transmitting amplifier
c Receiving amplifier (with ATT)
c Power supply switching circuit
c Impedance matching
c DTMF interface
c Key tone interface
c BN circuit network switching circuit
(BN = Balancing Network)
unit : mm
3159-QFP64E
[LA8515NM]
Signal processor block
c Record preamplifier (with ALC)
c Record amplifier
c Power amplifier (VCC = 5 V, RL = 8 Ω, PO = 200 mW)
c Playback equalizer amplifier
c Voice detector (VOX)
c Electronic volume control (4 dB, 7 steps)
SANYO : QIP64E
Features
c Because it is possible to switch the Balancing Network
between two systems, one for the near end and one for the
far end, in accordance with the line current, this IC provides
excellent sidetone characteristics over a wide range of line
currents.
c Receiver amplifier supports ceramic receivers and dynamic
receivers.
c Power amplifier on chip
(VCC = 5 V, RL = 8 Ω, PO = 200 mW).
c Crosspoint switches allow full mixing, permitting the
implementation of a variety of functions, such as three- or
four-way calls.
c Digital volume control on chip (power system output).
Allowable power dissipation, Pd max − W
Crosspoint switch block
c Crosspoint switches (mixing available)
c CPU interface
120 × 120 × 1.5 mm3 glass epoxy board
Independent IC
Ambient temperature, Ta − °C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
41596HA (II) No.5421-1/31
LA8518NM
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Symbol
VL max
VCC max
Line current
IL max
Allowable power dissipation
Pd max
Conditions
Ratings
Unit
Speech network block
15
Other than speech network block
10
V
V
130
mA
1.05
W
Operating temperature
Topr
–20 to +70
°C
Storage temperature
Tstg
–40 to +150
°C
Ratings
Unit
Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended supply voltage
VCC
Operating supply voltage range
VCC op
Conditions
Other than speech network block
5
V
4.5 to 7.5
V
Operating Characteristics at Ta = 25°C, f = 1 kHz
Parameter
Symbol
Conditions
[Speech Network Block (External power supply operating characteristics)]
Line voltage
VL
IL = 20 mA
IL = 50 mA
IL = 120 mA
Internal supply voltage
VSP
IL = 20 mA
IL = 50 mA
IL = 120 mA
Transmitting gain
GT
IL = 20 mA, VIN = –55 dBV
IL = 120 mA, VIN = –55 dBV
Receiving gain
GR
IL = 20 mA, VIN = –20 dBV
IL = 120 mA, VIN = –20 dBV
DTMF gain
GMF
IL = 20 mA, VIN = –30 dBV
IL = 120 mA, VIN = –30 dBV
KT gain
GKT
IL = 20 mA, VIN = –40 dBV
IL = 120 mA, VIN = –40 dBV
Transmitting dynamic range
DRT
IL = 20 mA, THD = 4%
IL = 120 mA, THD = 4%
Receiving dynamic range
IL = 20 mA, THD = 10%
DRDR
(Single RL = 150 Ω)
IL = 120 mA, THD = 10%
Receiving dynamic range
IL = 20 mA, THD = 10%
DRSR
(BTL RL = 3 kΩ)
IL = 120 mA, THD = 10%
MUTE high-level input voltage
VIH
IL = 20 mA to 120 mA
MUTE low-level input voltage
VIL
IL = 20 mA to 120 mA
Transmitting PADC attenuation
∆GT
IL = 30 mA, ground at 24 kΩ
Receiving PADC attenuation
∆GR
IL = 30 mA, ground at 24 kΩ
Internal reference voltage
VREF
IL = 20 mA
IL = 50 mA
IL = 120 mA
[Speech Network Block (Operating characteristics when power is off)]
Line voltage
VL
IL = 20 mA
IL = 50 mA
IL = 120 mA
Internal supply voltage
VSP
IL = 20 mA
IL = 50 mA
IL = 120 mA
min
typ
max
Unit
3.3
4.9
7.8
4.5
4.5
4.5
43
39
–3.0
–9.5
28
24
9
9
2.5
4.5
0.5
0.5
5
5
0.6VSP
0
3.9
5.7
9.3
4.8
4.8
4.8
45
41
–1.0
–7.5
30
26
11
11
4.3
6.5
10.8
5.0
5.0
5.0
47
43
+1.0
–5.5
32
28
13
13
V
V
V
V
V
V
dB
dB
dB
dB
dB
dB
dB
dB
Vp-p
Vp-p
Vp-p
Vp-p
Vp-p
Vp-p
V
V
dB
dB
V
V
V
0.4
3.6
6.5
2.3
2.3
2.3
3.3
4.8
7.2
1.7
2.5
4.55
3.8
5.4
8.7
1.9
2.8
4.85
4.3
6.2
10.2
2.1
3.1
5.15
V
V
V
V
V
V
Continued on next page.
No.5421-2/31
LA8518NM
Continued from preceding page.
Parameter
Transmitting gain
Receiving gain
Symbol
GT
GR
DTMF gain
GMF
KT gain
GKT
Transmitting dynamic range
DRT
Receiving dynamic range
(Single RL = 150 Ω)
DRDR
Receiving dynamic range
(BTL RL = 3 kΩ)
DRSR
MUTE high-level input voltage
MUTE low-level input voltage
Transmitting PADC attenuation
Receiving PADC attenuation
Internal reference voltage
VIH
VIL
∆GT
∆GR
VREF
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
Conditions
20 mA, VIN = –55 dBV
120 mA, VIN = –55 dBV
20 mA, VIN = –20 dBV
120 mA, VIN = –20 dBV
20 mA, VIN = –30 dBV
120 mA, VIN = –30 dBV
20 mA, VIN = –40 dBV
120 mA, VIN = –40 dBV
20 mA, THD = 4 %
120 mA, THD = 4 %
20 mA, THD = 10%
120 mA, THD = 10%
20 mA, THD = 10%
120 mA, THD = 10%
20 mA to 120 mA
20 mA to 120 mA
30 mA, ground at 24 kΩ
30 mA, ground at 24 kΩ
20 mA
50 mA
120 mA
min
42
39
–4.5
–9
27
24
6.7
9
2.5
4.5
0.3
0.5
2
6
0.6VSP
0
typ
44
41
−2.5
–7
29
26
8.7
11
max
46
43
–0.5
–5
31
28
10.7
13
0.4
3.7
6.3
0.65
1.0
1.7
Unit
dB
dB
dB
dB
dB
dB
dB
dB
Vp-p
Vp-p
Vp-p
Vp-p
Vp-p
Vp-p
V
V
dB
dB
V
V
V
Operating Characteristics at Ta = 25°C, f = 1 kHz
Parameter
Symbol
[Audio Signal Processing Block]
PRE AMP Input from crosspoint switch
Voltage gain
VGC
Total harmonic distortion
THD
ALC saturation output level
VOS
ALC range
ALCW
Equivalent input noise voltage
VNI
PB AMP
Voltage gain
VGE
Total harmonic distortion
THD
Equivalent input noise voltage
VNI
OGM AMP
Voltage gain
VGG
Total harmonic distortion
THD
REC AMP
Voltage gain
VGR
Output bias voltage
VB
(Voltage at pin 21)
Total harmonic distortion
THD
MIC AMP
Voltage gain
VGM
Total harmonic distortion
THD
Equivalent input noise voltage
VNI
POWER AMP RL = 8 Ω
Voltage gain
VGP
Output voltage
PO
Total harmonic distortion
THD
Input resistance
RIN
Ripple rejection ratio
SVRR
Output noise voltage
VNO
Conditions
–45 dBV input
–20 dBV input
–20 dBV input
From when ALC is on until THD is 1%
Input AC-shorted, 20 to 20 kHz
–60 dBV input
–60 dBV input
Pin AC-shorted, 20 to 20 kHz
–20 dBV input
–20 dBV input
Pin 20 ZAC = 8.1 kΩ, between pins 25 and 21
Pin 20 ZDC = 15 kΩ,
pin 21 load = 8.2 kΩ
–40 dBV input
–40 dBV input
Pin 33 AC-shorted, 20 to 20 kHz
–30 dBV input
THD = 10%
–30 dBV input
Rg = 0, fr = 100 Hz, Vr = –20 dBV
Pin 42 AC-shorted, 20 to 20 kHz
min
typ
max
Unit
8
0.4
110
10
1.0
130
5.0
10
dB
%
mVrms
dB
µVrms
46.5
48.5
0.5
5.0
50.5
1.5
10
dB
%
µVrms
7
9
0.1
11
1.0
dB
%
4
0.8
6
1.0
8
1.2
dB
V
0.8
1.5
%
27
29
0.1
2.0
31
1.0
5
dB
%
µVrms
28
200
30
250
0.6
15
32
dB
mW
%
kΩ
dB
µVrms
6
90
15
1.5
40
0.04
0.1
Continued on next page.
No.5421-3/31
LA8518NM
Continued from preceding page.
Parameter
VOX
Sensitivity 1
Sensitivity 2
Electronic volume control
Step width
VREF
Output voltage
Control
Clock frequency
High-level input signal
Low-level input signal
Power supply switch
Pin 31 voltage 1
Pin 31 voltage 2
Quiescent current
Symbol
VOXL
VOXH
Conditions
–24 dBV input
–27 dBV input
min
max
Unit
0.3
V
V
4.8
EVRW
3.8
VREF
2.1
FCK
VH
VL
3
VCH1
VCH2
ICCO
typ
The voltage applied to pin 31 is effective
The voltage supplied from pin 64 is effective
Power amplifier on
2.3
dB
2.5
V
500
1.5
kHz
V
V
1.2
35
V
V
mA
3.5
19
26
No.5421-4/31
LA8518NM
Block Diagram
No.5421-5/31
LA8518NM
Test Circuit Diagram
No.5421-6/31
LA8518NM
Sample Application Circuit
No.5421-7/31
LA8518NM
— Serial control data format —
c Serial data content
First bit
A0 to A6
D
→
→
Specify the address of a crosspoint switch and a control switch.
Turns the crosspoint switch on and off and controls the control switch.
(When D = 1, the switch is on; when D = 0, the switch is off.)
c Example: Turning address 11 (AUX input, RF1 output) on
The address table is shown on the following page:
Note 1: Because there is a power-on reset function, all crosspoint switches and control switches are reset when the external power
supply (VCC at pin 31) is turned on.
Note 2: SW2 and SW3 in the block diagram are controlled by the MUTE pin (pin 51); the signals that are enabled are shown
below.
MUTE pin
SW2
SW3
H
Transmitting (Pin 58)
TAIN (Pin 59)
Receiving (Pin 7)
L
DTMF (Pin 60)
KT (Pin 55)
No.5421-8/31
LA8518NM
— Address chart —
Input
LINE
Output
LINE
HAND
RF1
RF2
DOOR
AUX
MIC
OGM
PRE
—
01
02
03
—
04
05
06
—
HAND
07
—
08
09
0A
0B
—
0C
—
RF1
0D
0E
—
0F
10
11
12
13
—
RF2
14
15
16
—
17
18
19
1A
—
DOOR
—
1B
1C
1D
—
1E
1F
20
—
AUX
21
22
23
24
25
26
27
28
—
PWR
29
—
2A
2B
2C
2D
—
2E
37
PRE
2F
30
31
32
33
34
35
36
—
Other Control Switches
00
38
39
3A
3B
3C
3D
3E
3F
40
41
42
43
44
45
46
47
All crosspoint switches and control switches off *2
Mixing switch for PB amplifier-OGM amplifier on
Transmitting/receiving CTL (SW1 and SW2 in the block diagram) *1
Receiver amplifier ATT
Set to 0 dB
Line amplifier ATT
Set to –6 dB
ALC on
PB amplifier on
REC amplifier on
Power amplifier on
Electronic volume control
0 dB
Electronic volume control
–4dB
Electronic volume control
–8dB
Electronic volume control
–12dB
*2
Electronic volume control
–16dB
Electronic volume control
–20dB
Electronic volume control
–24dB
Electronic volume control
–28dB
*1: When address 39 is on, SW1 enables the transmitting amplifier output (pin 58) signal, and SW4 enables the receiving
amplifier output (pin 7) or KT (pin 55) signal. If voltage is not supplied to pin 31 (VCC) (power is off), the status of SW1
and SW4 is the same as address 39 is in on state.
*2: When setting address 00 and 40 to 47, ‘‘D’’ data may be either ‘‘0’’ or ‘‘1’’.
Note 1: The receiver amplifier ATT is set to −6 dB when power is first applied, when a reset is performed, and when all of the
switches are off.
Note 2: The line amplifier ATT is set to 0 dB when power is first applied, when a reset is performed, and when all of the switches
are off.
Note 3: The electronic volume control is set to 0 dB when power is first applied, when a reset is performed, and when all of the
switches are off.
Note 4: The addresses are given in hexadecimal notation.
No.5421-9/31
LA8518NM
Input Port Timing
c
c
c
c
c
c
c
c
c
fMAX
fWL
fWH
tCS
tCH
tDS
tDH
tWC
tWR
(Maximum clock frequency)
(Clock pulse width ‘‘L’’)
(Clock pulse width ‘‘H’’)
(Chip enable setup time)
(Chip enable hold time)
(Data setup time)
(Data hold time)
(Chip enable pulse width)
(Reset pulse width)
500 kHz
1µs or longer
1µs or longer
1µs or longer
1µs or longer
1µs or longer
1µs or longer
1µs or longer
1µs or longer
Note: The control data must input 400 ms or longer after the supply voltage is applied to VCC (pin 31).
No.5421-10/31
LA8518NM
Pin Functions
Pin No.
Pin Name
Internal Equivalent Circuit
Pin Function
64
1
2
VL
TOI
TOO
c Line current input pin, line voltage pin.
c Transmitting output current input pin.
c Transmitting output current output pin.
3
4
BN1
BN2
c BN switch pin 1.
c BN switch pin 2. Connect when there are two
balancing network circuits. Open when not
used.
5
GND (SP)
c Speech network system GND pin.
6
7
RI IN
RI OUT
c Receiving input amplifier – input pin.
c Receiving input amplifier output pin.
8
9
HAND NF
HAND MONI
c Handset amplifier – input pin.
c Handset amplifier output pin.
10
11
13
RF1 IN
RF2 IN
AUX IN
c Compander 1 input pin.
c Compander 2 input pin.
c Unused input pin.
12
DOOR IN
c Amplifier input pin for interphone.
Because there is a feedback resistor
(30 kΩ) on chip, the input is passed
through an external resistor.
Continued on next page.
No.5421-11/31
LA8518NM
Continued from preceding page.
Pin No.
Pin Name
Internal Equivalent Circuit
Pin Function
14
LINE OUT
c Line output pin.
15
16
17
18
RF1 OUT
RE2 OUT
DOOR OUT
AUX OUT
c
c
c
c
19
GND
c Signal processing system GND.
20
21
BIAS/GAIN
HEAD
c Bias pin. The REC amplifier gain and the
REC bias gain can be controlled by an
external resistor.
c REC amplifier output pin and PB amplifier +
input pin.
22
24
PB NF
PRE NF
c PB amplifier − input pin.
c PRE amplifier − input pin.
23
25
35
PB OUT
PRE OUT
MIC OUT
c PB amplifier output pin.
c PRE amplifier output pin.
c MIC amplifier output pin
26
ALC IN
c ALC input pin. Input from the PRE output (pin
25) via a coupling capacitor. In addition, the
ALC level can be adjusted by connecting
resistors in series.
Compander 1 input pin.
Compander 2 input pin.
Interphone output pin.
Auxiliary output pin.
Continued on next page.
No.5421-12/31
LA8518NM
Continued from preceding page.
Pin No.
Pin Name
Internal Equivalent Circuit
Pin Function
27
ALC CT
c ALC time constant adjustment pin. Adjusts
the ALC attack time and recovery time.
28
29
OGM IN
OGM OUT
c OGM amplifier − input pin.
c OGM amplifier output pin.
30
VREF
c Internal reference voltage output pin
(approx. 2.3 V).
31
VCC
c External power supply input pin. Supplies
power to the signal processing system and to
VSP (pin 62).
32
36
VOX TH
VOX IN
c VOX sensitivity adjustment pin. The VOX
sensitivity can be adjusted by connecting this
pin to pin 30 (VREF) through a resistor.
c VOX + input pin.
33
34
MIC IN
MIC NF
c MIC amplifier + input pin.
c MIC amplifier − input pin.
37
VOX.C
c VOX detection pin. Can also be used as a
waveform shaper by forcing this pin high.
Continued on next page.
No.5421-13/31
LA8518NM
Continued from preceding page.
Pin No.
Pin Name
Internal Equivalent Circuit
Pin Function
38
P. GND
c Power system GND pin.
40
c Power system power supply pin.
39
41
42
43
P. VCC
PWR OUT
PWR NF
PWR IN
D.C
44
PWR MONI
c Output pin for power amplifier.
45
VOX OUT
c VOX output pin. Open collector output.
46
47
48
49
CE
DATA
CLOCK
RESET
c
c
c
c
c Power amplifier output pin. Goes to high
impedance when MUTE is on.
c Power amplifier − input pin.
c Power amplifier + input pin.
c Power amplifier reference voltage pin
(approximately 4/9 × P. VCC).
Chip enable input pin.
Data input pin.
Clock input pin.
Reset pin. Power-on reset.
to
50
PADC
c Pad control pin. By connecting this pin to
GND or to S. VCC (pin 63) through a resistor,
it is possible to use the line current for gain
control and to control the operating current
for BN switching.
Continued on next page.
No.5421-14/31
LA8518NM
Continued from preceding page.
Pin No.
Pin Name
Internal Equivalent Circuit
Pin Function
51
MUTE
c Mute pin. Switches the transmitting signal
and the DTMF signal in the transmitting
system, and the receiving signal and the KT
signal in the receiving system (SW2 and
SW3 in the block diagram). When low, the
DTMF and KT signals are valid.
52
53
54
RV NF
RV OUT1
RV OUT2
c Receiver amplifier − input pin.
c Receiver amplifier 1 output pin.
c Receiver amplifier 2 output pin.
55
KT IN
c Key tone input pin.
56
57
58
TI IN
TI NF
TI OUT
c Transmission input amplifier + input.
Because bias voltage is not applied
internally, connect signal from REF (pin 61)
via a resistor.
c Transmission input amplifier − input pin.
c Transmission input amplifier output pin.
59
TA IN
c Input pin for LINE output pin.
60
DTMF IN
c Input for DTMF input pin.
Continued on next page.
No.5421-15/31
LA8518NM
Continued from preceding page.
Pin No.
61
Pin Name
Internal Equivalent Circuit
REF
(Pin 30)
Pin Function
c Speech network system internal reference
voltage output. When the VCC (pin 31)
voltage is 3.5 V or more, VREF (pin 30) is
output. When the VCC voltage is 1.2 V or
less, voltage of approximately (2/5) × VSP is
output.
Power supply
ON
62
VSP
c Speech network system internal power
supply. When the VCC (pin 31) voltage is
3.5 V or more, (VCC applied voltage or
thereabout − 0.3 V) is output. When the VCC
voltage is 1.2 V or less, (S. VCC (pin 63) or
thereabout − 0.3 V) is output.
63
S. VCC
c Speech network system power supply. When
the VCC (pin 31) voltage is 1.2 V or less,
voltage is supplied to VSP (pin 62) from the
line voltage.
No.5421-16/31
LA8518NM
Usage Explanations
c Speech network
c External Transistors
Line
LA8518NM
Fig. 1
Because the IC has a built-in power amplifier, for reasons concerning allowable power dissipation, connect a transistor for
heat dissipation purposes as shown in Fig. 1 so that the line current is consumed externally from the IC. In addition, when
establishing the allowable power for R1 and R2, take into consideration the maximum line current that can be expected.
* When oscillation is generated due to the load state between VL-GND, insert C1 (about 0.1µF).
c DC resistance conversion method
By varying R2 in Fig. 1, it is possible to change the DC resistance. (Refer to the graphs below.)
* Note that varying R2 will also change the transmitting system gain and the balancing network conditions.
c AC impedance setting method
The AC impedance is basically determined by R3 (620 Ω) and C2 (220 µF) in Fig. 1. Because AC loads other than the speech
network will be placed on the line, adjust the AC impedance in conjunction with the speech network impedance.
* Note that varying R3 changes the DC resistance.
DC characteristics (Power on)
Line voltage, VL − V
Line voltage, VL − V
DC characteristics (Power off)
Line current, IL − mA
Line current, IL − mA
No.5421-17/31
LA8518NM
c Balancing Network
It is possible to switch the Balancing Network between two systems, one for the near end and one for the far end, in accordance
with the line current. (Refer to Fig. 1 for the connection method.) In addition, the switching point can be varied by connecting the
PADC pin (pin 50) to GND or to S. VCC (pin 63) via a resistor.
(When using only one Balancing Network, refer to Fig. 2.)
Line
LA8518NM
Fig. 2
Note) The constant of Balancing Network is a reference value.
c The DC characteristics when the power is off
Load
LA8518NM
By connecting a load to VSP (pin 62), it is possible to change the DC characteristics without changing the DC characteristics only
when the power is off. (Refer to the diagram below.)
DC characteristics (Power off)
No load
Line current, IL − mA
Line voltage, VL − V
Line voltage, VL − V
DC characteristics (Power on)
No change
Line current, IL − mA
No.5421-18/31
LA8518NM
c Receiver Amplifier Application Circuit
1
When using the dynamic receiver
2
When using the ceramic receiver
c The Receiver Amplifier Attenuator
Normally, the attenuator is set to −6 dB. It is set to 0 dB when serial data 3A is on.
No.5421-19/31
LA8518NM
c Gain Distribution
Line drive
amp
Transmitting
Transmitting
amp
*1 IL = 20 mA
*2 IL = 120 mA
Note 1) Terminal of line 600 Ω
Balancing
Network
Receiving input Receiving
amp
Receiving
output amp
Attenuation
*1 IL = 20 mA
*2 IL = 120 mA
*3 When serial data 3A is turned on.
Note 2) The gain values are approximate values.
Note 3) The values shown in parentheses can be varied externally.
No.5421-20/31
LA8518NM
Speech Network Block Switch Operation
Power supply
Line amp
SW2 and SW3 are controlled by pin 51 (MUTE), while SW1 and SW4 are controlled by the serial data (address 39). (SW2 and
SW3, and SW1 and SW4 are coupled to each other.)
SW1, SW4 operation
Condition
SW1
SW4
Power on (Initial state)
1
1
Address 39 on
2
2
Power off
2
2
Pin 51 (MUTE)
SW2
SW3
High
1
1
Low
2
2
* When the power is off, SW1 and SW2 are fixed at ‘‘2’’ and
cannot be switched.
SW2, SW3 operation
* SW2 and SW3 operate as shown in the table at left,
regardless of whether the power is on or off.
No.5421-21/31
LA8518NM
c LINE amplifier attenuator
Normally, the attenuator is set to 0 dB. It is set to −6 dB when serial data 3 dB is on.
Crosspoint switch
c REC amplifier V/I conversion
PB input
VIN = 0.3 VP-P
PRE Amp output level
Internal reference voltage 2.3 V
In order to derive the recording current for the DC bias, this circuit performs V/I conversion. The conversion gain and the bias
current can be controlled by the external resistor connected to pin 20. Current equal to the current output from pin 20 is output
from pin 22.
DC bias current = 2.3 V/(100 Ω + 15 kΩ) 6 150 µA
Signal current = 1.0 Vp-p/(100 Ω + 15 kΩ//22 kΩ) 6 110 µAp-p
c VOX
1 The VOX circuit determines whether or not conversation is taking place. If the VOX input (pin 36) signal is −24dB or
higher, the VOX output (pin 45) goes low. The output level is adjusted by inserting a resistor between VOX TH (pin 32)
and VREF (pin 30).
2 Because the circuit can be used as a waveform shaper by connecting VOX C (pin 37) to VCC (setting pin 37 high), a
400 Hz beep tone can be detected.
(Open collector output)
No.5421-22/31
LA8518NM
c Power amplifier application
C1 : 0.1 µF
C2 : 0.1 µF
C3 : 220 µF
C4 : 220 µF
C5 : 100 to 470 µF
SP : 8 to 16 Ω
c Voltage gain: 20 to 30 dB
c No capacitor for frequency
characteristics adjustment
connected to the feedback
resistor.
* The phase compensation capacitor C2 should be located near the IC.
* When muting (address 3F ‘‘off’’), the impedance of the power amplifier output (pin 39) is high.
No.5421-23/31
LA8518NM
c Serial control mode example
Below are the basic modes.
Serial Data
Mode
A4
A3
A2
A1
A0
D0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
1
1
1
1
1
1
2F
37
3C
3E
3F
Input LINE, output PRE
Input PRE, output PWR
ALC ON
REC ON
PWR ON
(Base set)
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
1
1
1
0
0
1
0
1
1
0
1
1
0
1
1
0
1
1
0
0
1
1
1
1
0
0
0
1
1
1
1
1
1
01
07
2F
30
3C
3E
Input HAND, output LINE
Input LINE, output HAND
Input LINE, output PRE
Input HAND, output PRE
ALC ON
REC ON
(Handset)
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
0
1
0
0
1
0
1
1
1
0
0
1
1
1
1
1
1
02
0D
2F
31
3C
3E
Input RF1, output LINE
Input LINE, output RF1
Input LINE, output PRE
Input RF1, output PRE
ALC ON
REC ON
0
0
0
1
1
1
1
1
1
0
1
1
1
1
1
0
0
1
1
0
0
1
1
1
35
3C
3E
Input MIC, output PRE
ALC ON
REC ON
(Base set)
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
1
1
1
0
0
0
1
0
0
1
1
1
1
0
0
1
0
0
1
1
1
1
1
0
1
1
0
1
1
0
1
1
1
0
1
1
0
1
1
1
0
1
1
1
1
1
0
0
0
1
0
0
1
1
1
1
1
1
1
1
1
1
1
01
07
2F
30
06
2E
3B
3C
3E
3F
Input HAND, output LINE
Input LINE, output HAND
Input LINE, output PRE
Input HAND, output PRE
Input OGM, output LINE
Input OGM, output PWR
LINE −6dB
ALC ON
REC ON
PWR ON
(Handset)
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
1
1
0
0
0
1
0
0
1
1
1
0
1
1
0
0
1
1
1
1
0
1
1
0
1
1
0
1
1
1
0
1
0
1
1
1
0
1
0
1
1
1
0
0
1
0
0
1
1
1
1
1
1
1
1
1
02
0D
2F
31
06
2E
3B
3C
3E
Input RF1, output LINE
Input LINE, output RF1
Input LINE, output PRE
Input RF1, output PRE
Input OGM, output LINE
Input OGM, output PWR
LINE −6dB
ALC ON
REC ON
0
0
0
0
0
0
1
1
1
1
0
0
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
0
0
1
0
0
0
1
1
1
1
1
1
1
06
2E
38
3D
3F
Input OGM, output LINE
Input OGM, output PWR
Mix OGM and PB
PB ON
PWR ON
DECT REC
2 WAY BEEP
ICM OUT
Remarks
A5
ICM REC
2 WAY REC
Address
A6
No.5421-24/31
LA8518NM
Serial Data
Mode
Address
Remarks
1
1
1
1
2E
38
3D
3F
Input OGM, output PWR
Mix OGM and PB
PB ON
PWR ON
1
0
1
1
1
1
13
38
3D
Input OGM, output RF1
Mix OGM and PB
PB ON
0
0
1
0
1
1
35
3C
Input MIC, output PRE
ALC ON
0
1
0
0
1
0
1
1
31
3C
Input RF1, output PRE
ALC ON
1
0
1
1
1
1
1
1
1
1
0
1
1
1
0
1
1
1
1
1
2F
37
3C
3F
Input LINE, output PRE
Input PRE, output PWR
ALC ON
PWR ON
0
0
1
0
1
1
1
1
1
1
1
1
0
0
1
1
1
1
06
2E
3F
Input OGM, output LINE
Input OGM, output PWR
PWR ON
0
1
1
1
1
1
1
1
0
1
1
1
2E
3F
Input OGM, output PWR
PWR ON
A6
A5
A4
A3
A2
A1
A0
D0
(Base set)
0
0
0
0
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
1
1
0
0
1
0
0
1
1
(Handset)
0
0
0
0
1
1
1
1
1
0
1
1
0
0
1
1
0
0
(Base set)
0
0
1
1
1
1
0
1
1
1
(Handset)
0
0
1
1
1
1
0
1
OGM CHANGE
0
0
0
0
1
1
1
1
0
1
1
1
OGM OUT
0
0
0
0
1
1
0
0
1
1
ICM PLAY
OGM REC
OGM PLAY
(Base set)
0
0
1
0
0
1
1
1
13
Input OGM, output RF1
ROOM MONI
(Handset)
0
0
0
0
1
0
1
1
05
Input MIC, output LINE
ROOM OUT
0
0
0
1
1
1
0
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
2F
37
3F
Input LINE, output PRE
Input PRE, output PWR
PWR ON
VOICE SELE
0
0
0
0
0
1
1
1
0
0
1
1
0
1
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
06
2F
37
3F
Input OGM, output LINE
Input LINE, output PRE
Input PRE, output PWR
PWR ON
Interactive REC
0
0
0
0
0
1
1
1
0
0
1
1
0
1
1
1
1
1
1
1
1
1
0
1
0
1
0
0
1
1
1
1
06
2F
3C
3E
Input OGM, output LINE
Input LINE, output PRE
ALC ON
REC ON
Extension call
0
0
0
0
0
0
1
1
0
1
0
1
0
0
1
1
08
0E
Input RF1, output HAND
Input HAND, output RF1
Three-way call
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
0
1
1
0
1
1
0
0
1
1
0
1
0
1
0
1
1
1
1
1
1
01
02
07
08
0D
0E
Input
Input
Input
Input
Input
Input
HAND, output LINE
RF1, output LINE
LINE, output HAND
RF1, output HAND
LINE, output RF1
HAND, output RF1
‘‘1’’= HIGH ‘‘0’’= LOW
No.5421-25/31
LA8518NM
Usage Examples for Each Mode
1) ICM REC (In Coming Message Rec.)
c Recording incoming messages.
c Recording memos from an outside location (remote control from an outside location).
2) 2WAY REC
c Recording of both sides of conversations.
c Recording incoming messages.
3) DECT REC
c Recording memos using the microphone (recording messages to family or making simple recordings).
4) 2WAY BEEP
c An alarm sound is output from the speaker and recorded as an ICM, and is simultaneously output on the line and relayed to the
other party.
c Can be indicated to the other party that recording is in progress.
c Line output is reduced by 6 dB in comparison with other modes.
5) ICM OUT
c Playing back incoming messages.
c Listening to incoming messages from an outside phone.
c Transferring incoming messages.
c Playing back the memo recording.
6) ICM PLAY
c Playing back incoming messages.
c Playing back the memo recording.
7) OGM REC (Outgoing Message rec.)
c Recording the answering message in the IC.
8) OGM CHANGE
c Changing the answering message by remote control from an outside phone.
9) OGM OUT
c Playing back the answering message.
c Transmitting the answering message (by remote control, etc.).
10) OGM PLAY
c Playing back and checking the answering message.
11) ROOM MONI
c Listening to the microphone input by remote control from an outside telephone.
12) ROOM OUT
c Outputting messages, etc., over the speaker by remote control from an outside telephone.
13) VOICE SELE
c Outputting the other party’s voice over the speaker when transmitting the response message.
14) Interactive recording
c Recording an incoming message while transmitting the answering message.
No.5421-26/31
LA8518NM
IC Usage Notes
1) Printed circuit board
When creating a printed circuit board, make the GND lines for pins 19 and 38 thick and short. Common impedance could
result in a worsening of distortion.
2) When used nearly at the maximum ratings, even a slight fluctuation in conditions could result in the maximum ratings being
exceeded, which may result in damage to the IC. Therefore, allow for an adequate safety margin in regards to the power supply
voltage, etc., and use the IC only within ranges that will not exceed the maximum ratings under any circumstances.
3) Short circuits between pins
Turning on the power while there is a short circuit between pins is a cause of IC damage and deterioration. Therefore, when
mounting the IC on a board, make sure that the pins are not short-circuited by solder, etc., before applying power.
4) Load short circuit
Leaving a load in a short-circuited state for an extended period of time is a cause of IC damage and deterioration. Therefore, do
not short-circuit the load at any time.
5) Power amplifier
A phase compensation capacitor must be connected between pin 39 (PWR OUT) and pin 38 (P. GND) and positioned near the
IC.
DC characteristics (power off)
DC characteristics (power on)
Pin 64
Pin 62
Voltage − V
Voltage − V
Pin 64
Pin 62
Pin 61
Pin 61
Pin 56 input
Open
Line current, IL − mA
Line current, IL − mA
Transmitting characteristics (power off)
Transmitting gain, GT − dB
Transmitting gain, GT − dB
Line current, IL − mA
Transmitting characteristics (power on)
Pin 56 input
Open
Line current, IL − mA
No.5421-27/31
Transmitting dynamic range (power on)
Transmitting D range
Pin 56 input
Transmitting dynamic range, DRT − dBV
Transmitting dynamic range, DRT − dBV
LA8518NM
Line current, IL − mA
DTMF characteristics (power on)
DTMF gain, GMF − dB
DTMF gain, GMF − dB
Pin 56 input
Pin 60 input
Open
Line current, IL − mA
Receiving characteristics (power on)
Open
Line current, IL − mA
Receiving dynamic range (power on)
Pin 64 input
Receiving D range
Line current, IL − mA
Pin 64 input
Receiving gain, GR − dB
Pin 64 input
Open
Line current, IL − mA
Receiving characteristics (power off)
Receiving dynamic range, DRDR − dBV
Receiving gain, GR − dB
Transmitting D range
Line current, IL − mA
DTMF characteristics (power off)
Pin 60 input
Receiving dynamic range, DRDR − dBV
Transmitting dynamic range (power off)
Open
Line current, IL − mA
Receiving dynamic range (power off)
Pin 64 input
Receiving D range
Line current, IL − mA
No.5421-28/31
LA8518NM
KT characteristics (power off)
KT characteristics (power on)
Pin 55 input
KT gain
KT gain, GKT − dB
KT gain, GKT − dB
KT gain
Pin 55 input
Line current, IL − mA
VREF (Pin 30)
Reference voltage, VREF − V
Quiescent current
Supply voltage, VCC − V
PRE Amp ALC characteristics
Supply voltage, VCC − V
Equivalent input noise
Total harmonic distortion, THD − %
Quiescent current, ICCO − mA
Line current, IL − mA
Quiescent current
Equivalent input noise, VNI − µVrms
Each input shorting
Output level, VO − mVrms
Output level
Pin 13 input
Address 34, 3C on
Output level
Input level − dBV
Gain
Voltage gain, VG − dB
Pin 21 input
Address 3D on
Input level − dBV
PB Amplifier voltage gain
Total harmonic distortion, THD − %
Output level, VO − mVrms
Supply voltage, VCC − V
PB Amplifier input/output characteristics
Pin 21 input
Address 3C on
Frequency, f − Hz
No.5421-29/31
LA8518NM
Total harmonic distortion, THD − %
Output level, VO − mVrms
Output level, VO − mVrms
Pin 28 input
Output level
Total harmonic distortion, THD − %
MIC Amp input/output characteristics
OGM Amplifier input/output characteristics
Pin 33 input
Output level
Input level − dBV
Crosspoint switch input characteristics
Input level − dBV
Crosspoint switch output noise
Pin 44
Pin 15
Supply voltage, VCC − V
Crosspoint switch crosstalk
Pin 13 input, Pin 18 output
Output level
Input level − dBV
PWR Amplifier output noise
Input shorted
PRE Amp
(gain 30 dB)
Receiving
amplifier
(gain 10 dB)
Pins 14,15,16,17,18
output
Output noise, VNO − µVrms
Crosstalk, CT − µVrms
PB Amp (gain 50 dB)
Pin 13 input, Pin 18 output
Address 26 on
Output power, PO − mW
Total harmonic distortion, THD − %
Noise
Supply voltage, VCC − V
PWR Amplifier PO − VCC characteristics
Input level − dBV
PWR Amp PO − THD characteristics
Output power, PO − mW
Total harmonic distortion, THD − %
Pin 53
Output level, VO − mVrms
Output noise, VNO − µVrms
Each input shorting
Output power
Supply voltage, VCC − V
No.5421-30/31
LA8518NM
PWR Amp power dissipation characteristics
VOX sensitivity
Input level − dBV
Power dissipation, Pd − mW
Pin 36 input
Output power − mW
VOX sensitivity resistance − ON level
Supply voltage, VCC − V
Electronic volume control step width
ON level
Duty − %
Resistance value − Ω
VOX waveform shaping duty
Voltage gain, VG − dB
ON level − dBV
Input −20 dBV
Series 1
Level
Duty
Connect VOX, C pin to VCC
Input level − dBV
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment,
nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or
indirectly cause injury, death or property loss.
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
1 Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors
and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and
expenses associated with such use:
2 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO
ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume
production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use
or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of April, 1996. Specifications and information herein are subject to change without notice.
No.5421-31/31