Ordering number : ENN5687B Monolithic Digital IC LB1924 Power Brushless Motor Driver IC for Office Automation Equipment Overview Package Dimension The LB1924 is a direct PWM drive output driver IC appropriate for the power brushless motors used in office automation equipment. It includes a speed control circuit, an FG amplifier, and other peripheral circuits and allows a drive circuit to be implemented with a single IC. It allows the number of external components to be reduced by including a lock protection circuit, a kickback absorption diode for the lower output side, and other components on chip. unit: mm 3147B-DIP28H [LB1924] 0.4 R1.7 1 Functions 14 20.0 Breakdown voltage: 30 V, output current: 3.1 A Direct PWM drive output Speed discriminator + PLL speed control technique Crystal oscillator circuit Built-in FG and integrating amplifiers Forward/reverse switching circuit Speed lock detection output On-chip lower output side kickback absorption diode Full complement of built-in protection circuits, including lock protection, current limiter, and thermal protection circuits 4.0 27.0 4.0 • • • • • • • • • 15 12.7 11.2 8.4 28 1.93 1.78 0.6 1.0 SANYO: DIP28H Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 73099TH (OT)/83097HA(OT) No. 5687-1/11 LB1924 Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Output current Allowable power dissipation Symbol Conditions Ratings VCC max Unit 30 V V VM max VCC ≥ VM 30 IO max t ≤ 500 ms 3.1 A 3 W Pd max1 Independent IC Pd max2 With an arbitrarily large heat sink 20 W Operating temperature Topr –20 to +80 °C Storage temperature Tstg –55 to +150 °C Allowable Operating Conditions at Ta = 25°C Parameter Supply voltage range Regulated voltage output current Lock detection output current Symbol Conditions Ratings Unit 9.5 to 28 VCC VCC ≥ VM V 9 to 28 V IREG 0 to –20 mA ILD 0 to 15 mA VM Electrical Characteristics at Ta = 25°C, VCC = VM = 24 V Parameter Current drain Output saturated voltage Output leakage current Symbol Conditions Ratings min typ ICC1 max Unit 31 40 mA When stopped 5.5 8.0 mA VO sat1 IO = 1A, VO (Sink) + VO (Source) 2.0 2.5 V VO sat2 IO = 2A, VO (Sink) + VO (Source) 2.6 3.2 V 100 µA ICC2 IO leak [5-V Regulated Voltage Output] Output voltage VREG 5.00 5.35 V Line regulation ∆VREG1 IO = –5 mA VCC = 9.5 to 28 V 4.65 30 100 mV Load regulation ∆VREG2 IO = –5 to –20 mA 20 100 mV [Hall Amplifier] Input bias current Common-mode input voltage range IHB –4 VICM 1.5 Hall input sensitivity –1 µA VREG–1.5 60 V mVp-p Hysteresis ∆VIN Input voltage (low to high) VSLH 7 mV Input voltage (high to low) VSHL –7 mV 8 14 24 mV [RC Oscillator] Output high-level voltage VOH(CR) 2.4 2.7 3.0 Output low-level voltage VOL(CR) 1.1 1.4 1.7 R = 22 kΩ, C = 4700 pF 19 V V kHz Oscillator frequency f (CR) Amplitude V (CR) 1.0 1.25 1.5 Vp-p Output high-level voltage VOH(RK) 2.5 2.8 3.1 V Output low-level voltage VOL(RK) 0.5 0.8 1.1 V ICHG1 –10 –8 –6 µA 8 10 µA [CROCK Oscillator] External capacitor charging current ICHG2 6 C = 0.047 µF 44 Hz Oscillator frequency f (RK) Amplitude V(RK) 1.75 1.95 2.25 V VCC-VM 0.45 0.5 0.55 V 150 180 °C 40 °C [Current Limiter Operation] Limiter [Thermal Shutdown Operation] Thermal shutdown temperature Hysteresis TSD Design target value (junction temperature) ∆TSD Design target value (junction temperature) Continued on next page. No. 5687-2/11 LB1924 Continued from preceding page. Parameter Symbol Conditions Ratings min typ Unit max [FG Amplifier] Input offset voltage Input bias current VIO(FG) –10 +10 mV IB(FG) –1 +1 µA Output high-level voltage VOH(FG) IFGO = –0.2 mA Output low-level voltage VOL(FG) IFGO = 0.2 mA FG input sensitivity Gain times 100 Schmitt sensitivity for the next stage Design target value VREG–1.2 VREG–0.8 0.8 3 100 f (FG) = 2 kHz V mV 180 Operating frequency range Open loop gain V 1.2 45 51 VREG–1.0 VREG–0.7 250 mV 2 kHz dB [Speed Discriminator] Output high-level voltage VOH(D) IDO = –0.1 mA Output low-level voltage VOL(D) IDO = 0.1 mA 0.8 Number of counts V 1.1 V 512 [PLL Output] Output high-level voltage VOH(P) IPO = –0.1 mA Output low-level voltage VOL(P) IPO = 0.1 mA VOL(LD) ILD = 10 mA VREG–1.8 VREG–1.5 VREG–1.2 V 1.2 1.5 1.8 V 0.15 0.5 [Lock Detector] Output low-level voltage Lock range 6.25 V % [Integrator] Input bias current –0.4 IB(INT) Output high-level voltage VOH(INT) IINTO = –0.2 mA Output low-level voltage VOL(INT) IINTO = 0.2 mA Open-loop gain f (INT) = 1 kHz Gain-bandwidth product Design target value Reference voltage Design target value VREG–1.2 +0.4 VREG–0.8 0.8 45 51 –5% VREG/2 µA V 1.2 V dB 450 kHz 5% V 10 MHz [Crystal Oscillator] Operating frequency range 1 fOSC Low-level pin voltage VOSCL IOSC = –0.5 mA 1.7 V High-level pin current IOSCH VOSC = VOSCL +0.3 V 0.5 mA [Start/Stop Pin] High-level input voltage range VIH(S/S) 3.5 VREG V Low-level input voltage range VIL(S/S) 0 1.5 V Input open voltage VIO(S/S) VREG–0.5 VREG V Hysteresis ∆VIN High-level input current IIH(S/S) V(S/S) = VREG Low-level input current IIL(S/S) V(S/S) = 0 V 0.35 0.50 0.65 V –10 0 +10 µA –280 –210 µA [Forward/Reverse Pin] Output high-level voltage VIH(F/R) 3.5 VREG V Output low-level voltage VIL(F/R) 0 1.5 V Input open voltage VIO(F/R) VREG–0.5 VREG V Hysteresis ∆VIN Output high-level voltage IIH(F/R) V(F/R) = VREG Output low-level voltage IIL(F/R) V(F/R) = 0 V 0.35 0.50 0.65 V –10 0 +10 µA –280 –210 µA No. 5687-3/11 Allowable power dissipation, Pdmax – W LB1924 With an arbitrarily large heat sink Independent IC Ambient temperature, Ta – °C Pin Assignment Truth Table Source F/R = L Sink F/R=H IN 1 IN2 IN 3 IN 1 IN 2 IN 3 1 OUT2 → OUT1 H L H L H L 2 OUT3 → OUT1 H L L L H H 3 OUT3 → OUT2 H H L L L H 4 OUT1 → OUT2 L H L H L H 5 OUT1 → OUT3 L H H H L L 6 OUT2 → OUT3 L L H H H L No. 5687-4/11 LB1924 Equivalent Circuit Block Diagram No. 5687-5/11 LB1924 Functional Description 1. Speed control circuit This IC uses a speed discriminator circuit and a PLL circuit in combination for speed control. The speed control circuit outputs an error signal once every two FG periods (a charge pump technique). The PLL circuit outputs a phase error signal once every FG period (also a charge pump technique). As compared with the earlier speed control technique of using only a speed discriminator, the combined speed discriminator/PLL circuit technique is better able to suppress speed fluctuations when used with motors with large load variations. The FG servo frequency is determined by the following equation, which means that the motor speed is determined by the number of FG pulses and the crystal oscillator frequency. fFG(servo) = fOSC/8192 fOSC: Crystal oscillator frequency 2. Output drive circuit This IC adopts a direct PWM drive technique to minimize the power loss in the output. The output transistor is always saturated when on, and the motor drive power is adjusted by varying the duty with which the output is on. Since the lower side output transistor is used for output switching, a Schottky diode or similar device must be connected between OUT and VCC. (This is because a through current will flow at the instant the lower side transistor turns on unless a diode with a short reverse recovery time is used.) The diode between OUT and ground is included on chip in this device. If this becomes a problem for large output currents, (e.g. if the output waveform is disturbed during lower side kickback) attach an external rectifying (or Schottky) diode. 3. Current limiter The current limiter circuit limits the output to a current determined by the equation I = VRF/Rf, where VRF = 0.5 V (typical) and Rf is the current detection resistor. The current limiting operation consists of reducing the output on duty to lower the current. 4. Reference clock Either of the two following input methods can be used for the speed control clock • Using a crystal oscillator element — When using a crystal oscillator element, connect the crystal, capacitors, and resistors as shown in the figure below to form an oscillator circuit. Sample External Circuit Constants (Reference values) Oscillator frequency (MHz) C1 (µF) C2 (µF) C3 (µF) R1 (Ω) R2 (Ω) 1 to 3 0.1 47 220 220 K — 3 to 5 0.1 18 100 100 K — 5 to 7 0.1 — 47 47 K — 7 to 10 0.1 — 33 10 K 4.7 K VREG C1, R1: C3: C2: R2: Oscillator stabilization Oscillator coupling Overtone prevention Oscillator operating margin improvement This circuit and these circuit constant values are provided for reference only. Always verify application circuits with the supplier of the oscillator element to assure that the effects of the characteristics of the oscillator element itself, the printed circuit board wiring, floating capacitances, and other aspects are accounted for appropriately. (Notes on printed circuit board lines) Floating capacitances on the printed circuit board can easily affect crystal oscillator circuits, since these are highspeed circuits. The printed circuit board lines connecting these components should be kept as short and as narrow as possible and other measures to reduce floating capacitances should be considered as well. In this external circuit, the line between the oscillator element and C3 (C2) is particularly subject to floating capacitance problems and requires special care. No. 5687-6/11 LB1924 • External clock (A frequency equivalent to the crystal oscillator frequency: 1 to 10 MHz) — If a frequency equivalent to a crystal oscillator frequency is input from an external source, input that signal through a series resistor of about 13 kΩ to the XI pin. The XO pin should be left open. Input signal levels: Low-level voltage: 0 to 0.8 V High-level voltage: 2.5 to 5.0 V 5. Speed lock range The speed lock range is ±6.25% of the set speed. When the motor speed is in the lock range the LD pin will go low (open collector output). The IC controls the motor speed by changing the motor drive output on duty according to the speed error signal if the motor speed goes outside the lock range. 6. PWM frequency The PWM frequency is determined by the capacitor and resistor connected to the CR pin. fPWM ≈ 1/(0.5 × C × R) A PWM frequency in the range 15 to 25 kHz is desirable. If the PWM frequency is too low, the motor may resonate at the PWM frequency when locked resulting in noise, since that frequency will be in the audible range. If the PWM frequency is too high, the switching loss in the output transistor will increase. The value of the resistor must be over 5 kΩ. 7. Hall input signals The signals input as the Hall inputs must have amplitudes that exceed the hysteresis, which has a maximum value of 24 mV. Considering noise, inputs with amplitudes of at least 100 mV are desirable. Attach a noise rejection capacitor (around 0.001 to 0.01 µF) across the IN3 Hall input (pins 26 and 27). Since these pins are adjacent to the OUT1 output pin, noise in this input may cause disturbances in the output waveforms. 8. F/R switching The F/R pin can be used to change the direction of motor rotation. However the following points must be observed when designing applications that will change the motor direction while the motor is turning. • Application circuit must be designed to handle the through current that occurs when the direction is switched. However, increases in the VCC voltage during switching due to motor current flowing into the power supply system instantaneously, must not exceed the rated voltage (30 V) of the device. Increase the value of the capacitor between power supply and ground if this is a problem. • If the motor current after switching exceeds the current limiter upper limit, the lower side transistor will be turned off. However, the high side transistor will go to the short braking state, and a current determined by the motor reverse voltage and the coil resistance will flow in this transistor. Applications must be designed so that this current does not exceed the rated current, 3.1 A. In general, switching the direction with the F/R pin at high motor speeds is dangerous. 9. Lock protection circuit This IC includes a built-in lock protection circuit to protect the IC and the motor when the motor is locked. In the start state, if the LD output remains high for a fixed period (the unlocked state), the lower side transistor is turned off. The capacitance of the capacitor connected to the CROCK pin sets this time. A time of a few seconds can be set with a capacitance under 0.1 µF. Set time (seconds) ≈ 52 × C (µF) To release the lock protection state, the IC must be set to the stopped state or the power must be turned off and reapplied. The CROCK pin must be connected to ground if the lock protection circuit is not used. 10. Power supply stabilization The large currents drawn by this IC can adversely affect the power supply voltage. Therefore a capacitor with a sufficiently large value must be inserted between the VCC pin and ground. If a diode is inserted in the power supply line to protect against destruction due to accidentally connecting the power supply with the polarity reversed, the power supply line voltage will be even more easily affected and an even larger capacitor will be required. No. 5687-7/11 LB1924 Pin Functions Pin No. Pin 28 1 2 OUT1 OUT2 OUT3 Pin function 3 GND2 5 VM Output block power supply and output current detection. Connect a resistor (Rf) with a small resistance between this pin and VCC. The output current is limited to a current set according to the equation IOUT = VRF/Rf. 4 VCC Power supply (blocks other than the output block) 6 VREG Regulated power supply output (5-V output) Insert a capacitor (about 0.1 µF) between this pin and ground for regulation. 7 F/R Forward/reverse control Low: 0 to 1.5 V High: 3.5 to VREG The open state functions as a high-level input. Has a hysteresis of about 0.5 V. Low: Forward High or open: Reverse 8 S/S Start/stop control Low: 0 to 1.5 V High: 3.5 to VREG The open state functions as a high-level input. Has a hysteresis of about 0.5 V. Low: Start High or open: Stop Equivalent circuit Motor drive outputs Connect Schottky diodes between these outputs and VCC. Output block ground Continued on next page. No. 5687-8/11 LB1924 Continued from preceding page. Pin No. Pin 9 10 XO XI 11 INTOUT Pin function Equivalent circuit Crystal oscillator connection. The reference clock signal is generated by connecting a crystal oscillator element to these pins. If an external clock (with a frequency of a few MHz) is used, connect that signal to the XI pin through a series resistor of about 13 kΩ, and leave the XO pin open. Integrator amplifier output (speed control output) PWM comparator 12 INTIN Integrator amplifier input 13 POUT PLL circuit output Continued on next page. No. 5687-9/11 LB1924 Continued from preceding page. Pin No. Pin 14 DOUT 15 LD 16 FGOUT Pin function Equivalent circuit Speed discriminator output. High: Acceleration Low: Deceleration Speed lock detection output Outputs a low level when the motor speed is in the lock range (±6.25%). FG amplifier output FG Schmitt comparator 17 FGIN– FG amplifier input FG reset circuit 18 FGIN+ FG amplifier input (bias input). The logic block initial reset is applied by connecting a capacitor (of about 0.1 µF) between FGIN+ and ground. 19 CROCK Setting for the lock protection circuit operating time. An operating time of about 2.5 seconds can be set by connecting a capacitor of about 0.047 µF between the CROCK pin and ground. Continued on next page. No. 5687-10/11 LB1924 Continued from preceding page. Pin No. Pin 20 CR Pin function 21 GND1 22 23 24 25 26 27 IN1+ IN1– IN2+ IN2– IN3+ IN3– Equivalent circuit PWM oscillator frequency setting. Connect a resistor (R) between this pin and V REG and a capacitor (C) between this pin and ground. Values of R = 22 kΩ, and C = 4700 pF set a frequency of about 19 kHz. Ground (blocks other than the output block) Hall inputs An input with IN+ > IN– is taken to be a high level, and the opposite state is taken to be a low level. Hall signals with amplitudes greater that 100 mVp-p (differential) are desirable. If noise on the Hall signals is a problem, connect capacitors between the IN+ and IN– pins. Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of July, 1999. Specifications and information herein are subject to change without notice. PS No. 5687-11/11