SANYO LB1987H

Ordering number : ENN6109A
Monolithic Digital IC
LB1987, 1987D, 1987M, 1987H
Three-Phase Brushless Motor Driver
for VCR Capstan Motors
Overview
3147B-DIP28H
[LB1987D]
The LB1987, LB1987D, LB1987M, and LB1987H are
optimal capstan motor drivers for use in VCR sets.
0.4
R1.7
1
14
20.0
4.0
27.0
4.0
• Three-phase full-wave current-linear drive
• Torque ripple correction circuit (fixed correction ratio)
• Current limiter circuit with control characteristics gain
switching
• Oversaturation prevention circuits for both the upper and
lower sides of the output stage (No external capacitors
are required.)
• FG amplifier
• Thermal shutdown circuit
15
12.7
11.2
8.4
Functions
28
1.93
1.78
0.6
1.0
SANYO: DIP28H
3129-MFP36S-LF
[LB1987M]
19
36
7.9
unit: mm
9.2
10.5
Package Dimensions
[LB1987]
1
18
0.25
15.3
4.8
0.8
1.0
0.2
18
0.4
1.0
23
24
0.8
0.85
0.1
1.6
1.6
2.25
2.5max
13.2
10.0
0.65
3240-QFP34H-B
SANYO: MFP36S-LF
3233-HSOP28H
0.35
8.4
13.2
10.0
0.8
17
[LB1987H]
7
1
15.3
6.2
2.7
6
15
10.5
4.9
SANYO: QFP34H-B
7.9
4.0
0.1
1.0
2.2
28
0.65
34
1
14
0.25
0.3
1.3
0.8
2.5max
2.25
0.85
0.1
SANYO: HSOP28H
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
81299RM (OT) No. 6109-1/17
LB1987, 1987D, 1987M, 1987H
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Maximum supply voltage
Conditions
Ratings
7
V
VS max
24
V
IO max
Maximum output current
1.3
A
0.77
W
(LB1987D)
3.0
W
(LB1987M)
0.95
W
(LB1987H)
0.77
W
(LB1987)
Allowable power dissipation
Unit
VCC max
Pd max
Operating temperature
Topr
–20 to +75
°C
Storage temperature
Tstg
–55 to +150
°C
Ratings
Unit
Allowable Operating Ranges at Ta = 25°C
Parameter
Symbol
Conditions
5 to 22
VS
Supply voltage
Hall input amplitude
VHALL
GSENSE pin input range
VGSENSE
V
4.5 to 5.5
VCC
Between Hall inputs
V
±30 to ±80
Relative to the control system ground
mVo-p
–0.20 to +0.20
V
Electrical Characteristics at Ta = 25°C, VCC = 5 V, VS = 15 V
Parameter
VCC current drain
Symbol
Conditions
Ratings
min
typ
max
Unit
RL = ∞, VCTL = 0 V (Quiescent)
12
18
mA
Vosat1
IO = 500 mA, Rf = 0.5 Ω, Sink + Source,
VCTL = VLIM = 5 V (With saturation prevention)
2.1
2.6
V
Vosat2
IO = 1.0 A, Rf = 0.5 Ω, Sink + Source,
VCTL = VLIM = 5 V (With saturation prevention)
2.6
3.5
V
1.0
mA
ICC
[Outputs]
Output saturation voltage
Output leakage current
IOleak
[FR]
FR pin input threshold voltage
FR pin input bias current
VFSR
2.25
Ib(FSR)
–5.0
2.50
2.75
V
µA
[Control]
VCREF
2.37
CTLREF pin input range
VCREFIN
1.70
CTL pin input bias current
Ib(CTL)
CTLREF pin voltage
CTL pin control start voltage
VCTL(ST)
CTL pin control switching voltage
2.50
VCTL = 5 V, CTLREF: open
Rf = 0.5 Ω, VLIM = 5 V, IO ≥ 10 mA
With the Hall input logic states fixed at (U, V, W = H, H, L)
2.63
V
3.50
V
8.0
µA
2.20
2.35
2.50
V
VCTL(ST2) Rf = 0.5 Ω, VLIM = 5 V
3.00
3.15
3.30
V
CTL pin control Gm1
Rf = 0.5 Ω, ∆IO = 200 mA
Gm1(CTL)
With the Hall input logic states fixed at (U, V, W = H, H, L)
0.52
0.65
0.78
A/V
CTL pin control Gm2
Gm2(CTL)
Rf = 0.5 Ω, ∆VCTL = 200 mV
With the Hall input logic states fixed at (U, V, W = H, H, L)
1.20
1.50
1.80
A/V
Voff(LIM)
Rf = 0.5 Ω, VCTL = 5 V, IO ≥ 10 mA
With the Hall input logic states fixed at (U, V, W = H, H, L)
140
200
260
mV
VCTL = 5 V, VCREF: open, VLIM = 0 V
–2.5
Rf = 0.5 Ω, VCTL = 5 V, VLIM = 2.06 V
With the Hall input logic states fixed at (U, V, W = H, H, L)
830
[Current Limiter]
LIM current limiter offset voltage
LIM pin input bias current
LIM pin current limit level
Ib(LIM)
ILIM
µA
900
970
mA
+6
mV
1.0
3.0
µA
3.3
V
[Hall Amplifiers]
Input offset voltage
Input bias current
Common-mode input voltage
Torque ripple correction ratio
Voff(HALL)
–6
Ib(HALL)
Vcm(HALL)
TRC
1.3
At the bottom and top of the Rf waveform
when IO = 200 mA. (Rf = 0.5 Ω) (Note 1)
9
%
[FG Amplifier]
FG amplifier input offset voltage
FG amplifier input bias current
Voff(FG)
Ib(FG)
–8
FG amplifier output saturation voltage Vosat(FG) At the sink side internal pull-up resistor.
FG amplifier common-mode input voltage
VCM(FG)
+8
–100
0.5
mV
nA
0.5
V
4.0
V
Continued on next page.
No. 6109-2/17
LB1987, 1987D, 1987M, 1987H
Continued from preceding page.
Parameter
Ratings
Symbol
Conditions
Vosat(DET)
IO = 10 mA, Rf = 0.5 Ω,
VCTL = LVIM = 5 V, The voltage between each OUT and Rf.
min
typ
max
Unit
[Saturation Prevention]
Saturation prevention circuit
lower side voltage setting
0.175
0.25
0.325
V
47
50
53
%
0.2
V
60
mV
[Schmitt Amplifier]
Duty ratio
DUTY
Under the specified conditions
Upper side output saturation voltage Vsatu(SH)
4.8
V
Lower side output saturation voltage Vsatd(SH)
Hysteresis
Vhys
Thermal shutdown operating
temperature
T-TSD
32
50
170
*
°C
Note: * Items marked with an asterisk are design target values and are not measured.
Note: 1. The torque ripple correction ratio is determined from the Rf voltage waveform as shown below.
Vp
Vb
1
2
3
4
5
6
Hall Logic Settings
GND level
2 · (Vp – Vb)
Correction ratio = ——————— 100 · (%)
Vp + Vb
A12204
Truth Table and Control Functions
Source → sink
1
2
3
4
5
6
V→W
W→V
U→W
W→U
U→V
V→U
W→V
V→W
W→U
U→W
V→U
U→V
Hall input
U
V
W
H
H
L
H
L
L
H
L
H
L
L
H
L
L
H
H
H
L
FR
H
L
H
L
Note: 1. The “H” state for FR means a voltage of 2.75 V or higher, and the “L”
state means a voltage of 2.25 V or lower. (When VCC = 5 V.)
2. For the Hall inputs, the input “H” state means the state in which the
(+) input for that phase is at least 0.01 V higher than the (–) input for
that phase. Similarly, the “L” state means the state in which the (+)
input for that phase is at least 0.01 V lower than the (–) input for that
phase.
H
L
H
3. Since this drive technique is a 180° power application technique, the
phase that is neither the source phase nor the sink phase does not
turn completely off.
L
H
L
H
L
No. 6109-3/17
LB1987, 1987D, 1987M, 1987H
Control and Current Limiting Functions
Control characteristics
Current limiting characteristics
VVCTL = =
5V
CTL 5 V
CTLREF:
CTLREF:open
OPEN
IOUT
IOUT
VVLIM = =
5V
LIM 5 V
CTLREF:
CTLREF:open
OPEN
Gm2
typ
Gm2 == 1.50
1.50A/V
A/Vtyp
Slope = 0.50 A/V typ
Gm1
typp
Gm1==0.65
0.65A/V
A/Vty
0
1
2
3
4
5
VCTL
2.35
typ 3.15
typ
2.35 V
Vtyp
3.15 V
Vtyp
0
1
3
2
4
5
VLIM
200
typ
200 mV
mVtyp
Pin Functions
Pin
UIN+
UIN–
Function
Equivalent circuit diagram
U phase Hall element input.
Logic H refers to the state where IN+ > IN–
(+) inputs
VIN+
VIN–
V phase Hall element input.
Logic H refers to the state where IN+ > IN–
WIN+
WIN–
W phase Hall element input.
Logic H refers to the state where IN+ > IN–
UOUT
VOUT
WOUT
U phase output.
V phase output.
W phase output.
VS
(–) inputs
200 Ω
200 Ω
100 µA
A12207
Vs
(These pins include internal spark killer diodes.)
VCC
OUT for
each phase
Output block power supply.
200 Ω
CC
30 kΩ
Output current detection.
Current feedback is applied to the control block by inserting the resistor Rf
between these pins and ground. Also, both the lower side saturation
Rf(POWER) prevention circuit and the torque ripple correction circuit operate according to
Rf(SENSE) the voltage on this pin. In particular, since this voltage sets the
oversaturation prevention level, the lower side oversaturation prevention
operation can be degraded if the value of this resistor is set too low.
Note that the PWR pin and the SENSE pin must be connected together.
150 µA
Lower side oversaturation
prevention circuit input
block
V
10 µA
200 kΩ
Rf(SENSE)
Rf(POWER)
A12208
LIM
Current limiter function control.
The output current can be modified linearly by the voltage on this pin.
Slope = 0.5 A/V typ at Rf = 0.5 Ω
VCC
VCC
VCC
5 kΩ
CTL
Speed control.
This circuit implements constant current drive based on current feedback
from the Rf pin.
Gm = 0.58 A/V typ at Rf = 0.5 Ω
CTL
200 µA
max
CTLREF
200 Ω
5 kΩ
200 Ω
LIM
200 Ω
100 µA
CTLREF
(LB1987/D)
A12209
Continued on next page.
No. 6109-4/17
LB1987, 1987D, 1987M, 1987H
Continued from preceding page.
FGIN–
Input used when the FG amplifier inverting input is used. Connect a
feedback resistor between the FGOUT pin and this pin.
FGIN+
Non-inverting input used when the FG amplifier is used as a differential input
amplifier.
No bias is applied internally.
VCC
VCC
VCC
20 µA
200 µA
FR
ADJ
200 Ω
1/2
VCC
10 kΩ
External torque ripple correction ratio adjustment.
To adjust the correction ratio, apply the stipulated voltage to the ADJ pin
from a low-impedance external circuit.
If the applied voltage is increased, the correction ratio falls, and if the applied
voltage is lowered, the correction ratio increases.
The range of variation is from 0 to two times the correction ratio when the pin
is left open.
(This pin is set to about VCC/2 internally, and has an input impedance of
about 5 kΩ.)
VCC
500 Ω
6 kΩ
6 kΩ
10 kΩ
ADJ
Equivalent circuit diagram
10 kΩ
FR
Function
Forward/reverse selection.
The direction (forward or reverse) is selected by the voltage applied to this
pin.
(Vth = 2.5 Vtyp at VCC = 5 V)
10 kΩ
Pin
A12210
5 µA
FGin(–)
FGin(+)
300 Ω
300 Ω
A12211
FC
10 kΩ
2 kΩ
FG amplifier output.
This pin includes an internal load resistor.
VCC
VCC
100 Ω
FGOUT
10 kΩ
VCC
FGOUT
300 Ω
FC
Speed control loop frequency characteristics correction.
A12212
Ground for all systems other than the output transistors.
Note that the lowest potential of the output transistors is determined by the
Rf pin.
FGS
FG pulse output.
This pin includes an internal load resistor.
(The output impedance is about 3 kΩ.)
VCC
Power supply for all IC internal circuits other than the output block.
This power supply must be stabilized to prevent ripple or other noise from
entering the circuit.
GSENSE
Ground sensing.
The influence of the common ground impedance on Rf can be excluded by
connecting this pin to ground near the Rf resistor side of the motor ground
wiring that includes Rf.
(This pin must not be left open.)
10 kΩ
VCC
VCC VCC
5 kΩ
GND
FGS
13.2 kΩ
A12517
GSENSE
A12518
No. 6109-5/17
LB1987, 1987D, 1987M, 1987H
GND
Vs
FRAME
FRAME
VCC
WIN–
Pin Assignment
23
22
21
20
19
18
RF(PWR) 24
17 WIN+
25
16 VIN–
26
15 VIN+
UOUT 27
14 UIN–
28
13 UIN+
VOUT 29
12 FC
LB1987
30
11 LIM
WOUT 31
10 CTLREF
GSENSE 34
7
FGOUT
1
2
3
4
5
6
FGIN+
FGS
FGIN–
8
FRAME
RF(SENSE) 33
FRAME
CTL
GND
9
FR
32
Top view
A12217
Note: The FRAME pins must be connected to ground for ground potential stabilization.
Allowable power dissipation, Pdmax — W
Pd max — Ta
1.0
0.8
0.77 W
0.6
0.46 W
0.4
0.2
0
–20
0
20
40
60
80
100
Ambient temperature, Ta — °C
No. 6109-6/17
LB1987, 1987D, 1987M, 1987H
GSENSE
RF(SENSE)
WOUT
VOUT
UOUT
26
25
24
23
22
21
VS
FR
27
GND
GND
28
RF(PWR)
FGIN–
Pin Assignment
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
FGIN+
FGOUT
FGS
CTL
CTLREF
LIM
FC
UIN+
UIN–
VIN+
VIN–
WIN+
WIN–
VCC
LB1987D
Top view
A12214
Pd max — Ta
Allowable power dissipation, Pdmax — W
3.5
3.0 W
3.0
2.5
2.0
1.8 W
1.5
1.0
0.5
0
–20
0
20
40
60
80
100
Ambient temperature, Ta — °C
No. 6109-7/17
LB1987, 1987D, 1987M, 1987H
FRAME
FRAME
GND
FR
GSENSE
RF(SENSE)
NC
NC
WOUT
VOUT
UOUT
NC
NC
RF(PWR)
GND
VS
FRAME
FRAME
Pin Assignment
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
FRAME
FRAME
FGIN–
FGIN+
FGOUT
FGS
CTL
LIM
FC
UIN+
UIN–
VIN+
VIN–
WIN+
WIN–
VCC
FRAME
FRAME
LB1987M
Top view
A12216
Note: Although the FRAME pins and the GND pin are not connected internally in the IC, the FRAME pins must be connected to the GND pin externally for
ground potential stabilization.
Pd max — Ta
Allowable power dissipation, Pdmax — W
1.2
0.95 W
1.0
0.8
0.6
0.57 W
0.4
0.2
0
–20
0
20
40
60
80
100
Ambient temperature, Ta — °C
No. 6109-8/17
LB1987, 1987D, 1987M, 1987H
VIN–
VIN+
UIN–
UIN+
21
20
19
18
17
16
15
8
9
10
11
12
13
14
FGS
CTL
LIM
FC
22
WIN+
VS
23
FGOUT
GND
24
WIN–
RF(PWR)
25
FGIN+
NC
26
VCC
NC
27
FGIN–
UOUT
28
FRAME GND
VOUT
Pin Assignment
2
3
4
5
6
7
NC
NC
RF(SENSE)
GSENSE
FR
GND
FRAME GND
1
WOUT
LB1987H
Top view
A12215
Pd max — Ta
Allowable power dissipation, Pdmax — W
1.0
0.8
0.77 W
0.46 W
0.6
0.4
0.2
0
–20
0
20
40
60
80
100
Ambient temperature, Ta — °C
No. 6109-9/17
–
WIN+
WIN–
VCC
LIM
CTL
CTLREF
Control
amplifier 1
+
Reference
voltage
TSD
+
Differential
distribution and
torque ripple
correction block
LIMREF
Control
amplifier 2
Forward/
reverse
selection
Bandgap 1.2 V
+
FR
–
VIN–
–
+
VIN+
+
–
UIN–
–
+
–
+
UIN+
Feedback
amplifier
RF(SENSE)
+
–
+
Drive distribution circuit
and lower side
saturation prevention
control
Upper side saturation
prevention control
FGIN+ FGIN–
FGOUT
+
–
Schmitt amplifier
FG amplifier
–
–
+
Hall input synthesis block (Linear matrix)
+
Synthesized output logarithmic compression
+
Inverse logarithmic conversion
and differential distribution
–
+
FC
FGS
5 kΩ
A12213
RF(PWR)
WOUT
VOUT
UOUT
VS
LB1987, 1987D, 1987M, 1987H
Block Diagram
No. 6109-10/17
L
R
L
Bias of VCC/2
Hall output
0.1 µF
L
Hall output
8
9
FG output
0.1 µF
Hall input
10 11 12 13 14 15 16 17
18
6
7
19
5
39 kΩ
39
kΩ
20
Torque command voltage
applied pin
A12218
CTLREF voltage applied pin
Current limiter setting voltage
applied pin
VCC
Vs
22
21
Ground
Power system ground
23
0.5 Ω
4
3
2
1
0.1 µF
0.1 µF
34 33 32 31 30 29 28 27 26 25 24
LB1987
Note: The component values shown in this application circuit example are merely provided as examples, and circuit operating characteristics are not guaranteed.
MR
The Hall bias resistor R must
be selected according to the
sensor output.
Hall output
We recommend the
use of GaAs devices
as Hall element.
0.1 µF
Forward/reverse command
applied pin
LB1987, 1987D, 1987M, 1987H
Sample Application Circuit (LB1987)
No. 6109-11/17
R
L
Hall output
39 kΩ
39
kΩ
R
0.5 Ω
2
FG output
1
3
4
5
6
7
9
0.1 µF
8
LB1987D
Hall input
10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
Note: The component values shown in this application circuit example are merely provided as examples, and circuit operating characteristics are not guaranteed.
Bias of VCC/2
L
L
Hall output
0.1 µF
0.1 µF
0.1 µF
A122219
Torque command voltage
applied pin
CTLREF voltage applied pin
Current limiter setting voltage
applied pin
VCC
Vs
Ground
Power system ground
Sample Application Circuit (LB1987D)
MR
The Hall bias resistor R must
be selected according to the
sensor output.
Hall output
We recommend the
use of GaAs devices
as Hall element.
0.1 µF
Forward/reverse
command applied pin
LB1987, 1987D, 1987M, 1987H
No. 6109-12/17
VCC
Hall output
22
GND
23
RF(PWR)
24
NC
25
NC
26
UOUT
27
VOUT
28
WOUT
29
NC
30
NC
31
RF(SENSE)
32
GSENSE
33
FR
34
GND
35
FRAME
FRAME
2
FRAME
FRAME
1
LIM
CTL
FGS
FGOUT
FGIN+
FGIN–
Bias of VCC/2
FG pulse output
FC
39
39 kΩ
kΩ
UIN+
10
11
13
Hall input
12
14
15
UIN–
9
VIN+
8
VIN–
7
WIN+
6
WIN–
5
16
VCC
4
17
18
FRAME
3
LB1987M
19
20
21
VS
36
0.1 µF
0.1 µF
FRAME
FRAME
0.1 µF
R
L
0.1 µF
FRAME
MR
VCC
L
L
Hall
output
Vs
A12220
Torque command voltage
applied pin
Current limiter setting voltage
applied pin
Supply voltage
Ground
Power system ground
Forward/reverse
command applied pin
Sample Application Circuit (LB1987M)
MR pin
Hall output
We recommend the
use of GaAs devices
as Hall element.
LB1987, 1987D, 1987M, 1987H
No. 6109-13/17
VCC
Hall
output
L
We recommend the
use of GaAs devices
as Hall element.
L
R
L
Hall output
Hall
output
NC
RF
NC
NC
UOUT
NC
2
VOUT
WOUT
1
FRAME
GND
GND
FR
Bias of VCC/2
3939
kΩkΩ
FG pulse output
0.1 µF
A12221
Forward/reverse
command applied pin
Torque command voltage
applied pin
Current limiter setting voltage
applied pin
VCC
Vs
Power system ground
Sample Application Circuit (LB1987H)
MR
FGIN–
0.1 µF
21
VCC
14
FGIN+
13
20
WIN–
12
FGOUT
11
19
WIN+
10
FGS
9
18
VIN–
8
CTL
7
17
VIN+
6
GND
LB1987H
15
16
LIM
VCC
GSENSE
25
UIN–
5
24
RF
26
FC
4
23
GND
27
Hall input
UIN+
3
22
VS
28
0.1 µF
0.1 µF
0.1 µF
0.5 Ω
LB1987, 1987D, 1987M, 1987H
FRAME
No. 6109-14/17
Sh
Sj
1
FRAME
FRAME
2
FRAME
FRAME
1
4
34
GND
35
3
33
FR
FGIN–
VFG2
FGIN+
VFG1
5
FGOUT
4
6
7
FGS
3
CTL
2
32
GSENSE
8
LIM
Sn
31
RF(SENSE)
9
FC
Vm1
30
NC
1
Sa
Sc
Sb
1 2
2 1 2
2
Sd
13
Sf
2
Se
15
1 2 1
14
10
12
11
UIN+
0.1 µF
29
NC
UIN–
Im2 A
0.5 Ω
V
28
WOUT
36
1
27
VOUT
VIN+
0.1 µF
0.1 µF
26
UOUT
LB1987/D/M/H
25
NC
VIN–
Sm
2
Sg
19
20
21
22
23
24
NC
WIN+
3
1
3
2
V
RF(PWR)
WIN–
Sk
1A
10
10 mA
0.5
0.5 A
A
1
V Vm2
Vm3
Sq
GND
16
VCC
17
18
So
A
A
A
VCTL
VLIM
VFR
Vs
15 V
A
Switch states:
O: Closed
X: Open
A12222
VCC
5V
Unless specified
otherwise:
VCT = 5 V
VS = 15 V
VFR = 5 V, VLIM = 5 V
VCTR = 5 V
VCREF = 2.5 V
VFG1 = VFG = 2.5 V
2.4
2.4 kΩ
kΩ
VS
FRAME
200
200 kΩ
kΩ
FRAME
FRAME
2.4
2.4 kΩ
kΩ
FRAME
0.1 µF
4Ω
4Ω
4Ω
Im 5
LB1987, 1987D, 1987M, 1987H
Test Circuit 1
No. 6109-15/17
V
4Ω
Vm5
4Ω
V
V
V
Vm2
Vm1
V
V
Sk
FRAME
FRAME
FRAME
FRAME
2
100 kΩ
11 kΩ
kΩ
1 MΩ
–
Vm8
LA6358
±15 V
FGIN–
kΩ
10 kΩ
FGIN+
Si
V
2
2
1
Vm9
Sa
1
VCTL
8
2
3
9
1
2
3
10
Sb
11
UIN+
1
FGOUT
7
UIN–
Sf
FGS
6
CTL
5
LIM
4
FC
3
1
Sc
2
12
VIN+
f = 1 kHz
GND
2
+
FR
3
1
Sd
13
2
14
1
Se
15
3
16
VIN–
–20 dB 0.1 µF
GSENSE
1
2
31
RF(SENSE)
32
1
30
NC
2
29
NC
33
3
28
WOUT
34
V
27
VOUT
WIN+
V
26
UOUT
WIN–
Sh
25
NC
35
Sm
1
24
NC
LB1987/1987D/1987M/1987H
19
20
21
22
23
RF(PWR)
36
0.1 µF
0.1 µF
0.1 µF
GND
VCC
VFGIN
S1
W
V
U
VS
Sf
17
3
18
FRAME
Vp-p
Vp-p == 1.0
1.0VV
f I==11kHZ
kHz
Vm6
Vm4
FRAME
FRAME
13 kΩ
FRAME
0.1 µF
4Ω
Sg
A
Im1
0.5 Ω
VH3
VH2
Switch states:
O: Closed
X: Open
A12223
VH1
Unless specified
otherwise:
VCC = 5 V
VS = 15 V
VCTL = 0 V
VH1 = 2.6 V
VH2 = 2.4 V
VH3 = 2.6 V
VFGF = 2.5 V
VFGIN = 2.5 V
VCC 5 V
VS 15 V
V Vm7
LB1987, 1987D, 1987M, 1987H
Test Circuit 2
No. 6109-16/17
LB1987, 1987D, 1987M, 1987H
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of August, 1999. Specifications and information herein are subject to
change without notice.
PS No. 6109-17/17