Ordering number : ENN6866A CMOS IC LC75421M Electronic Volume Controller for Cars Overview Features The LC75421M is an electronic volume controller that enables control of volume, balance, fader, bass/treble + super bass, input switching, and input and output level control functions using only a small number of external components. • On-chip buffer amplifier cuts down number of external components • Low switching noise generated by on-chip switch due to use of silicon gate CMOS process • On-chip reference voltage circuit for analog ground • Controls performed with serial input (CCB) Package Dimensions unit: mm 3263-MFP36SDJ (375 mil) 15.2 [LC75421M] 0.65 7.9 19 10.5 36 1 0.8 0.3 18 0.25 (0.8) 2.45max • Volume: 0 dB to –79 dB in 1-dB steps, and –∞ (81 positions) Balance function with separate L/R control • Fader: rear output or front output can be attenuated across 16 positions (in 2-dB steps from 0 dB to 20 dB, 5-dB steps from –20 dB to –25 dB, 10-dB steps from –25 dB to –45 dB, and –60 dB, –∞) • Bass/treble: A tone control circuit can be configured using an external RC, with 15-position control from 0 dB to ±11.9 dB in 1.7-dB steps possible for both bass and treble • Input gain: 0 dB to +18.75 dB (1.25-dB steps) amplification is possible for the input signal. • Output gain: Fader output can be selected among 0 dB, +6.5 dB, and +8.5 dB. • Input switching: Five input signals can be selected for Left and for Right • Super bass: Step control with 11 positions is possible, with peaking characteristics (type T) 0.1 (2.25) Functions SANYO: MFP36SDJ (375 mil) • CCB is a trademark of SANYO ELECTRIC CO., LTD. • CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO. Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 90503TN (OT) / 20901RM (OT) No. 6866-1/24 LC75421M Pin Assignment DI 1 36 CL CE 2 35 VDD VSS 3 34 RROUT LROUT 4 33 RFOUT LFOUT 5 32 RFIN LFIN 6 31 ROUT LOUT 7 30 RSB LSB 8 29 RBASS2 LBASS2 9 28 RBASS1 LBASS1 10 LTRE 11 LIN 12 LC75421M 27 RTRE 26 RIN 25 RSELO LSELO 13 24 R5 L5 14 23 R4 L4 15 22 R3 L3 16 21 R2 L2 17 20 R1 L1 18 19 Vref Top view No. 6866-2/24 LC75421M 36 35 4 34 LROUT RROUT 5 33 RFOUT LFIN 32 1 µF ROUT 0.15 µF 0.15 µF LSB 7 31 CCB interface 3.7 kΩ RFIN 6 8 RSB RBASS2 9 29 0.082 µF 0.082 µF 0.082 µF 7.68 kΩ 0.082 µF 10 RBASS1 RVref Control circuit Control circuit Control circuit LVref 11 RTRE 12 26 RIN 13 25 LSELO 1 µF RSELO R5 24 1 µF R4 23 1 µF R3 22 1 µF R2 21 1 µF R1 20 1 µF 22 µF 1 µF 19 Vref 18 L1 17 L2 L3 16 1 µF 1 µF L4 15 1 µF 14 L5 1 µF 1500 pF 27 LTRE LIN 7.68 kΩ 28 LBASS1 1500 pF 0.15 µF 0.15 µF 3.7 kΩ 30 LBASS2 1 µF [TREBLE f0 10 kHz] [BASS f0 100 Hz] [S-BASS f0 68 Hz] LFOUT 1 µF LOUT PA PA VDD CL 1 2.2 µF 2 2.2 µF 3 DI CE VSS PA 2.2 µF 2.2 µF PA µCOM Equivalent Circuit Block Diagram No. 6866-3/24 LC75421M Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Symbol Maximum supply voltage VDD max Maximum input voltage VIN max Allowable power dissipation Pdmax Conditions Ratings VDD Unit 11 CE, DI, CL V –0.3 to 11 Input pins other than CE, DI, CL V VSS – 0.3 to VDD + 0.3 Ta ≤ 85°C, when mounted on board 550 mW Operating temperature Topr –40 to +85 °C Storage temperature Tstg –50 to +125 °C Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V Parameter Symbol Pin Name Conditions Ratings min typ max Unit Supply voltage VDD VDD 7.5 10 V Input high-level voltage VIH CL, DI, CE 4.0 10 V Input low-level voltage VIL CL, DI, CE VSS 1.0 V VIN CL, DI, CE, LIN, RIN, L1 to L5, R1 to R5, LFIN, RFIN VSS VDD Vp-p tøW Input amplitude voltage Input pulse width CL 1 µs Setup time tsetup CL, DI, CE 1 µs Hold time thold CL, DI, CE 1 Operating frequency fopg CL µs 500 kHz Electrical Characteristics at Ta = 25°C, VDD = 8 V, VSS = 0 V Parameter Maximum input gain Step resolution Symbol Pin Name Conditions Ratings min typ max Unit Ginmax +18.75 dB Gstep +1.25 dB 50 kΩ Input resistance Rin L1, L2, L3, L4, L5 R1, R2, R3, R4, R5 Clipping level Vcl LSELO, RSELO Output load resistance RL LSELO, RSELO THD = 1.0%, f = 1 kHz 2.90 Vrms 10 kΩ Volume Block Parameter Input resistance Symbol Rin Pin Name Conditions Ratings min LIN, RIN typ max 50 Unit kΩ Fader Volume Block Parameter Symbol Pin Name Conditions Ratings min STEP = 0 dB to –20 dB Step resolution Step error Output load resistance Output impedance ATstep ATerr max 5 STEP = –25 dB to –45 dB 10 dB STEP = 0 dB to –45 dB –2 0 +2 STEP = –45 dB to –60 dB –3 0 +3 10 LFOUT, LROUT RFOUT, RROUT RL = 10 kΩ, f = 1 kHz VIN = 1 Vrms Unit 2 STEP = –20 dB to –25 dB RL RO typ dB kΩ 46 Ω No. 6866-4/24 LC75421M Bass Band Control Block Parameter Symbol Control range Gbass Step resolution Estep Internal feedback resistance Rfeed Pin Name Conditions MAX. Boost/Cut Ratings min typ Unit max ±10 ±11.9 ±14 1 1.7 3 45.084 dB dB kΩ Treble Band Control Block Parameter Control range Symbol Pin Name Gtre Step resolution Estep Internal feedback resistance Rfeed Conditions MAX. Boost/Cut Ratings min typ Unit max ±10 ±11.9 ±14 1 1.7 3 56.084 dB dB kΩ Super Bass Block (Type T) Parameter Control range Symbol Pin Name Crange Conditions Ratings min MAX. Boost typ max +20 Unit dB Step resolution Estep +2.0 dB Internal feedback resistance Rfeed 66.6 kΩ General Parameter Total harmonic distortion Crosstalk Maximum attenuated output Output noise voltage Symbol THD CT Conditions Ratings min VIN = 1 Vrms, f = 1 kHz, flat overall typ max 0.003 0.01 Unit % VIN = 1 Vrms, f = 1 kHz, flat overall, Rg = 1 kΩ 80.5 dB Vomin VIN = 1 Vrms, f = 1 kHz, main volume –∞ –80 dB VN-1 Fflat overall, (IHF-A), RG = 1 kΩ 8 µV VN-2 Flat overall, (DIN-AUDIO), RG = 1 kΩ Input high-level current IIH CL, DI, CE VIN = 8 V Input low-level current IIL CL, DI, CE VIN = 0 V 10 µV 10 –10 µA µA No. 6866-5/24 LC75421M Control Timing and Data Format To control the LC75421M, input specified serial data to the CE, CL, and DI pins. The data configuration consists of a total of 52 bits broken down into 8 address bits and 44 data bits. CE DI B0 B1 B2 B3 A0 A1 A2 A3 D0 D38 D39 D40 D41 D42 D43 D1 D2 D3 D4 D5 CL 1 µs 1 µs 1 µs min min min CE 1 µs min 1 µs min CL DI 1 µs ≤ TDEST B B B B A A A A 0 1 2 3 0 1 2 3 1 0 0 0 0 0 0 1 Address code D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Volume control Fader step control 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 –∞ dB –60 dB –45 dB –35 dB –25 dB –20 dB –18 dB –16 dB –14 dB –12 dB –10 dB –8 dB –6 dB –4 dB –2 dB 0 dB Bass control Boost 1 1 1 0 STEP15 0 1 1 0 STEP14 1 0 1 0 STEP13 0 0 1 0 STEP12 1 1 0 0 STEP11 0 1 0 0 STEP10 1 0 0 0 STEP9 0 0 0 0 STEP8 1 0 0 1 STEP7 0 1 0 1 STEP6 1 1 0 1 STEP5 0 0 1 1 STEP4 1 0 1 1 STEP3 0 1 1 1 STEP2 1 1 1 1 STEP1 Cut Treble control Boost 1 1 1 0 STEP15 Super bass control 0 1 1 0 STEP14 1 0 1 0 STEP13 0 0 0 0 STEP0(FLAT) 0 0 1 0 STEP12 1 0 0 0 STEP1 1 1 0 0 STEP11 0 1 0 0 STEP2 0 1 0 0 STEP10 1 1 0 0 STEP3 1 0 0 0 STEP9 0 0 1 0 STEP4 0 0 0 0 STEP8 1 0 1 0 STEP5 1 0 0 1 STEP7 0 1 1 0 STEP6 0 1 0 1 STEP6 1 1 1 0 STEP7 1 1 0 1 STEP5 0 0 0 1 STEP8 0 0 1 1 STEP4 1 0 0 1 STEP9 1 0 1 1 STEP3 0 1 0 1 STEP10(BOOST max) 0 1 1 1 STEP2 1 1 1 1 STEP1 Cut Fader rear/front control 0 Rear 1 Front Input switch control (1) Input mute switch control Input switch control (2) 0 OFF 1 ON TEST mode Input gain control 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 dB +1.25 dB +2.50 dB +3.75 dB +5.00 dB +6.25 dB +7.50 dB +8.75 dB +10.00 dB +11.25 dB +12.50 dB +13.75 dB +15.00 dB +16.25 dB +17.50 dB +18.75 dB Channel selection 0 1 0 1 0 0 1 1 Initial setting Lch Rch L/R simultaneous Output gain control 0 0 1 1 0 0 dB 1 0 dB 0 +6.5 dB 1 +8.5 dB Caution: Be sure to set D36 to D38 and D40 to D43 to “0” for the TEST bit of the IC. No. 6866-6/24 LC75421M Volume Control D16 D17 D18 D19 D20 D21 D22 D23 0 0 1 0 0 1 0 1 Operation 0dB 1 1 0 0 0 1 0 1 –1dB 0 1 0 0 0 1 0 1 –2dB 1 0 0 0 0 1 0 1 –3dB 0 0 1 1 1 0 0 1 –4dB 1 1 0 1 1 0 0 1 –5dB 0 1 0 1 1 0 0 1 –6dB 1 0 0 1 1 0 0 1 –7dB 0 0 1 0 1 0 0 1 –8dB 1 1 0 0 1 0 0 1 –9dB 0 1 0 0 1 0 0 1 –10dB 1 0 0 0 1 0 0 1 –11dB 0 0 1 1 0 0 0 1 –12dB 1 1 0 1 0 0 0 1 –13dB 0 1 0 1 0 0 0 1 –14dB 1 0 0 1 0 0 0 1 –15dB 0 0 1 0 0 0 0 1 –16dB 1 1 0 0 0 0 0 1 –17dB 0 1 0 0 0 0 0 1 –18dB 1 0 0 0 0 0 0 1 –19dB 0 0 1 1 1 1 1 0 –20dB 1 1 0 1 1 1 1 0 –21dB 0 1 0 1 1 1 1 0 –22dB 1 0 0 1 1 1 1 0 –23dB 0 0 1 0 1 1 1 0 –24dB 1 1 0 0 1 1 1 0 –25dB 0 1 0 0 1 1 1 0 –26dB 1 0 0 0 1 1 1 0 –27dB 0 0 1 1 0 1 1 0 –28dB 1 1 0 1 0 1 1 0 –29dB 0 1 0 1 0 1 1 0 –30dB 1 0 0 1 0 1 1 0 –31dB 0 0 1 0 0 1 1 0 –32dB 1 1 0 0 0 1 1 0 –33dB 0 1 0 0 0 1 1 0 –34dB 1 0 0 0 0 1 1 0 –35dB 0 0 1 1 1 0 1 0 –36dB 1 1 0 1 1 0 1 0 –37dB 0 1 0 1 1 0 1 0 –38dB 1 0 0 1 1 0 1 0 –39dB 0 0 1 0 1 0 1 0 –40dB 1 1 0 0 1 0 1 0 –41dB 0 1 0 0 1 0 1 0 –42dB 1 0 0 0 1 0 1 0 –43dB 0 0 1 1 0 0 1 0 –44dB 1 1 0 1 0 0 1 0 –45dB 0 1 0 1 0 0 1 0 –46dB 1 0 0 1 0 0 1 0 –47dB 0 0 1 0 0 0 1 0 –48dB 1 1 0 0 0 0 1 0 –49dB 0 1 0 0 0 0 1 0 –50dB Continued on next page. No. 6866-7/24 LC75421M Continued from preceding page. D16 D17 D18 D19 D20 D21 D22 D23 Operation 1 0 0 0 0 0 1 0 –51dB 0 0 1 1 1 1 0 0 –52dB 1 1 0 1 1 1 0 0 –53dB 0 1 0 1 1 1 0 0 –54dB 1 0 0 1 1 1 0 0 –55dB 0 0 1 0 1 1 0 0 –56dB 1 1 0 0 1 1 0 0 –57dB 0 1 0 0 1 1 0 0 –58dB 1 0 0 0 1 1 0 0 –59dB 0 0 1 1 0 1 0 0 –60dB 1 1 0 1 0 1 0 0 –61dB 0 1 0 1 0 1 0 0 –62dB 1 0 0 1 0 1 0 0 –63dB 0 0 1 0 0 1 0 0 –64dB 1 1 0 0 0 1 0 0 –65dB 0 1 0 0 0 1 0 0 –66dB 1 0 0 0 0 1 0 0 –67dB 0 0 1 1 1 0 0 0 –68dB 1 1 0 1 1 0 0 0 –69dB 0 1 0 1 1 0 0 0 –70dB 1 0 0 1 1 0 0 0 –71dB 0 0 1 0 1 0 0 0 –72dB 1 1 0 0 1 0 0 0 –73dB 0 1 0 0 1 0 0 0 –74dB 1 0 0 0 1 0 0 0 –75dB 0 0 1 1 0 0 0 0 –76dB 1 1 0 1 0 0 0 0 –77dB 0 1 0 1 0 0 0 0 –78dB 1 0 0 1 0 0 0 0 –79dB 0 0 0 0 0 0 0 0 –∞dB Input Switch Control (L1, L2, L3, L4, L5, R1, R2, R3, R4, R5) D28 D29 D32 Operation 0 0 1 L1 (R1) ON 1 0 1 L2 (R2) ON 0 1 1 L3 (R3) ON 1 1 1 L4 (R4) ON 0 0 0 L5 (R5) ON No. 6866-8/24 LC75421M Pin Functions Pin No. Pin Name 18 L1 17 L2 16 L3 15 L4 14 L5 20 R1 21 R2 22 R3 23 R4 24 R5 13 LSELO 25 RSELO Function Equivalent circuit VDD VDD • Input signal pins SELO Ln Rn Vref • Input selector output pins VDD 10 LBASS1 9 LBASS2 28 RBASS1 29 RBASS2 • Bass band filter configuration capacitor and resistor connection pins VDD VDD BASS1 BASS2 VDD 8 LSB 7 LOUT 30 RSB 31 ROUT • Super bass band filter configuration capacitor and resistor connection pins VDD VDD SB OUT VDD 5 LFOUT 4 LROUT 33 RFOUT 34 RROUT • Fader output pins. The front side and rear side can be attenuated separately. The attenuation is the same for both Left and Right. Continued on next page. No. 6866-9/24 LC75421M Continued from preceding page. Pin No. Pin Name Function Equivalent circuit VDD 11 LTRE 27 RTRE • Capacitor connection pin for configuring treble filter TRE VDD 19 Vref • Connect a capacitor of a few tens of µF between Vref and AV SS (V SS ) as a analog ground 0.5 × V DD voltage generator, current ripple countermeasure. Vref 3 VSS • Ground pin 35 VDD • Power supply pin • Chip enable pin 2 CE 1 DI 36 CL VDD Data is written to the internal latch and the analog switches are operated when the level changes from High to Low. Data transfer is enabled when the level is High. • Serial data pin and clock input pin for control No. 6866-10/24 LC75421M Equivalent Circuit Input Block Diagram L1 LSEL0 50 k L2 0 dB 6.702 k 50 k L3 +1.25 dB 5.804 k 50 k L4 TOTAL = 50 k +2.50 dB 5.026 k 50 k L5 +3.75 dB 4.352 k 50 k +5.00 dB 3.769 k +6.25 dB 3.264 k +7.50 dB 2.826 k +8.75 dB 2.447 k +10.00 dB 2.119 k +11.25 dB 1.835 k +12.50 dB 1.589 k +13.75 dB 1.376 k +15.00 dB 1.192 k +16.25 dB 1.032 k +17.50 dB 0.894 k +18.75 dB 5.774 k LVref Same for right channel Unit: (Resistance: Ω) No. 6866-11/24 LC75421M Volume Block Equivalent Circuit Diagram LIN 0 dB R1 = 5434 R2 = 4845 R3 = 4319 R4 = 3850 R5 = 3431 R6 = 3058 R7 = 2726 R8 = 2429 R9 = 2165 R10 = 1930 R11 = 1720 R12 = 1533 R13 = 1366 R14 = 1218 R15 = 1085 R16 = 967 R17 = 862 R18 = 768 R19 = 685 R20 = 610 R21 = 544 R22 = 485 R23 = 432 R24 = 385 R25 = 343 R26 = 306 R27 = 273 –1 dB –2 dB –3 dB –4 dB –5 dB –6 dB –7 dB –8 dB –9 dB –10 dB –11 dB –12 dB –13 dB –14 dB –15 dB –16 dB –17 dB –18 dB –19 dB –20 dB –21 dB –22 dB –23 dB –24 dB –25 dB –26 dB –27 dB 794 R81 R28 = 243 R29 = 216 R33 = 137 –79 dB R80 = 359 –53 dB R54 = 49 –78 dB R79 = 44 –52 dB R53 = 55 –77 dB R78 = 49 –51 dB R52 = 61 –76 dB R77 = 55 –50 dB R51 = 69 –75 dB R76 = 62 –49 dB R50 = 77 –74 dB R75 = 69 –48 dB R49 = 87 –73 dB R74 = 78 –47 dB R48 = 49 –72 dB R73 = 87 –46 dB R47 = 55 –71 dB R72 = 49 –45 dB R46 = 61 –70 dB R71 = 55 –44 dB R45 = 69 –69 dB R70 = 62 –43 dB R44 = 77 –68 dB R69 = 69 –42 dB R43 = 86 –67 dB R68 = 78 –41 dB R42 = 48 –66 dB R67 = 87 –40 dB R41 = 54 –65 dB R66 = 49 –39 dB R40 = 61 –64 dB R65 = 55 –38 dB R39 = 68 –63 dB R64 = 62 –37 dB R38 = 77 –62 dB R63 = 69 –36 dB R37 = 86 –61 dB R62 = 78 –35 dB R36 = 97 –60 dB R61 = 87 –34 dB R35 = 108 –59 dB R60 = 49 –33 dB R34 = 122 –58 dB R59 = 55 –32 dB To Treble Block –57 dB R58 = 61 –31 dB R32 = 153 –56 dB R57 = 69 –30 dB R31 = 172 –55 dB R56 = 77 –29 dB R30 = 193 796 R82 R55 = 87 –28 dB –∞ dB –54 dB 798 R83 Same for right channel Unit: (Resistance: Ω) 800 R84 802 R85 804 R86 LVref No. 6866-12/24 LC75421M Treble/Bass/Super Bass Band Block Equivalent Circuit Diagram From Volume Block SW3 SW3 SW2 SW1 SW2 SW1 SW4 SW4 ±3.4 dB ±1.7 dB 7.304 k 9.195 k 0 dB ±5.1 dB 5.802 k Total = 45.084 k 11.576 k ±6.8 dB ±8.5 dB 3.661 k LBASS1 4.608 k ±10.2 dB ±1.7 dB 9.195 k Total = 56.084 k 2.908 k ±3.4 dB 7.304 k ±11.9 dB ±5.1 dB 5.802 k 0.030 k ±6.8 dB 4.608 k 0 dB ±8.5 dB 3.661 k LTRE 11.576 k ±10.2 dB 2.908 k 11.030 k ±11.9 dB Same for right channel Unit: (Resistance: Ω) LBASS2 +18 dB +16 dB +14 dB +12 dB +10 dB +8 dB ±6 dB +4 dB +2 dB 0 dB 1.916 k 2.412 k 3.037 k 3.823 k 4.813 k 6.059 k 7.628 k 9.603 k 12.089 k 15.220 k +20 dB LOUT Same for right channel Units: (Resistance: Ω) Total = 66.6 k LSB During boost, SW1 and SW3 are ON, during cut, SW2 and SW4 are ON, when 0 dB, 0 dB SW and SW2 and SW3 are ON. No. 6866-13/24 LC75421M Fader Volume Block Equivalent Circuit Diagram LFIN LFOUT LROUT S1 S2 0 dB 10.284 k 8.169 k 6.489 k 5.154 k 4.094 k 3.252 k 2.583 k Total = 50 k 2.052 k 1.630 k 1.295 k 2.188 k 1.923 k 0.608 k 0.231 k 0.050 k –2 dB –4 dB S3 0 dB S4 26.342 k +6.5 dB 4.866 k –6 dB 50 k +8.5 dB –8 dB 18.792 k –10 dB –12 dB –14 dB –16 dB When FADER = “1”, S2 and S3 are ON When FADER = “0”, S1 and S4 are ON 0 dB –18 dB 26.342 k –20 dB –25 dB –35 dB +6.5 dB 4.866 k 50 k +8.5 dB 18.792 k –45 dB –60 dB –∞ dB Same for right channel Unit: (Resistance: Ω) LVref When –∞ data is sent to the main volume, S1 and S2 become open, and S3 and S4 simultaneously become ON. No. 6866-14/24 LC75421M Tone Circuit Constant Calculation Examples Super Bass Band Circuit The equivalent circuit and the formula for calculating the external RC with a mean frequency of 68 Hz are shown below. • Super bass band equivalent circuit block diagram R1 R2 C1 C2 R3 • Calculation example Specification Mean frequency: f0 = 68 Hz Gain during maximum boost: G = 20 dB Let us use R1 = 0, R2 = 66.6 kΩ, and C1 = C2 = C. We obtain R3 from G = 20 dB. G+20 dB = 20 × LOG10 1 + R3 = R2 2 10 G+20dB/20 –1 = R2 2R3 66600 ≠ 3.7 KΩ 2 × (10 – 1) We obtain C from mean frequency f0 = 68 Hz. f0= C= 1 2π R3R2C1C2 1 2πf0 R3R2 We obtain Q. R3R2 Q= 2R3 = 1 2π × 68 66600 × 3700 ≠ 0.15 µF 1 ≠ 2.1 R3R2 No. 6866-15/24 LC75421M Treble Band Circuit The shelving characteristics can be obtained for the treble band. The equivalent circuit and calculation formula during boost are indicated below. R1 R2 C • Calculation example 1 Specification Set frequency: f = 10000 Hz Gain during maximum boost: G + 14 dB = 14 dB Let us use R1 = 11.030 kΩ and R2 = 45.054 kΩ. The above constants are inserted in the following formula. G = 20 × LOG10 1 + C= = R2 R1 + (1 / ωC)2 2 1 R2 2πf ( G/20 )2 – R12 10 – 1 1 45054 2 ) – 110302 2π10000 ( 5.01–1 ≠ 6800(pF) Simulation Results Setting f = 10 kHz f = 1 kHz 14 dB 13.95 7.42 12 dB 11.98 6.96 10 dB 10 6.34 8 dB 8 5.5 6 dB 6 4.43 4 dB 4 3.13 2 dB 2 1.64 No. 6866-16/24 LC75421M • Calculation example 2 Specification Set frequency: f = 10000 Hz Gain during maximum boost: G + 11.9 dB = 11.9 dB Let us use R1 = 11.030 kΩ and R2 = 45.054 kΩ. The above constants are inserted in the following formula. G = 20 × LOG10 1 + C= 2πf ( R2 R1 + (1 / ωC)2 2 1 R2 )2 – R12 1011.9/20 – 1 1 = 2π10000 ( 45054 2 ) – 110302 3.94–1 ≠ 1500(pF) Simulation Results f = 10 kHz f = 1 kHz 11.9 dB Setting 11.92 0.00 10.2 dB 10.64 0.00 8.5 dB 9.17 0.00 6.8 dB 7.52 0.00 5.1 dB 5.74 0.00 3.4 dB 3.88 0.00 1.7 dB 1.96 0.00 No. 6866-17/24 LC75421M Bass Shelving Circuit The equivalent circuit and calculation formula during boost are shown below. • Bass band equivalent circuit diagram R1 R2 C1 C2 R3 • Calculation example 1 Specification Mean frequency: f0 = 40 Hz Gain during maximum boost: G + 14 dB = 14 dB Let us use R1 = 0 kΩ, R2 = 45.054 kΩ, C1 = 2.2 µF, and C1 >> C2. We obtain R3 from G = 14 dB. R2 + R3 R3 G+14 dB = 20 × LOG10 R3 = R2 G/20 10 –1 = 45054 ≠ 11 KΩ 5.01 – 1 We obtain C2 from mean frequency f0 = 40 Hz. f0= C2 = 1 2π R3R2C1C2 1 (2πf0) R2R3C1 2 = 1 (2π × 40) × 45054 × 11000 × (2.2 × 10–6) 2 ≠ 0.015 µF Simulation Results Setting f = 100 Hz f = 1 kHz 14 dB 13.55 3.65 12 dB 11.73 3.51 10 dB 9.8 3.31 8 dB 7.89 3 6 dB 5.94 2.55 4 dB 3.97 1.92 2 dB 1.99 1.07 No. 6866-18/24 LC75421M • Calculation example 2 Specification Mean frequency: f0 = 40 Hz Gain during maximum boost: G = 12 dB Let us use R1 = 0 kΩ, R2 = 45.054 kΩ, C1 = 2.2 uF, and C1 >> C2. We obtain R3 from G = 12 dB. R2 + R3 R3 G+12 dB = 20 × LOG10 R3 = R2 10G/20 –1 = 45054 ≠ 15 KΩ 3.98 – 1 We obtain C2 from mean frequency f0 = 40 Hz. f0= C2 = 1 2π R3R2C1C2 1 (2πf0)2 R2R3C1 = 1 (2π × 40)2 × 45054 × 15000 × (2.2 × 10–6) ≠ 0.01 µF Simulation Results Setting f = 100 Hz f = 1 kHz 14 dB 11.73 4.27 12 dB 10.29 4.07 10 dB 8.74 3.78 8 dB 7.11 3.38 6 dB 5.41 2.82 4 dB 3.65 2.09 2 dB 1.85 1.15 No. 6866-19/24 LC75421M (4) Bass Peaking Circuit The equivalent circuit and the formula for calculating the external RC with a mean frequency of 100 Hz are shown below. • Bass band equivalent circuit diagram R1 R2 C1 C2 R3 • Calculation example Specification Mean frequency: f0 = 100 Hz Gain during maximum boost: G = 11.9 dB Let us use R1 = 0, R2 = 45.084 kΩ, and C1 = C2 = C. We obtain R3 from G = 11.9 dB. G+11.9 dB = 20 × LOG10 1 + R3 = R2 = 2 1011.9dB/20 –1 R2 2R3 45084 ≠ 7.68 KΩ 2 × (3.936 – 1) We obtain C from mean frequency f0 = 100 Hz. f0= C= 1 2π R3R2C1C2 1 2πf0 R3R2 = 1 2π × 100 45084 × 7680 ≠ 0.082 µF We obtain Q. Q= R3R2 • 2R3 1 ≠ 1.66 R3R2 Simulation Results f = 100 Hz f = 1 kHz 11.9 dB Setting 11.88 0.00 10.2 dB 10.38 0.00 8.5 dB 8.79 0.00 6.8 dB 7.14 0.00 5.1 dB 5.42 0.00 3.4 dB 3.66 0.00 1.7 dB 1.85 0.00 No. 6866-20/24 LC75421M Usage Cautions (1) Upon power application, the internal analog switch status is undefined. Use an external countermeasure such as muting until data is set. (2) When performing initial data setting after applying power, send the initial data once, and then send the initial setting data. (3) To ensure that the digital frequency signal sent to the CL, DI, and CE pins do not spill over to the analog signal block, either guard these signal lines with a ground pattern, or perform transmission using shielded wires. No. 6866-21/24 Fader block Step setting — dB Fader block Graphic equalizer block Main volume control block Input gain block Step setting — dB Graphic equalizer block Fader Step Characteristics Main volume control block Total harmonic distortion, THD — % Fader block Graphic equalizer block Main volume control block Input gain block Output level — dB Attenuation — dB Main Volume Control Step Characteristics Input gain block Fader block Graphic equalizer block Main volume control block Input gain block Attenuation — dB LC75421M Input Gain Step Characteristics Step setting — dB THD — Frequency Characteristics Frequency, f — Hz THD METER No. 6866-22/24 LC75421M THD — Supply Voltage Characteristics Total harmonic distortion, THD — % Total harmonic distortion, THD — % THD — Input Level Characteristics Fader block THD METER Treble Control Characteristics Level — dB Level — dB Bass Control Characteristics Graphic equalizer block THD METER Main volume control block Input gain block Supply voltage — V Fader block Graphic equalizer block Main volume control block Input gain block Input level, VIN — dBV Frequency, f — Hz Frequency, f — Hz Level — dB Super Bass Characteristics Frequency, f — Hz No. 6866-23/24 LC75421M Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of September, 2003. Specifications and information herein are subject to change without notice. PS No. 6866-24/24