Ordering number : EN5546A CMOS LSI LC89978M CCD Delay Line for Multi-System Overview Package Dimensions The LC89978M is a CCD delay line for multi television system that incorporates a comb filter to remove noise from the chrominance signal and a 1-H delay line for the luminance signal. unit: mm 3111-MFP14S [LC89978M] Features • 5-V single-voltage power supply • Built-in 4 × PLL frequency multiplier circuit allows 4fsc operation from an fsc (3.58 MHz) input. • Can be switched between the NTSC/M, PAL/GBI, and PAL/M formats by setting control pin values. • Includes a built-in crosstalk exclusion comb filter for the chrominance signal that provides high-precision comb characteristics in an adjustment-free circuit. • Peripheral circuits provided on chip for operation with a minimum of external components. • Positive-phase signal input, positive-phase signal output (luminance signal) SANYO: MFP14S Functions • CCD shift registers (for chrominance and luminance signals) • Timing generator and clock driver for CCD • Delay time selective circuit • CCD signal adder • Auto-bias circuit • Sync tip clamp circuit (luminance signal) • Center bias circuit (chrominance signal) • Sample-and-hold circuit • 4 × PLL frequency multiplier circuit • 4fsc clock output circuit • High voltage generator for CCD Reset Drain (RD). Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Supply voltage Symbol VDD Allowable power dissipation Pd max Conditions Ratings –0.3 to +6.0 250 Unit V mW Operating temperature Topr –10 to +60 °C Storage temperature Tstg –55 to +125 °C SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 73097HA (OT)/N3096HA (OT) No. 5546-1/7 LC89978M Allowable Operating Ranges at Ta = 25°C Parameter Symbol Conditions Ratings min typ Unit max Supply voltage VDD 4.75 5.00 5.25 V Clock input amplitude VCLK 300 500 1000 mVp-p Clock frequency FCLK Chrominance signal input amplitude VIN-C 350 500 mVp-p Luminance signal input amplitude VIN-Y 400 572 mVp-p Sine wave 3.579545 MHz Pin Assignment Block Diagram No. 5546-2/7 LC89978M Control Pin Functions CONT1 CONT2 Mode (representative) Chrominance signal delay (number of CCD stages) Luminance signal delay (number of CCD stages) Low Low PAL/GBI 2H (1833.5) + 0H (1.5) 1H (913) Low High PAL/M 2H (1821.5) + 0H (1.5) 1H (907) High Low — — — High High NTSC/M 1H (911.5) + 0H (1.5) 1H (907) Switching Voltage Levels Parameter Symbol Ratings Conditions min typ Unit max Switching voltage level: low VL –0.3 0.0 +0.5 V Switching voltage level: high VH 2.0 5.0 6.0 V Note: *Since the control pins have built-in pull-down resistors (about 70 kΩ), leaving these pins opens effectively sets them to the low level. Function of the 4FSC Pin This pin provides a 4fsc clock signal generated by the 4 × PLL frequency multiplier circuit. Electrical Characteristics at VDD = 5.0 V, Ta = 25°C, FCLK = 3.579545 MHz, VCLK = 500 mVp-p Parameter Supply current Symbol Switch states Ratings SW1 SW2 SW3 SW4 Test conditions IDD-1 a a a b *1 IDD-2 a b a b *1 IDD-3 b b a b *1 min typ Unit max 31 36 41 mA 1.9 2.4 2.9 V 1.4 1.9 2.4 V –2 0 +2 dB –40 –35 dB 0.0 +0.3 dB 10 50 mVrms 0.5 1.5 mVrms [Chrominance signal characteristics] (with no input to Y-IN) DC output voltage Voltage gain Comb depth Linearity Clock leakage (4fsc) Clock leakage (fsc) VINC-1 a a a b *2 VINC-2 a b a b *2 VINC-3 b b a b *2 VOUTC-1 a a a b *2 VOUTC-2 a b a b *2 VOUTC-3 b b a b *2 GVC-1 a a a b *3 GVC-2 a b a b *3 GVC-3 b b a b *3 CD-1 a a a b *4 CD-2 a b a b *4 CD-3 b b a b *4 LNC-1 a a a b *5 LNC-2 a b a b *5 LNC-3 b b a b *5 LCK4C-1 a a a b *6 LCK4C-2 a b a b *6 LCK4C-3 b b a b *6 LCK1C-1 a a a b *6 LCK1C-2 a b a b *6 LCK1C-3 b b a b *6 –0.3 Continued on next page. No. 5546-3/7 LC89978M Continued from preceding page. Parameter Noise Output impedance 0-H delay time Symbol Switch states Ratings SW1 SW2 SW3 SW4 Test conditions NC-1 a a a b *7 NC-2 a b a b *7 NC-3 b b a b *7 ZOC-1 a a a a, b *8 ZOC-2 a b a a, b *8 ZOC-3 b b a a, b *8 TDC-1 a a a b *9 TDC-2 a b a b *9 TDC-3 b b a b *9 min typ 200 Unit max 0.5 2.0 mVrms 350 500 Ω 160 ns [Luminance signal characteristics] (With no signals input to C-IN1 and C-IN2) DC output voltage Voltage gain Frequency response Differential gain Differential phase Linearity Clock leakage (4fsc) Clock leakage (fsc) Noise Output impedance Delay time VINY-1 a a a b *10 VINY-2 a b a b *10 VINY-3 b b a b *10 VOUTY-1 a a a b *10 VOUTY-2 a b a b *10 VOUTY-3 b b a b *10 GVY-1 a a a b *11 GVY-2 a b a b *11 GVY-3 b b a b *11 GFY-1 a a b b *12 GFY-2 a b b b *12 GFY-3 b b b b *12 DGY-1 a a a b *13 DGY-2 a b a b *13 DGY-3 b b a b *13 DPY-1 a a a b *13 DPY-2 a b a b *13 DPY-3 b b a b *13 LSY-1 a a a b *14 LSY-2 a b a b *14 LSY-3 b b a b *14 LCK4Y-1 a a a b *15 LCK4Y-2 a b a b *15 LCK4Y-3 b b a b *15 LCK1Y-1 a a a b *15 LCK1Y-2 a b a b *15 LCK1Y-3 b b a b *15 NY-1 a a a b *16 NY-2 a b a b *16 NY-3 b b a b *16 ZOY-1 a a a c, b *17 ZOY-2 a b a c, b *17 ZOY-3 b b a c, b *17 TDY-1 a a a b *18 63.81 µs TDY-2 a b a b *18 63.39 µs TDY-3 b b a b *18 63.39 µs 1.3 1.8 2.3 V 0.7 1.2 1.7 V –2 0 +2 dB –2 0 +2 dB 0 5 8 % 0 5 8 deg 37 40 43 % 10 50 mVrms 0.5 1.5 mVrms 0.5 2.0 mVrms 400 550 Ω 250 No. 5546-4/7 LC89978M Test Conditions 1. The supply current with no input signal 2. The pin output voltage (the center bias voltage) with no input signal 3. Measure the C-OUT output when a 350-mVp-p sine wave is input to C-IN1 and C-IN2. C-OUT output [mVp-p] GVC = 20log —————————— [dB] 350 [mVp-p] Test frequencies: GVC-1: 4.431395 MHz (PAL/GBI) GVC-2: 3.571628 MHz (PAL/M) GVC-3: 3.571628 MHz (NTSC/M) 4. Measure the comb depth from the C-OUT output when a 350-mVp-p sine wave with frequency fa is input to C-IN1 and C-IN2, and when a sine wave of frequency fb is input. The C-OUT output for an fb input [mVp-p] CD = 20log —————————————————— [dB] The C-OUT output for an fa input [mVp-p] Test Frequencies fa fb CD-1: 4.431395 MHz (PAL/GBI) 4.435303 (PAL/GBI) GD-2: 3.571628 MHz (PAL/M) 3.575561 (PAL/M) GD-3: 3.571628 MHz (NTSC/M) 3.563761 (NTSC/M) 5. Measure the C-OUT output when a 200-mVp-p sine wave is input to C-IN1 and C-IN2, and when a 500-mVp-p sine wave is input, and calculate the gain difference as follows: ( The output for a 500-mVp-p input [mVp-p] —————————————————— 500 [mVp-p] Test Frequencies LNC-1 4.431395MHz (PAL/GBI) LNC-2 3.571628MHz (PAL/M) LNC-3 3.571628MHz (NTSC/M) LNC = 20log ) The output for a 200-mVp-p input [mVp-p] —————————————————— [dB] 200 [mVp-p] 6. Measure the 4fsc (14.3 MHz) and fsc (3.58 MHz) components in the C-OUT output with no input signal. 7. Measure the noise in the C-OUT output with no input signal. Measure the noise with a noise meter with a 200-kHz high-pass filter and a 5-MHz low-pass filter. 8. Input a 350-mVp-p sine wave to C-IN1 and C-IN2. Let V1 be the C-OUT output when SW3 is set to the ‘a’ position, and let V2 be the C-OUT output when SW3 is set to the 'b' position. V2 [mVp-p] – V1 [mVp-p] ZOC = ——————————— × 500 [dB] V1 [mVp-p] Test Frequencies ZOC-1: 4.431395 MHz (PAL/GBI) ZOC-2: 3.571628 MHz (PAL/M) ZOC-3: 3.571628 MHz (NTSC/M) 9. The delay time in the C-OUT output with respect to the C-IN1 input. This is the CCD 1.5-bit delay. 10. The pin output voltage (clamp voltage) with no input signal. No. 5546-5/7 LC89978M 11. Measure the Y-OUT output with a 200-kHz 400-mVp-p sine wave input to Y-IN. Y-OUT output [mVp-p] GVY = 20log —————————— [dB] 400 [mVp-p] 12. Measure the Y-OUT output when a 200-kHz 200-mVp-p sine wave is input to Y-IN, and when a 3.5-MHz 200-mVp-p sine wave is input. The Y-OUT output for a 3.5-MHz input [mVp-p] GFY = 20log ————————————————————— [dB] The Y-OUT output for a 200-kHz input [mVp-p] Here, adjust Vbias so that the clamp level is +250 mV. 13. Apply a 5-step staircase wave (as in the figure below) to Y-IN, and measure the differential gain and differential phase in the Y-OUT output using a vector scope. 14. Apply a 5-step staircase wave (as in the figure below) to Y-IN, and measure the luminance level (Y) and the sync level (S) in the Y-OUT output. S [mV] LS = ———— × 100 [%] Y [mV] 15. Measure the 4fsc (14.3 MHz) and fsc (3.58 MHz) components in the Y-OUT output with no input signal. 16. Measure the noise in the Y-OUT output with no input signal. Measure the noise with a noise meter with a 200-kHz low-pass filter, a 4.2-MHz low-pass filter, and a 3.58-MHz trap filter. 17. Input a 200-kHz, 400-mVp-p sine wave to Y-IN1. Let V1 be the V-OUT output when SW3 is set to the ‘c’ position, and let V2 be the Y-OUT output when SW3 is set to the ‘b’ position. V2 [mVp-p] – V1 [mVp-p] ZOY = ———————————— × 500 [Ω] V1 [mVp-p] 18. Measure the delay time in the Y-OUT output with respect to the input to Y-IN. No. 5546-6/7 LC89978M Test Circuit ■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. ■ Anyone purchasing any products described or contained herein for an above-mentioned use shall: ➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. ■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of July, 1997. Specifications and information herein are subject to change without notice. No. 5546-7/7

- Similar pages
- SANYO LC89962
- SANYO LC89950
- SANYO LV1100
- TOSHIBA TC90A80F
- SANYO LV3403M
- SANYO LA7357
- SANYO LA75695VA
- SANYO LC78856V
- SANYO LA7437
- SANYO LA7386
- SANYO LA7337
- SANYO LC89977M
- SANYO LC89975M
- RHOMBUS-IND F-1450
- 3SB3 Instruction Brochure
- STMICROELECTRONICS LIS2L02AS
- PANASONIC MN3885S
- STMICROELECTRONICS LIS2L02AQ
- STMICROELECTRONICS LIS2L06AL
- SANYO SPM0103A
- STMICROELECTRONICS LIS2L02AL
- SANYO VP301