74LVQ157 LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUT LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2VData Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 157 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The LVQ157 is a low voltage CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. M (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ157M 74LVQ157T It has better speed performance at 3.3V than 5V LSTTL family combined with the true CMOS low power consumption. It consists of four 2-input digital multiplexers with common select and strobe inputs. When strobe input is held high selection of data is inhibit and all the outputs become low. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS February 1999 1/8 74LVQ157 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCT ION 1 SELECT Common Data Select Input 2, 5, 11, 14 1A to 4A Data Inputs From Source A 3, 6, 10, 13 1B to 4B Data Inputs From Source B 4, 7,9, 12 1Y to 4Y Multiplexer Outputs 15 STROBE Strobe Input 8 GND Ground (0V) 16 VCC Positive Supply Voltage TRUTH TABLE INPUT OUT PUT STROBE SELE CT A B Y H X X X L L L L X L L L H X H L H X L L L H X H H X:”H” or ”L” ABSOLUTE MAXIMUM RATING Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V V VI DC Input Voltage -0.5 to VCC + 0.5 VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 50 mA DC VCC or Ground Current ± 200 mA ICC orIGND Tstg Storage Temperature TL Lead Temperature (10 sec) -65 to +150 o 300 o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Unit Supply Voltage (note 1) 2 to 3.6 V VI Input Voltage 0 to VCC V VO Output Voltage Top Operating Temperature: VCC dt/dv Input Rise and Fall Time (VCC = 3V) (note 2) 1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2V 2/8 Valu e 0 to VCC -40 to +85 0 to 10 V o C ns/V 74LVQ157 DC SPECIFICATIONS Symb ol Parameter Test Co nditions VIH High Level Input Voltage VIL Low Level Input Voltage VOH VOL High Level Output Voltage Low Level Output Voltage Min. 3.0 T yp. Un it -40 to 85 o C Max. 2.0 3.0 to 3.6 3.0 Valu e T A = 25 oC V CC (V) Min. Max. 2.0 0.8 V 0.8 VI(*) = IO=-50 µA 2.9 VIH or VIL IO=-12 mA 2.58 VI(*) = VIH or VIL IO=50 µA 0.002 0.1 0.1 IO=12 mA 0 0.36 0.44 2.99 V 2.9 V 2.48 IO=-24 mA 2.2 IO=24 mA V 0.55 Input Leakage Current 3.6 VI = VCC orGND ±0.1 ±1 µA ICC Quiescent Supply Current 3.6 VI = VCC orGND 4 40 µA IOLD Dynamic Output Current (note 1, 2) 3.6 VOLD = 0.8 V max 36 mA VOHD = 2 V min -25 mA II IOHD 1) Maximum test duration 2ms, one output loaded attime 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 Ω. (*) All outputs loaded. DYNAMIC SWITCHING CHARACTERISTICS Symb ol Parameter Test Co nditions Dynamic Low Voltage Quiet Output (note 1, 2) 3.3 VIHD Dynamic High Voltage Input (note 1, 3) 3.3 VILD Dynamic Low Voltage Input (note 1, 3) 3.3 VOLP VOLV Valu e T A = 25 oC V CC (V) Min. T yp. Max. 0.2 0.8 -0.8 0.2 2 CL = 50 pF Un it -40 to 85 o C Min. Max. V 0.8 1) Worst case package 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n -1) outputs switching and one output at GND 3) max number of data inputs (n) switching. (n-1) switching 0V to3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD). f=1MHz 3/8 74LVQ157 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns) Symb ol Parameter T est Con ditio n V CC (V) tPLH tPHL Propagation Delay Time (SELECT-Y) 2.7 3.3(*) tPLH tPHL Propagation Delay Time (STROBE-Y) 2.7 3.3(*) tPLH tPHL Propagation Delay Time (A,B-Y) 3.3 tOSLH tOSHL Output to Output Skew Time (note 1, 2) 2.7 3.3(*) Valu e T A = 25 oC -40 to 85 o C Min. T yp. Max. Min. Max. 7.5 15 17 6.5 11 12 2.7 (*) 7 6 15 11 17 12 6 11 13 5 8 9 0.5 0.5 1.5 1.5 1.5 1.5 Un it ns ns ns ns 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tpHLn|) 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V CAPACITIVE CHARACTERISTICS Symb ol Parameter Test Co nditions CIN Input Capacitance 3.3 CPD Power Dissipation Capacitance (note 1) 3.3 Valu e T A = 25 oC V CC (V) Min. fIN = 10 MHz T yp. Max. Un it -40 to 85 o C Min. Max. 5 pF 24 pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/4(per channel) TEST CIRCUIT CL = 50 pF or equivalent (includes jigand probe capacitance) RL = R1 = 500Ω orequivalent RT = ZOUT of pulse generator (typically 50Ω) 4/8 74LVQ157 WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING CONDITIONS WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING CONDITIONS 5/8 74LVQ157 SO-16 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.004 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 e3 0.050 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8 (max.) P013H 6/8 74LVQ157 TSSOP16 MECHANICAL DATA mm DIM. MIN. inch TYP. A MAX. MIN. TYP. MAX. 1.1 0.433 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.25 6.4 6.5 0.246 0.252 0.256 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 BSC 0.0256 BSC K 0o 4o 8o 0o 4o 8o L 0.50 0.60 0.70 0.020 0.024 0.028 A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 7/8 74LVQ157 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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