L6221C L6221CN/CD QUAD DARLINGTON SWITCH . .. .. . FOUR NON INVERTING INPUTS WITH ENABLE OUTPUT VOLTAGE UP TO 60 V OUTPUT CURRENT UP TO 1.8 A VERY LOW SATURATION VOLTAGE TTL COMPATIBLE INPUTS INTEGRAL FAST RECIRCULATION DIODES DESCRIPTION The L6221 monolithic quad darlington switch is designedfor high current, high voltageswitching applications. Each of the four switches is controlled by a logic input and all four are controlled by a common enableinput.All inputsare TTL-compatiblefor direct connection to logic circuits. Eachswitch consists of an open-collectordarlington transistorplus a fast diodefor switchingapplications with inductivedevice loads. The emitters of thefourswitches are commoned. Any numberof inputs and Multiwatt 15 Powerdip 12 + 2 + 2 SO16 + 2 + 2 ORDERING NUMBERS :L6221C (Powerdip 12+2+2) L6221CN (Multiwatt 15 ) L6221CD (SO16+2+2) outputs of the same device may be paralleled. Three versions are available : the L6221C mounted in a Powerdip 12 + 2 + 2 package and the L6221CN mounted in a 15--lead Multiwatt package, the L6221CDin SO16+2+2 package. BLOCK DIAGRAM May 1997 1/15 L6221C-L6221CN-L6221CD THERMAL DATA Symbol Rth j-pins R th j-case R th j-amb Parameter SO20 Thermal Resistance Junction-pins Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max. Max. Max. 17 – 80 Powerdip Multiwatt15 14 – 80 – 3 35 PIN CONNECTIONS (top views) OUT4 1 20 IN4 CLAMPB 2 19 IN3 N.C. 3 18 N.C. OUT3 4 17 ENABLE GND 5 16 GND GND 6 15 GND OUT2 7 14 VS N.C. 8 13 N.C. CLAMPA 9 12 IN2 10 11 IN1 OUT1 D95IN231 L6221C (Powerdip) L6221CD (SO20) L6221CN (Multiwatt-15) 2/15 Unit °C/W °C/W °C/W L6221C-L6221CN-L6221CD ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VO Output Voltage 60 V VS Logic Supply Voltage 7 V Input Voltage, Enable Voltage VS VIN , VEN IC Continuous Colllector Current (for each channel) for L6221CD 1.8 1.2 A A IC Collector Peak Current (repetitive, duty cycle = 10% ton = 5ms) for L6221CD 2.5 1.7 A A IC Collector Peak Current (non repetitive, t = 10µs) 3.2 2.2 A A °C for L6221CD Top Operating Temperature Range (junction) -40 to +150 Tstg Storage Temperature Range -55 to +150 °C Isub Output Substrate Current 350 mA Ptot Total Power Dissipation at at at at at at 4.3 20 3.5 1 2.3 1 W W W W W W Tpins = 90°C (powerdip) Tcase = 90°C (multiwatt) Tcase = 90°C (SO20) Tamb = 70°C (powerdip) Tamb = 70°C (multiwatt) Tamb = 70°C (SO20) TRUTH TABLE Enable H H L Input Power Out H L X ON OFF OFF For each input : H = High level L = Low level X = Don’t care PIN FUNCTIONS (see block diagram) Name Function IN 1 Input to Driver 1 IN 2 Input to Driver 2 OUT 1 Output of Driver 1 OUT 2 Output of Driver 2 CLAMP A Diode Clamp to Driver 1 and Driver 2 IN 3 Input to Driver 3 IN 4 Input to Driver 4 OUT 3 Output of Driver 3 OUT 4 Output of Driver 4 CLAMP B Diode Clamp to Driver3 and Driver 4 ENABLE Enable Input to All Drivers VS Logic Supply Voltage GND Common Ground 3/15 L6221C-L6221CN-L6221CD ELECTRICAL CHARACTERISTICS Refer to The Test Circuit to Fig.1 to Fig.9 (VS = 5V, Tamb = 25°C unless otherwise specified) Symbol Parameter Test Condition Min. Unit Logic Supply Voltage 5.5 V IS Logic Supply Current All outputs ON IC = 0.7A All outputs OFF 20 20 mA mA Output Leakage Current VCE = 60V VEN = VENH VIN = VIN L 1 mA Collector Emitter Saturation Voltage VS = 4.5V VIN = VIN H VEN = VENH IC = 1A (*) IC = 2A 1.4 1.85 V V 0.8 V VIN = VIN L VEN = VEN L -100 µA VCE(sat) (one input on; all others inputs off). VINL, V ENL Input Low Voltage IINL, IENL Input Low Current VINH, V ENH Input High Voltage 2 V Input High Current VIN = VIN H VEN = VEN H 100 µA IR Clamp Diode Leakage Current VR = 60V VEN = VENH VIN = VIN L 100 µA VF Clamp Diode Forward Voltage IF = 1A IF = 2A (*) 1.8 2.2 V V td(on) Turn on Delay Time VP = 5V RL = 10Ω 2 ms td(off) Turn off Delay Time VP = 5V RL = 10Ω 5 µs ∆IS Logic Supply Current Variation VIN = 5V VEN = 5V Iout = -500mA for Each Channel 150 mA IINH, IENH (*) Only for L6221C - L6221CN types 4/15 Max. VS ICEX 4.5 Typ. L6221C-L6221CN-L6221CD TEST CIRCUITS (X) = Referred to Multiwatt package X = Referred to Powerdip package Figure 1 : Logic supply current. Set V IN = 4.5V,V EN = 0.8V, or V IN = 0.8V, V EN = 4.5V, for I S (all outputs off) Set V IN = 2V, V EN = 2V, for I S (all outputs on) Figure 2 : Output Sustaining Voltage. Figure 3 : Output Leakage Current. VP = +60V 5/15 L6221C-L6221CN-L6221CD Figure 4 : Collector-emitter Saturation Voltage. Figure 5 : Logic Input Characteristics. Set Set Set Set Figure 6 : Clamp Diode Leakage Current. VP = +60V 6/15 S1, S2 open, VIN, VEN = 0.8V for IIN L, IEN L S1, S2 open, VIN, V EN = 2V for I IN H, IEN H S1, S2 close, VIN, VEN = 0.8V for VIN L, VEN L S1, S2 close, V IN, VEN = 2V for VIN H, VEN H Figure 7 : Clamp Diode Forward Voltage. L6221C-L6221CN-L6221CD Figure 8 : Switching Times Test Circuit. Figure 9 : Switching TImes Waveforms. Figure 10 : Allowed Peak Collector Current vs. Duty Cycle for 1, 2, 3 or 4 Contemporary Working Outputs (L6221C). Figure 11 : Allowed Peak Collector Current vs. Duty Cycle for 1, 2, 3 or 4 Contemporary Working Outputs (L6221CN). 7/15 L6221C-L6221CN-L6221CD Figure 12 : Collector Saturation Voltage vs. Collector Current. Figure 13 : Free-wheeling Diode Forward Voltage vs. Diode Current . Figure 14 : Collector Saturation Voltage vs. Junction Temperature at I C = 1A. Figure 15 : Free-wheeling Diode Forward Voltage vs. Junction Temperature at IF = 1A. Figure 16 : Saturation Voltage vs. Junction Temperature at IC = 1.8A. Figure 17 : Free-wheeling Diode Forward Voltage vs. Junction Temperature at If = 1.8A. 8/15 L6221C-L6221CN-L6221CD Figure 18. APPLICATION INFORMATION When inductive loads are driven by L6221C/CD, a zener diode in series with the integral free-wheeling diodes increases the voltage across which energy stored in the load is discharged and therefore speeds the current decay (fig. 18). The zener has to be chosen in such a way that VCLAMP is limited to 60V taking into account the zener’svoltage changesdue to: spread on VZ, temperature changes, and the voltage drop due to ohmic resistance. Moreover, the instantaneouspower must be limited in order to avoid the reverse second breakdown. Figure 19 : Driver for Solenoids up to 3A. Some care must be taken to ensure that the collectors are placed close togetherto avoid different current partitioning at turn-off. We suggest to put in parallel channel 1 and 4 and channel2 and 3 as shown in figure 19 for the similar electrical characteristics of the logicsection (turn-on and turn-off delay time) and the power stages (collector saturation voltage, free-wheeling diode forward voltage). 9/15 L6221C-L6221CN-L6221CD Figure 20 : Saturation Voltage vs. Collector Current. Figure 22 : Peak Collector Current vs. Duty Cycle for 1 or 2 Paralleled Outputs Driven (L6221CN). 10/15 Figure 21 : Peak Collector Current vs. Duty Cycle for 1 or 2 Paralleled Outputs Driven (L6221N). L6221C-L6221CN-L6221CD MOUNTING INSTRUCTION The Rth j-amb of the L6221C can be reduced by solderingthe GND pins to a suitablecopperarea of the printed circuit board (Fig. 23) or to an external heatsink (Fig. 24). The diagram of figure 25 shows the maximum dissipable power Ptot and the Rth j-amb as a function of the side ” α” of two equal square copper areas hav- ing a thickness of 35µ (1.4 mils). During soldering the pins temperature must not exceed 260 °C and the soldering time must not be longer than 12 seconds. The external heatsink or printed circuit copper area must be connected to electrical ground. Figure 23 : Example of P.C. Board Copper Area Which is Used as Heatsink. Figure 24 : External Heatsink Mounting Example. Figure 25 : Maximum Dissipable Power and Junction to Ambient Thermal Resistance vs. Side ” α”. Figure 26 : Maximum Allowable Power Dissipation vs. Ambient Temperature. 11/15 L6221C-L6221CN-L6221CD MULTIWATT15 PACKAGE MECHANICAL DATA DIM. mm MIN. TYP. MIN. TYP. MAX. A 5 B 2.65 0.104 C 1.6 0.063 D 0.197 1 0.039 E 0.49 0.55 0.019 F 0.66 0.75 0.026 G 1.14 1.27 1.4 0.045 0.050 0.055 G1 17.57 17.78 17.91 0.692 0.700 0.705 H1 19.6 L 0.022 0.030 0.772 H2 12/15 inch MAX. 20.2 22.1 22.6 0.795 0.870 0.890 L1 22 22.5 0.866 0.886 L2 17.65 18.1 0.695 0.713 L3 17.25 17.5 17.75 0.679 0.689 L4 10.3 10.7 10.9 0.406 0.421 L7 2.65 2.9 0.104 0.699 0.429 0.114 M 4.2 4.3 4.6 0.165 0.169 0.181 M1 4.5 5.08 5.3 0.177 0.200 0.209 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 L6221C-L6221CN-L6221CD POWERDIP16 PACKAGE MECHANICAL DATA DIM. mm MIN. a1 0.51 B 0.85 b b1 TYP. inch MAX. MIN. TYP. MAX. 0.020 1.40 0.033 0.50 0.38 0.020 0.50 D 0.055 0.015 0.020 20.0 0.787 E 8.80 0.346 e 2.54 0.100 e3 17.78 0.700 F 7.10 0.280 I 5.10 0.201 L Z 3.30 0.130 1.27 0.050 13/15 L6221C-L6221CN-L6221CD SO20 PACKAGE MECHANICAL DATA DIM. mm MIN. TYP. A a1 inch MAX. TYP. 2.65 0.1 MAX. 0.104 0.3 a2 0.004 0.012 2.45 0.096 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 C 0.5 0.020 c1 45 (typ.) D 12.6 13.0 0.496 0.512 E 10 10.65 0.394 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.4 7.6 0.291 0.299 L 0.5 1.27 0.020 0.050 M S 14/15 MIN. 0.75 0.030 8 (max.) L6221C-L6221CN-L6221CD Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1997 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 15/15