FQD2N80 / FQU2N80 N-Channel QFET® MOSFET 800 V, 1.8 A, 6.3 Ω Description Features This N-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor®’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, active power factor correction (PFC), and electronic lamp ballasts. • 1.8 A, 800 V, RDS(on) = 6.3 Ω (Max.) @ VGS = 10 V, ID = 0.9 A • Low Gate Charge (Typ. 12 nC) • Low Crss (Typ. 5.5 pF) • 100% Avalanche Tested • RoHS Compliant D ! D " G G S ID G! S I-PAK D-PAK Absolute Maximum Ratings Symbol VDSS D " " ! S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) FQD2N80 / FQU2N80 800 Unit V 1.8 A 1.14 A 7.2 A IDM Drain Current VGSS Gate-Source Voltage ± 30 V EAS Single Pulsed Avalanche Energy (Note 2) 180 mJ IAR Avalanche Current (Note 1) 1.8 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * (Note 1) 5.0 4.0 2.5 mJ V/ns W 50 0.4 -55 to +150 W W/°C °C 300 °C FQD2N80 / FQU2N80 Unit °C/W dv/dt PD TJ, TSTG TL - Pulsed (Note 1) (Note 3) Power Dissipation (TC = 25°C) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case, Max. RθJA Thermal Resistance, Junction-to-Ambient * 50 °C/W RθJA Thermal Resistance, Junction-to-Ambient, Max. 110 °C/W 2.5 * When mounted on the minimum pad size recommended (PCB Mount) ©2009 Fairchild Semiconductor Coporation FQD2N80 / FQU2N80 Rev. C0 www.fairchildsemi.com FQD2N80 / FQU2N80 N-Channel QFET® MOSFET April 2013 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Unit 800 -- -- V -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.9 IDSS IGSSF IGSSR VDS = 800 V, VGS = 0 V -- -- 10 µA VDS = 640 V, TC = 125°C -- -- 100 µA Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA 3.0 -- 5.0 V -- 4.9 6.3 Ω -- 2.4 -- S -- 425 550 pF -- 45 60 pF -- 5.5 7.0 pF Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.9 A gFS Forward Transconductance VDS = 50 V, ID = 0.9 A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 400 V, ID = 2.4 A, RG = 25 Ω (Note 4, 5) VDS = 640 V, ID = 2.4 A, VGS = 10 V (Note 4, 5) -- 12 35 ns -- 30 70 ns -- 25 60 ns -- 28 65 ns -- 12 15 nC -- 2.6 -- nC -- 6.0 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 1.8 A ISM -- -- 7.2 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 1.8 A Drain-Source Diode Forward Voltage -- -- 1.4 V trr Reverse Recovery Time -- 480 -- ns Qrr Reverse Recovery Charge -- 2.0 -- µC VGS = 0 V, IS = 2.4 A, dIF / dt = 100 A/µs (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 105mH, IAS = 1.8A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 2.4A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2009 Fairchild Semiconductor Coporation FQD2N80 / FQU2N80 Rev. C0 www.fairchildsemi.com FQD2N80 / FQU2N80 N-Channel QFET® MOSFET Electrical Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V 0 ID, Drain Current [A] 10 ID, Drain Current [A] Top : -1 10 0 10 o 150 C o 25 C o -55 C ※ Notes : 1. 250μs Pulse Test 2. TC = 25℃ -2 10 ※ Notes : 1. VDS = 50V 2. 250μs Pulse Test -1 -1 0 10 10 1 10 10 2 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 12 IDR , Reverse Drain Current [A] VGS = 10V VGS = 20V 8 6 4 ※ Note : TJ = 25℃ 2 25℃ 150℃ ※ Notes : 1. VGS = 0V 2. 250μs Pulse Test -1 0 1 2 3 4 5 6 10 0.2 0.4 0.6 0.8 1.0 1.2 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 700 12 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 600 Ciss 500 Capacitance [pF] 0 10 400 Coss 300 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 200 Crss 100 VDS = 160V 10 VGS, Gate-Source Voltage [V] RDS(ON) [Ω ], Drain-Source On-Resistance 10 VDS = 400V VDS = 640V 8 6 4 2 ※ Note : ID = 2.4A 0 -1 10 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2009 Fairchild Semiconductor Coporation FQD2N80 / FQU2N80 Rev. C0 0 0 2 4 6 8 10 12 14 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics www.fairchildsemi.com FQD2N80 / FQU2N80 N-Channel QFET® MOSFET Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μA 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 1.2 A 0.5 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature 2.0 Operation in This Area is Limited by R DS(on) 1 1.6 10μs 100μs 1 ms ID, Drain Current [A] ID, Drain Current [A] 10 10 ms 0 10 DC -1 10 ※ Notes : 1.2 0.8 0.4 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -2 10 0 10 1 2 10 0.0 25 3 10 10 50 100 125 150 Figure 10. Maximum Drain Current vs Case Temperature D = 0 .5 0 ※ N o te s : 1 . Z θ J C ( t) = 2 .5 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .2 0 .1 0 .0 5 10 -1 PDM 0 .0 2 0 .0 1 Z θ JC ( t) , T h e r m a l R e s p o n s e Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] 10 -5 t1 s i n g l e p u ls e 10 -4 10 -3 10 -2 10 -1 t2 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2009 Fairchild Semiconductor Coporation FQD2N80 / FQU2N80 Rev. C0 www.fairchildsemi.com FQD2N80 / FQU2N80 N-Channel QFET® MOSFET Typical Characteristics FQD2N80 / FQU2N80 N-Channel QFET® MOSFET Gate Charge Test Circuit & Waveform 50KΩ 200nF 12V VGS Same Type as DUT Qg 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RG RL VDS 90% VDD VGS VGS DUT 10V 10% td(on) tr td(off) t on t off tf Unclamped Inductive Switching Test Circuit & Waveforms VDS BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L BVDSS IAS ID RG VDD DUT 10V tp ©2009 Fairchild Semiconductor Coporation FQD2N80 / FQU2N80 Rev. C0 ID (t) VDS (t) VDD tp Time www.fairchildsemi.com FQD2N80 / FQU2N80 N-Channel QFET® MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2009 Fairchild Semiconductor Coporation FQD2N80 / FQU2N80 Rev. C0 www.fairchildsemi.com FQD2N80 / FQU2N80 N-Channel QFET® MOSFET Mechanical Dimensions D-PAK Dimensions in Millimeters ©2009 Fairchild Semiconductor Coporation FQD2N80 / FQU2N80 Rev. C0 www.fairchildsemi.com FQD2N80 / FQU2N80 N-Channel QFET® MOSFET Mechanical Dimensions I-PAK Dimensions in Millimeters ©2009 Fairchild Semiconductor Coporation FQD2N80 / FQU2N80 Rev. C0 www.fairchildsemi.com tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used here in: 1. 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Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I64 ©2009 Fairchild Semiconductor Coporation FQD2N80 / FQU2N80 Rev. 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