STD4NS25 N-CHANNEL 250V - 0.9Ω - 4A DPAK/IPAK MESH OVERLAY™ MOSFET ■ ■ ■ ■ TYPE VDSS RDS(on) ID STD4NS25 250 V < 1.1 Ω 4A TYPICAL RDS(on) = 0.9 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performance. The new patented STrip layout coupled with the Company’s proprietary edge termination structure, makes it suitable in coverters for lighting applications. 3 3 2 1 1 IPAK TO-251 DPAK TO-252 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Value Unit Drain-source Voltage (VGS = 0) Parameter 250 V Drain-gate Voltage (RGS = 20 kΩ) 250 V Gate- source Voltage ± 20 V ID Drain Current (continuos) at TC = 25°C 4 A ID Drain Current (continuos) at TC = 100°C 2.5 A Drain Current (pulsed) 16 A Total Dissipation at TC = 25°C 50 W Derating Factor 0.4 W/°C 5 V/ns –65 to 150 °C 150 °C IDM (●) PTOT dv/dt (1) Tstg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature (•)Pulse width limited by safe operating area February 2001 (1) ISD≤ 4A, di/dt≤300 A/µs, VDD≤ V (BR)DSS, Tj≤TjMAX 1/9 STD4NS25 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 2.5 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W Rthc-sink Thermal Resistance Case-sink Typ 1.5 °C/W Maximum Lead Temperature For Soldering Purpose 275 °C Tl AVALANCHE CHARACTERISTICS Symbol Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value Unit 4 A 120 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Min. Typ. Max. 250 Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 V Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 10 µA Gate-body Leakage Current (VDS = 0) VGS = ±20V ±100 nA ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 2 A ID(on) On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V Min. Typ. Max. Unit 2 3 4 V 0.9 1.1 Ω 4 A DYNAMIC Symbol gfs (1) 2/9 Parameter Forward Transconductance Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 2A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 1 3.5 Max. Unit S 355 pF 64 pF 29.5 pF STD4NS25 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. VDD = 125 V, ID = 2 A RG = 4.7Ω VGS = 10 V (see test circuit, Figure 3) VDD = 200V, ID = 4 A, VGS = 10V Typ. Max. Unit 12 ns 18 ns 19 27 nC 3.2 nC 7.5 nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(Voff) tf Turn-off- Delay Time Fall Time VDD = 125V, ID = 2 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) 70 10.5 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time Vclamp = 200V, ID = 4 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 13 10 21.5 ns ns ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Min. Typ. Max. Unit Source-drain Current 4 A ISDM (2) Source-drain Current (pulsed) 16 A VSD (1) Forward On Voltage ISD = 4 A, VGS = 0 1.5 V trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 4 A, di/dt = 100A/µs VDD = 30V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current 124 ns 0.5 µC 7.2 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/9 STD4NS25 Output Characteristics Transconductance Gate Charge vs Gate-source Voltage 4/9 Transfer Characteristics Static Drain-source On Resistance Capacitance Variations STD4NS25 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STD4NS25 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STD4NS25 TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 L2 0.8 0.031 L4 0.60 1.00 0.024 0.039 V2 0o 8o 0o 0o P032P_B 7/9 STD4NS25 TO-251 (IPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. 2.4 0.086 MAX. 0.094 0.043 A 2.2 A1 0.9 1.1 0.035 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 B5 0.033 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 L2 0.8 0.047 1 0.031 0.039 A1 C2 A3 A C H B B3 = 1 = 2 G = = = E B2 = 3 B5 L D B6 L2 L1 0068771-E 8/9 STD4NS25 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 9/9