STD5NB30 N - CHANNEL 300V - 0.75 Ω - 5A - DPAK PowerMESH MOSFET TYPE ST D5NB30 ■ ■ ■ ■ ■ ■ V DSS R DS(on) ID 300 V < 0.9 Ω 5 A TYPICAL RDS(on) = 0.75 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL DESCRIPTION Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 3 1 DPAK TO-252 (Suffix ”T4”) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS SWITCH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ■ ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS Value Un it Drain-source Voltage (VGS = 0) Parameter 300 V Drain- gate Voltage (R GS = 20 kΩ) 300 V ± 30 V G ate-source Voltage o ID Drain Current (continuous) at Tc = 25 C 5 A ID Drain Current (continuous) at Tc = 100 o C 3 A Drain Current (pulsed) 20 A I DM (•) P tot dv/dt( 1) Ts tg Tj o T otal Dissipation at Tc = 25 C 55 W Derating Factor 0.44 W /o C Peak Diode Recovery voltage slope 5.5 V/ns Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area August 1999 -65 to 150 o C 150 o C ( 1) ISD ≤ 5Α, δι/δτ ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/9 STD5NB30 THERMAL DATA R thj -case Rthj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose o 2.27 100 1.5 275 C/W oC/W o C/W o C Max Value Unit AVALANCHE CHARACTERISTICS Symbo l Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 5 A E AS Single Pulse Avalanche Energy o (starting Tj = 25 C, ID = IAR , V DD = 50 V) 40 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Typ. Max. 300 V GS = 0 I DSS Min. Unit V T c = 125 oC V GS = ± 30 V 1 50 µA µA ± 100 nA Max. Unit ON (∗) Symbo l Parameter Test Con ditions V GS(th) Gate Threshold Voltage V DS = V GS ID = 250 µA R DS(on) Static Drain-source On Resistance V GS = 10V ID =2.5 A I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. 3 Typ. 4 5 V 0.75 0.9 Ω 5 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/9 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz ID = 3 A V GS = 0 Min. Typ. 2 3.3 Max. Unit S 500 100 14 pF pF pF STD5NB30 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions Min. Typ. Max. Unit t d(on) tr Turn-on delay Time Rise Time V DD = 150 V I D = 3 A V GS = 10 V R G = 4.7 Ω (see test circuit, figure 3) 13 8 Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 250 V 17 7.5 6.5 25 nC nC nC Typ. Max. Unit I D =5 A V GS = 10 V ns ns SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions Min. 8 15 7 V DD = 240 V I D = 6 A R G = 4.7 Ω VGS = 10 V (see test circuit, figure 5) ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (•) V SD (∗) t rr Q rr I RRM Parameter Test Con ditions Min. Typ. Source-drain Current Source-drain Current (pulsed) Forward On Voltage I SD = 6 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 6 A di/dt = 100 A/µs T j = 150 o C V DD = 100 V (see test circuit, figure 5) V GS = 0 Max. Unit 5 20 A A 1.6 V 190 ns 1.1 µC 11.5 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/9 STD5NB30 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STD5NB30 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STD5NB30 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STD5NB30 TO-251 (IPAK) MECHANICAL DATA mm DIM. MIN. inch MAX. MIN. A 2.2 TYP. 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 TYP. MAX. 0.85 B5 0.033 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A1 C2 A3 A C H B B6 = 1 = 2 G = = = E B2 = 3 B5 L D B3 L2 L1 0068771-E 7/9 STD5NB30 TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 L2 0.8 L4 0.031 0.6 1 0.023 0.039 A1 C2 A H A2 C DETAIL ”A” L2 D = 1 = G 2 = = = = E B2 3 B DETAIL ”A” L4 0068772-B 8/9 STD5NB30 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com . 9/9