STY34NB50F N - CHANNEL 500V - 0.11Ω - 34 A - Max247 PowerMESH MOSFET TYPE STY34NB50F ■ ■ ■ ■ ■ ■ ■ V DSS R DS(on) ID 500 V < 0.14 Ω 34 A TYPICAL RDS(on) = 0.11 Ω EXTREMELY HIGH dv/dt CAPABILITY ± 30V GATE TO SOURCE VOLTAGE RATING 100% AVALANCHE TESTED LOW INTRINSIC CAPACITANCE GATE CHARGE MINIMIZED REDUCED VOLTAGE SPREAD 1 DESCRIPTION Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 2 3 Max247 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITCH MODE POWER SUPPLY (SMPS) ■ DC-AC CONVERTER FOR WELDING EQUIPMENT AND UNINTERRUPTABLE POWER SUPPLY AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS Symb ol V DS V DGR V GS Parameter Value Un it Drain-source Voltage (VGS = 0) 500 V Drain- gate Voltage (RGS = 20 kΩ) 500 V G ate-source Voltage ± 30 V 34 A ID Drain Current (continuous) at Tc = 25 o C ID Drain Current (continuous) at Tc = 100 o C 21.4 A Drain Current (pulsed) 136 A I DM (•) P tot dv/dt (1) T s tg Tj o T otal Dissipation at Tc = 25 C 450 W Derating F actor 3.61 W/ C 4.5 V/ns Peak Diode Recovery voltage slope Storage Temperature Max. O perating Junction Temperature (•) Pulse width limited by safe operating area December 1999 o -65 to 150 o C 150 o C ( 1) ISD ≤34 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/8 STY34NB50F THERMAL DATA R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose o 0.277 30 0.1 300 C/W C/W o C/W o C o AVALANCHE CHARACTERISTICS Symbo l Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) E AS Single Pulse Avalanche Energy o (starting Tj = 25 C, I D = IAR , VDD = 50 V) Max Valu e Unit 34 A 1000 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA Gate-body Leakage Current (VDS = 0) T yp. Max. 500 V GS = 0 V DS = Max Rating Zero G ate Voltage Drain Current (V GS = 0) V DS = Max Rating o C Min. Unit V T c = 125 V GS = ± 30 V 10 100 µA µA ± 100 nA ON (∗) Symbo l Parameter Test Con ditions ID = 250 µA V GS(th) Gate Threshold Voltage R DS(on) Static Drain-source O n V GS = 10 V Resistance I D(o n) V DS = V GS Min. T yp. Max. Unit 3 4 5 V 0.11 0.14 Ω I D = 17 A 34 On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/8 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse T ransfer Capacitance V DS = 25 V f = 1 MHz I D = 17 A V GS = 0 Min. T yp. Max. Unit 27 S 5.9 880 80 nF pF pF STY34NB50F ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions t d(on) tr Turn-on Time Rise Time V DD = 250 V I D =17 A V GS =15 V R G = 4.7 Ω (see test circuit, figure 3) Qg Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 400 V ID = 34 A V GS = 10 V Min. T yp. Max. 45 35 Unit ns ns 140 38 61 196 nC nC nC T yp. Max. Unit SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Con ditions Min. 28 30 60 V DD = 400 V I D = 17 A V GS = 15 V R G = 4.7 Ω (see test circuit, figure 5) ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (•) V SD (∗) t rr Q rr I RRM Parameter Test Con ditions Min. T yp. Source-drain Current Source-drain Current (pulsed) Forward On Voltage I SD = 34 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt = 100 A/µs I SD = 34 A T j = 150 o C V DD = 100 V (see test circuit, figure 5) V GS = 0 Max. Unit 34 136 A A 1.6 V 715 ns 11.8 µC 33 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STY34NB50F Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STY34NB50F Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STY34NB50F Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STY34NB50F Max247 MECHANICAL DATA mm DIM. MIN. A 4.70 TYP. inch MAX. MIN. TYP. MAX. 5.30 A1 2.20 2.60 b 1.00 1.40 b1 2.00 2.40 b2 3.00 3.40 c 0.40 0.80 D 19.70 20.30 e 5.35 5.55 E 15.30 15.90 L 14.20 15.20 L1 3.70 4.30 P025Q 7/8 STY34NB50F Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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