STP16NB25 STP16NB25FP N - CHANNEL 250V - 0.220Ω - 16A - TO-220/TO-220FP PowerMESH MOSFET TYPE V DSS R DS(on) ID ST P16NB25 ST P16NB25FP 250 V 250 V < 0.28 Ω < 0.28 Ω 16 A 8 A ■ ■ ■ ■ ■ TYPICAL RDS(on) = 0.220 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED 3 DESCRIPTION Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 1 3 2 2 1 TO-220 TO-220FP INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ UNINTERRUPTIBLE POWER SUPPLY (UPS) ■ DC-DC & DC-AC CONVERTERS FOR TELECOM, INDUSTRIAL AND CONSUMER ENVIRONMENT ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value STP16NB25 V DS V DGR V GS Un it ST P16NB25F P Drain-source Voltage (VGS = 0) 250 V Drain- gate Voltage (R GS = 20 kΩ) 250 V ± 30 V G ate-source Voltage o ID Drain Current (continuous) at Tc = 25 C 16 8 ID Drain Current (continuous) at Tc = 100 o C 10 5 A Drain Current (pulsed) 64 32 A T otal Dissipation at Tc = 25 o C 140 45 W Derating Factor 1.12 0.36 W /o C V/ns I DM (•) P tot dv/dt( 1) Peak Diode Recovery voltage slope 5.5 5.5 V ISO Insulation W ithstand Voltage (DC) ----- 2000 Ts tg Storage Temperature Tj Max. Operating Junction Temperature (•) Pulse width limited by safe operating area March 1999 A V -65 to 150 o C 150 o C ( 1) ISD ≤ 16A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/9 STP16NB25/FP THERMAL DATA R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Max TO-220 T O220FP 0.9 2.77 Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose 62.5 0.5 300 o C/W o C/W C/W o C o AVALANCHE CHARACTERISTICS Symbo l Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 16 A E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) 250 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. Typ. Max. 250 Unit V T c = 125 oC V GS = ± 30 V 1 10 µA µA ± 100 nA ON (∗) Symbo l Parameter Test Con ditions V GS(th) Gate Threshold Voltage V DS = V GS ID = 250 µA R DS(on) Static Drain-source On Resistance V GS = 10V ID = 8 A I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. Typ. Max. Unit 3 4 5 V 0.22 0.28 Ω 16 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/9 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D =8 A V GS = 0 Min. Typ. Max. Unit 4 S 1000 250 40 pF pF pF STP16NB25/FP ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions Min. Typ. Max. Unit t d(on) tr Turn-on Delay T ime Rise Time V DD = 125 V ID = 8 A R G = 4.7 Ω V GS = 10 V (Resistive Load, see fig. 3) 12 12 Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 200 V I D = 16 A V GS = 10 V 29 9 11 38 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbo l Parameter Test Con ditions Min. t d(of f) tf Turn-off Delay T ime Fall T ime V DD = 125 V ID = 8 A V GS = 10 V R G = 4.7 Ω (Resistive Load, see fig. 3) 35 8 ns ns tr (Voff) tf tc Off-voltage Rise T ime Fall T ime Cross-over Time V CLAMP = 200 V I D = 16 A V GS = 10 V R G = 4.7 Ω (Induct ive Load, see fig. 5) 10 9 20 ns ns ns SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 16 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 16 A di/dt = 100 A/µs T j = 150 o C V DD = 50 V (see test circuit, fig. 5) t rr Q rr I RRM Min. Typ. Max. Unit 16 64 A A 1.5 V V GS = 0 210 ns 1.5 µC 14 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/9 STP16NB25/FP Thermal Impedance for TO-220 Thermal Impedance forTO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 STP16NB25/FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STP16NB25/FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP16NB25/FP TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 14.0 0.511 L2 16.4 L4 0.645 13.0 0.551 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L5 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/9 STP16NB25/FP TO-220FP MECHANICAL DATA mm DIM. MIN. A 4.4 inch TYP. MAX. MIN. TYP. MAX. 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L3 L3 L6 F F1 L7 F2 H G G1 ¯ 1 2 3 L2 8/9 L4 STP16NB25/FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. 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