STN1NB80 N - CHANNEL 800V - 16 Ω - 0.2A - SOT-223 PowerMESH MOSFET TYPE ST N1NB80 ■ ■ ■ ■ ■ V DSS R DS(on) ID 800 V < 20 Ω 0.2 A TYPICAL RDS(on) = 16 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED 2 1 DESCRIPTION Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 2 3 SOT-223 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS SWITCH MODE POWER SUPPLIES (SMPS) ■ AC ADAPTORS AND BATTERY CHARGERS FOR HANDHELD EQUIPMENT ■ ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS Value Un it Drain-source Voltage (V GS = 0) Parameter 800 V Drain- gate Voltage (R GS = 20 kΩ) 800 V ± 30 V G ate-source Voltage o ID Drain Current (continuous) at Tc = 25 C 0.2 A ID Drain Current (continuous) at Tc = 100 oC 0.12 A 0.8 A I DM (•) P tot Drain Current (pulsed) o T otal Dissipation at Tc = 25 C Derating Factor dv/dt( 1 ) Ts tg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area November 1999 2.9 W 0.02 W /o C 4 V/ns -65 to 150 o C 150 o C ( 1) ISD ≤ 0.2 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX STN1NB80 THERMAL DATA R thj -case Rthj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose o 43 60 0.7 260 C/W oC/W o C/W o C Max Valu e Unit AVALANCHE CHARACTERISTICS Symbo l Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 0.2 A E AS Single Pulse Avalanche Energy o (starting Tj = 25 C, I D = IAR , VDD = 50 V) 200 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V DS = Max Rating Zero G ate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) T yp. Max. 800 V GS = 0 I DSS Min. Unit V T c = 125 oC V GS = ± 30 V 1 50 µA µA ± 100 nA ON (∗) Symbo l Parameter Test Con ditions ID = 250 µA V GS(th) Gate Threshold Voltage R DS(on) Static Drain-source O n V GS = 10V Resistance I D(o n) V DS = V GS Min. T yp. Max. Unit 3 4 5 V 16 20 Ω ID =0.2 A 0.2 On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/8 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse T ransfer Capacitance V DS = 25 V f = 1 MHz I D = 0.2 A V GS = 0 Min. T yp. Max. Unit 0.1 0.4 S 140 22 2.5 pF pF pF STN1NB80 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions Min. T yp. Max. Unit t d(on) tr Turn-on delay Time Rise Time V DD = 400 V ID = 0.5 A VGS = 10 V R G = 4.7 Ω (see test circuit, figure 3) 8 10 Qg Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 640 V 10 5 3.6 14 nC nC nC T yp. Max. Unit I D =1.1 A V GS = 10 V ns ns SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Con ditions Min. 40 16 50 V DD = 640 V ID = 1.1 A R G = 4.7 Ω V GS = 10 V (see test circuit, figure 5) ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (•) V SD (∗) t rr Q rr I RRM Parameter Test Con ditions Min. T yp. Source-drain Current Source-drain Current (pulsed) Forward On Voltage I SD =0.2 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 1.1 A di/dt = 100 A/µs T j = 150 o C V DD = 100 V (see test circuit, figure 5) V GS = 0 Max. Unit 0.2 0.8 A A 1.6 V 460 ns 1150 µC 5 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STN1NB80 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STN1NB80 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STN1NB80 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STN1NB80 SOT-223 MECHANICAL DATA mm DIM. mils MIN. TYP. MAX. MIN. TYP. MAX. a 2.27 2.3 2.33 89.4 90.6 91.7 b 4.57 4.6 4.63 179.9 181.1 182.3 c 0.2 0.4 0.6 7.9 15.7 23.6 d 0.63 0.65 0.67 24.8 25.6 26.4 e1 1.5 1.6 1.7 59.1 63 66.9 e4 0.32 12.6 f 2.9 3 3.1 114.2 118.1 122.1 g 0.67 0.7 0.73 26.4 27.6 28.7 l1 6.7 7 7.3 263.8 275.6 287.4 l2 3.5 3.5 3.7 137.8 137.8 145.7 L 6.3 6.5 6.7 248 255.9 263.8 L e1 l2 d a c b e4 f l1 C B C E g P008B 7/8 STN1NB80 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. 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