STB20NE06L N - CHANNEL 60V - 0.06Ω - 20A TO-263 STripFET POWER MOSFET TYPE STB20NE06L ■ ■ ■ ■ ■ ■ V DSS R DS(on) ID 60 V < 0.07 Ω 20 A TYPICAL RDS(on) = 0.06 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE 100 oC LOW THRESHOLD DRIVE ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL 3 1 DESCRIPTION This Power Mosfet is the latest development of STMicroelectronis unique ”Single Feature Size” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. D2PAK TO-263 (suffix ”T4”) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ DC MOTOR CONTROL ■ DC-DC & DC-AC CONVERTERS ■ SYNCHRONOUS RECTIFICATION ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS Value Un it Drain-source Voltage (VGS = 0) Parameter 60 V Drain- gate Voltage (R GS = 20 kΩ) 60 V ± 20 V G ate-source Voltage o ID Drain Current (continuous) at Tc = 25 C 20 A ID Drain Current (continuous) at Tc = 100 C o 14 A Drain Current (pulsed) 80 A 70 W 0.47 W /o C 7 V/ns I DM (•) P tot o T otal Dissipation at Tc = 25 C Derating Factor dv/dt Ts tg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area June 1999 -65 to 175 o C 175 o C ( 1) ISD ≤ 20 A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/8 STB20NE06L THERMAL DATA R thj -case Rthj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose o 2.14 62.5 0.5 300 C/W C/W o C/W o C o AVALANCHE CHARACTERISTICS Symbo l Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 20 A E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 35 V) 100 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. Typ. Max. 60 Unit V T c = 125 oC V GS = ± 20 V 1 10 µA µA ± 100 nA Max. Unit ON (∗) Symbo l Parameter Test Con ditions ID = 250 µA V GS(th) Gate Threshold Voltage V DS = V GS R DS(on) Static Drain-source On Resistance V GS = 5 V V GS = 10 V I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. 1 I D = 10 A ID = 10 A Typ. 1.7 2.0 V 0.07 0.06 0.085 0.07 Ω Ω 20 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/8 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D =10 A V GS = 0 Min. Typ. Max. Unit 5 9 S 800 125 40 pF pF pF STB20NE06L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions Min. Typ. Max. Unit t d(on) tr Turn-on Delay T ime Rise Time V DD = 30 V I D = 10 A R G =4.7 W VGS = 5 V (see test circuit, figure 3) 20 45 Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 48 V 14 8 4 20 nC nC nC Typ. Max. Unit I D = 20 A V GS = 5 V ns ns SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions Min. 10 25 42 V DD = 48 V I D = 20 A R G =4.7 Ω V GS = 5 V (see test circuit, figure 5) ns ns ns SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 20 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 20 A di/dt = 100 A/µs o Tj = 150 C V DD = 30 V (see test circuit, figure 5) t rr Q rr I RRM Min. Typ. V GS = 0 Max. Unit 20 80 A A 1.5 V 65 ns 130 nC 4 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STB20NE06L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STB20NE06L Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STB20NE06L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STB20NE06L TO-263 (D2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.21 1.36 0.047 0.053 D 8.95 9.35 0.352 0.368 E 10 10.4 0.393 0.409 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.624 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 D C2 A2 A C DETAIL”A” DETAIL ”A” A1 B2 E B G L2 L L3 P011P6/E 7/8 STB20NE06L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. 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