IRF630S N - CHANNEL 200V - 0.35Ω - 9A - D2PAK MESH OVERLAY MOSFET TYPE IRF630S ■ ■ ■ ■ ■ ■ V DSS R DS(on) ID 200 V < 0.40 Ω 9 A TYPICAL RDS(on) = 0.35 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED FOR THROUGH-HOLE VERSION CONTACT SALES OFFICE DESCRIPTION This power MOSFET is designed using the company’s consolidated strip layout-based MESH OVERLAY process. This technology matches and improves the performances compared with standard parts from various sources. APPLICATIONS ■ HIGH CURRENT SWITCHING ■ UNINTERRUPTIBLE POWER SUPPLY (UPS) ■ DC/DC COVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT. 3 1 D2PAK TO-263 (suffix ”T4”) INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR Parameter Value Un it Drain-source Voltage (VGS = 0) 200 V Drain- gate Voltage (R GS = 20 kΩ) 200 V G ate-source Voltage ± 20 V ID Drain Current (continuous) at Tc = 25 o C 9 A ID Drain Current (continuous) at Tc = 100 o C 5.7 A Drain Current (pulsed) 36 A V GS I DM (•) P tot o T otal Dissipation at Tc = 25 C Derating Factor dv/dt( 1) Ts tg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area December 1998 70 W 0.56 W /o C 5 V/ns -65 to 150 o C 150 o C ( 1) ISD ≤ 9A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/8 IRF630S THERMAL DATA R thj -case Rthj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose o 1.47 62.5 0.5 300 C/W oC/W o C/W o C Max Value Unit 9 A 100 mJ AVALANCHE CHARACTERISTICS Symbo l Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. Typ. Max. 200 Unit V T c = 125 oC V GS = ± 30 V 1 50 µA µA ± 100 nA Max. Unit ON (∗) Symbo l Parameter Test Con ditions V GS(th) Gate Threshold Voltage V DS = V GS ID = 250 µA R DS(on) Static Drain-source On Resistance V GS = 10V ID = 5 A I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. 2 Typ. 3 4 V 0.35 0.40 Ω 10 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/8 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz ID = 5 A V GS = 0 Min. Typ. 3 4 540 90 35 Max. Unit S 700 120 50 pF pF pF IRF630S ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Typ. Max. Unit t d(on) tr Turn-on Time Rise Time Parameter V DD = 100 V I D = 4.5 A R G = 4.7 Ω V GS = 10 V (see test circuit, figure 3) Test Con ditions 10 15 14 20 ns ns Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 160 V 31 7.5 9 45 nC nC nC Typ. Max. Unit 12 12 25 17 17 35 ns ns ns Typ. Max. Unit 9 36 A A 1.5 V ID = 9 A Min. VGS = 10 V SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions Min. V DD = 160 V I D = 9 A R G = 4.7 Ω VGS = 10 V (see test circuit, figure 5) SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 9 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 9 A di/dt = 100 A/µs o Tj = 150 C V DD = 50 V (see test circuit, figure 5) t rr Q rr I RRM Min. V GS = 0 170 ns 0.95 µC 11 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 IRF630S Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 IRF630S Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 IRF630S Fig. 1: Unclamped Inductive Load Test Circuit Fig. 1: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 IRF630S TO-263 (D2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.3 4.6 0.169 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B2 1.25 1.4 0.049 0.055 C 0.45 0.6 0.017 0.023 C2 1.21 1.36 0.047 0.053 D 8.95 9.35 0.352 0.368 E 10 10.28 0.393 0.404 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.624 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 E A C2 L2 D L L3 B2 B A1 C G P011P6/C 7/8 IRF630S Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1998 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com . 8/8