STMICROELECTRONICS STP7NB40

STP7NB40
STP7NB40FP
N - CHANNEL ENHANCEMENT MODE
PowerMESH MOSFET
PRELIMINARY DATA
TYPE
STP7NB40
STP7NB40FP
■
■
■
■
■
V DSS
R DS(on)
ID
400 V
400 V
< 0.9 Ω
< 0.9 Ω
7.0 A
4.4 A
TYPICAL RDS(on) = 0.75 Ω
EXTREMELY HIGH dV/dt CAPABILITY
100% AVALANCHE TESTED
VERY LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
3
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, SGS-Thomson has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
1
3
2
1
TO-220
2
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITCH MODE POWER SUPPLIES (SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
■
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
STP7NB40
V DS
V DGR
V GS
Drain-source Voltage (V GS = 0)
V
Drain- gate Voltage (R GS = 20 kΩ)
400
V
Gate-source Voltage
± 30
V
o
ID
Drain Current (continuous) at T c = 25 C
Drain Current (continuous) at T c = 100 o C
P tot
dv/dt( 1 )
V ISO
T stg
Tj
STP7NB40FP
400
ID
IDM (•)
Unit
7
4.4
A
4.4
2.8
A
Drain Current (pulsed)
28
28
A
Total Dissipation at T c = 25 o C
100
35
W
Derating Factor
0.8
0.28
W/ o C
Peak Diode Recovery voltage slope
4.5
4.5
V/ns
Insulation Withstand Voltage (DC)

2000
Storage Temperature
Max. Operating Junction Temperature
V
-65 to 150
o
C
150
o
C
(•) Pulse width limited by safe operating area
(1) ISD ≤ 7A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
January 1998
1/4
STP7NB40/FP
THERMAL DATA
R thj-case
Thermal Resistance Junction-case
Max
R thj-amb
R thc-sink
Tl
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
TO-220
TO-220FP
1.25
3.57
62.5
0.5
300
o
C/W
o
C/W
C/W
o
C
o
AVALANCHE CHARACTERISTICS
Symbol
Parameter
I AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T j max, δ < 1%)
E AS
Single Pulse Avalanche Energy
(starting T j = 25 o C, I D = I AR , VDD = 50 V)
Max Value
Unit
7
A
300
mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbol
V (BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Conditions
I D = 250 µA
I DSS
Zero Gate Voltage
V DS = Max Rating
Drain Current (V GS = 0) V DS = Max Rating
I GSS
Gate-body Leakage
Current (V DS = 0)
Min.
Typ.
Max.
400
VGS = 0
Unit
V
T c = 125 o C
V GS = ± 30 V
1
50
µA
µA
± 100
nA
ON (∗)
Symbol
Parameter
Test Conditions
V GS(th)
Gate Threshold
Voltage
V DS = VGS
ID = 250 µA
R DS(on)
Static Drain-source On
Resistance
V GS = 10V
I D = 3.5 A
ID(on)
On State Drain Current V DS > I D(on) x R DS(on)max
V GS = 10 V
Min.
Typ.
Max.
Unit
3
4
5
V
0.75
0.9
Ω
7
A
DYNAMIC
Symbol
g fs (∗)
C iss
C oss
C rss
2/4
Parameter
Test Conditions
Forward
Transconductance
V DS > I D(on) x R DS(on)max
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V DS = 25 V
f = 1 MHz
I D = 3.5 A
V GS = 0
Min.
Typ.
2.5
4.2
705
132
17
Max.
Unit
S
720
175
25
pF
pF
pF
STP7NB40/FP
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol
Parameter
Test Conditions
t d(on)
tr
Turn-on Time
Rise Time
V DD = 200 V I D = 3.5 A
R G = 4.7 Ω
V GS = 10 V
(see test circuit, figure 3)
Qg
Q gs
Q gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 320 V
ID = 7 A
Min.
VGS = 10 V
Typ.
Max.
Unit
11.5
7.5
16
11
ns
ns
21
7.3
8.5
30
nC
nC
nC
Typ.
Max.
Unit
9.5
9
16.5
15
14
25
ns
ns
ns
Typ.
Max.
Unit
7
28
A
A
SWITCHING OFF
Symbol
t r(Voff)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
Min.
V DD = 320 V I D = 7 A
R G = 4.7 Ω V GS = 10 V
(see test circuit, figure 5)
SOURCE DRAIN DIODE
Symbol
I SD
I SDM (•)
V SD (∗)
t rr
Q rr
I RRM
Parameter
Test Conditions
Min.
Source-drain Current
Source-drain Current
(pulsed)
Forward On Voltage
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 7 A
V GS = 0
I SD = 7 A di/dt = 100 A/µs
o
V DD = 100 V
T j = 150 C
(see test circuit, figure 5)
1.6
V
300
ns
2
µC
13.7
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
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STP7NB40/FP
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
© 1998 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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