STMICROELECTRONICS STN2NE10L

STN2NE10L

N-CHANNEL 100V - 0.33Ω - 2A SOT-223
STripFET POWER MOSFET
TYPE
STN2NE10L
■
■
■
■
■
V DSS
R DS(on)
ID
100 V
< 0.4 Ω
1.8 A
TYPICAL RDS(on) = 0.33 Ω
EXCEPTIONAL dv/dt CAPABILITY
AVALANCHE RUGGED TECHNOLOGY
100 % AVALANCHE TESTED
LOW THRESHOLD DRIVE
DESCRIPTION
This Power Mosfet is the latest development of
STMicroelectronics unique ”Single Feature
Size” stip-based process. The resulting transistor shows extremely high packing density for low
on-resistance, rugged avalanche characteristics
and less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ DC MOTOR CONTROL (DISK DRIVES,etc.)
■ DC-DC & DC-AC CONVERTERS
■ SYNCHRONOUS RECTIFICATION
2
1
2
3
SOT-223
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symb ol
V DS
V DGR
Parameter
Value
Unit
Drain-source Voltage (VGS = 0)
100
V
Drain- gate Voltage (R GS = 20 kΩ)
100
V
Gate-source Voltage
± 20
V
ID
Drain Current (continuous) at Tc = 25 o C
1.8
A
ID
Drain Current (continuous) at Tc = 100 oC
1.3
A
VGS
I DM (•)
P tot
dv/dt( 1 )
T st g
Tj
7.2
A
Total Dissipation at T c = 25 C
Drain Current (pulsed)
2.5
W
Derating F actor
0.02
W /o C
6
V/ns
o
Peak Diode Recovery voltage slope
Storage T emperature
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
March 2000
-65 to 150
o
C
150
o
C
( 1) ISD ≤ 7.2 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
1/8
STN2NE10L
THERMAL DATA
R th j-pc b
R thj -amb
Tl
Thermal Resistance Junction-PC Board
Max
Thermal Resistance Junction-ambient
Max
(Surf ace Mounted)
Maximum Lead Temperature F or Soldering Purpose
o
50
60
o
C/W
C/W
o
260
C
AVALANCHE CHARACTERISTICS
Symbo l
Parameter
Max Value
Unit
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
1.8
A
E AS
Single Pulse Avalanche Energy
(starting Tj = 25 o C, ID = IAR , V DD = 25 V)
20
mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbo l
V (BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Con ditions
I D = 250 µA
V GS = 0
I DSS
V DS = Max Rating
Zero Gate Voltage
Drain Current (V GS = 0) V DS = Max Rating
IGSS
Gate-body Leakage
Current (VDS = 0)
Min.
Typ.
Max.
100
Unit
V
T c = 125 oC
V GS = ± 20 V
1
10
µA
µA
± 100
nA
Max.
Unit
ON (∗)
Symbo l
Parameter
Test Con ditions
ID = 250 µA
V GS(th)
Gate Threshold Voltage V DS = V GS
R DS(on)
Static Drain-source On
Resistance
V GS = 10 V
V GS = 5 V
I D(o n)
On State Drain Current
V DS > ID(o n) x R DS(on )ma x
V GS = 10 V
Min.
1
ID = 1 A
ID = 1 A
Typ.
1.7
2.5
V
0.33
0.38
0.4
0.45
Ω
Ω
1.8
A
DYNAMIC
Symbo l
g f s (∗)
C iss
C os s
C rss
2/8
Parameter
Test Con ditions
Forward
Transconductance
V DS > ID(o n) x R DS(on )ma x
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V DS = 25 V
f = 1 MHz
ID = 1 A
V GS = 0 V
Min.
Typ.
Max.
Unit
1
3
S
345
45
20
pF
pF
pF
STN2NE10L
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
Parameter
Test Con ditions
Min.
Typ.
Max.
Unit
t d(on)
tr
Turn-on Delay T ime
Rise Time
V DD = 50 V
I D = 3.5 A
R G = 4.7 Ω
V GS = 5 V
(Resistive Load, see fig. 3)
7
17
Qg
Q gs
Q gd
Total G ate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 80 V
10
5
4
14
nC
nC
nC
Typ.
Max.
Unit
ID = 7 A
V GS = 5 V
ns
ns
SWITCHING OFF
Symbo l
Parameter
Test Con ditions
Min.
t d(of f)
tf
Turn-off Delay T ime
Fall T ime
V DD = 80 V
I D = 3.5 A
V GS = 5 V
R G =4.7 Ω
(Resistive Load, see fig. 3)
22
8
ns
ns
tr (Voff)
tf
tc
Off-voltage Rise T ime
Fall T ime
Cross-over Time
V DD = 80 V
ID = 7 A
V GS = 5 V
R G = 4.7 Ω
(Induct ive Load, see fig. 5)
8
9
19
ns
ns
ns
SOURCE DRAIN DIODE
Symbo l
Parameter
Test Con ditions
ISD
I SDM (•)
Source-drain Current
Source-drain Current
(pulsed)
V SD (∗)
Forward On Voltage
I SD = 2 A
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 7 A
di/dt = 100 A/µs
T J = 150 o C
V DD = 30 V
(see test circuit, fig. 5)
t rr
Q rr
I RRM
Min.
Typ.
V GS = 0
Max.
Unit
2
8
A
A
1.5
V
75
ns
190
µC
5
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
3/8
STN2NE10L
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/8
STN2NE10L
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/8
STN2NE10L
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STN2NE10L
SOT-223 MECHANICAL DATA
mm
DIM.
mils
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
a
2.27
2.3
2.33
89.4
90.6
91.7
b
4.57
4.6
4.63
179.9
181.1
182.3
c
0.2
0.4
0.6
7.9
15.7
23.6
d
0.63
0.65
0.67
24.8
25.6
26.4
e1
1.5
1.6
1.7
59.1
63
66.9
e4
0.32
12.6
f
2.9
3
3.1
114.2
118.1
122.1
g
0.67
0.7
0.73
26.4
27.6
28.7
l1
6.7
7
7.3
263.8
275.6
287.4
l2
3.5
3.5
3.7
137.8
137.8
145.7
L
6.3
6.5
6.7
248
255.9
263.8
L
e1
l2
d
a
c
b
e4
f
l1
C
B
C
E
g
P008B
7/8
STN2NE10L
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granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are
subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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8/8
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