STW80NF10 N-CHANNEL 100V - 0.012Ω - 80A TO-247 LOW GATE CHARGE STripFET™ POWER MOSFET TYPE STW80NF10 ■ ■ ■ ■ VDSS RDS(on) ID 100 V < 0.015 Ω 80 A TYPICAL RDS(on) = 0.012Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION 3 2 1 TO-247 DESCRIPTION This Power Mosfet series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high-efficiency isolated DC-DC converters for Telecom and Computer application. It is also intended for any application with low gate charge drive requirements. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH-EFFICIENCY DC-DC CONVERTERS ■ UPS AND MOTOR CONTROL ABSOLUTE MAXIMUM RATINGS Symbol Value Unit Drain-source Voltage (VGS = 0) 100 V Drain-gate Voltage (RGS = 20 kΩ) 100 V VGS Gate- source Voltage ±20 V ID (*) Drain Current (continuos) at TC = 25°C 80 A ID Drain Current (continuos) at TC = 100°C 50 A VDS VDGR IDM (●) PTOT Parameter Drain Current (pulsed) 320 A Total Dissipation at TC = 25°C 300 W 2 W/°C Derating Factor dv/dt (1) Peak Diode Recovery voltage slope EAS (2) Single Pulse Avalanche Energy Tstg Tj Storage Temperature Max. Operating Junction Temperature (●) Pulse width limited by safe operating area (*) Limited by wire bonding April 2001 9 V/ns 245 mJ –65 to 175 °C 175 °C (1) I SD ≤80A, di/dt ≤300A/µs, VDD ≤ V (BR)DSS, Tj ≤ T JMAX. (2) Starting T j = 25°C, I D = 80A, VDD = 50V 1/8 STW80NF10 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 0.5 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Min. Typ. Max. 100 Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 V Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 10 µA Gate-body Leakage Current (VDS = 0) VGS = ±20V ±100 nA ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 40 A ID(on) On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V Min. Typ. Max. Unit 2 3 4 V 0.012 0.015 Ω 80 A DYNAMIC Symbol gfs (1) 2/8 Parameter Forward Transconductance Test Conditions VDS > ID(on) x RDS(on)max, ID =40 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. Max. Unit 20 S Ciss Input Capacitance 4300 pF Coss Output Capacitance 600 pF Crss Reverse Transfer Capacitance 240 pF STW80NF10 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Test Conditions Min. VDD = 50V, ID = 40A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 80V, ID = 80A, VGS = 10V Typ. Max. Unit 40 ns 145 ns Qg Total Gate Charge Qgs Gate-Source Charge 23 nC Qgd Gate-Drain Charge 51 nC 140 189 nC SWITCHING OFF Symbol td(off) tf Parameter Turn-off-Delay Time Test Conditions Min. VDD = 27V, ID = 40A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) Fall Time Typ. Max. Unit 134 ns 115 ns Off-voltage Rise Time Vclamp =80V, ID =80A RG = 4.7Ω, VGS = 10V 111 ns tf Fall Time (see test circuit, Figure 5) 125 ns tc Cross-over Time 185 ns td(off) SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Min. Typ. Source-drain Current ISDM (1) Source-drain Current (pulsed) VSD (2) Forward On Voltage ISD = 80A, VGS = 0 trr Reverse Recovery Time ISD = 80A, di/dt = 100A/µs, VDD = 50V, Tj = 150°C (see test circuit, Figure 5) Qrr IRRM Max. Unit 80 A 320 A 1.5 V 155 ns Reverse Recovery Charge 850 nC Reverse Recovery Current 11 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/8 STW80NF10 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STW80NF10 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STW80NF10 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STW80NF10 TO-247 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 4.7 5.3 0.185 0.209 D 2.2 2.6 0.087 0.102 E 0.4 0.8 0.016 0.031 F 1 1.4 0.039 0.055 F3 2 2.4 0.079 0.094 F4 3 3.4 0.118 0.134 G 10.9 0.429 H 15.3 15.9 0.602 0.626 L 19.7 20.3 0.776 0.779 L3 14.2 14.8 0.559 0.582 L4 34.6 1.362 L5 5.5 0.217 M 2 3 0.079 0.118 P025P 7/8 STW80NF10 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2001 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8