TDA7467 AUDIO MATRIX WITH SRS EFFECTS The Device incorporates the SRS (Sound Retrieval System) under licence from SRS Labs, Inc. 1 STEREO INPUT INPUT ATTENUATION CONTROL IN 0.5dB STEP - MUTE FUNCTION MONO MODE (SRS 3D MONO) STEREO MODE (SRS 3D STEREO) SPACE AND CENTER ATTENUATORS ARE AVAILABLE ALL FUNCTION ARE PROGRAMMABLE VIA SERIAL BUS (I2C BUS) DIP28 ORDERING NUMBER: TDA7467 SO28 DESCRIPTION The TDA7467 is a SRS (Sound Retrieval System) audio matrix. It reproduces SRS sound processing stereo and mono sources both. The SRS sound is guaranteed by external components and it is not affected by internal process spreads. The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers according to the SRS labs specificaPIN CONNECTION (Top view) ORDERING NUMBER: TDA7467D tion. Control of all the functions is accomplished by serial bus. Thanks to the used BIPOLAR/CMOS/DMOS technology, Low Distortion, Low Noise and DC stepping are obtained. LOUT 1 28 ROUT RIN 2 27 CREF LIN 3 26 LP2 DIG_GND 4 25 LP1 SCL 5 24 HP6 ADDR 6 23 HP5 SDA 7 22 HP4 AGND 8 21 VS PS1 9 20 HP3 PS2 10 19 HP2 PS3 11 18 HP1 PS4 12 17 VREFOUT PS5 13 16 NETW2 PS6 14 15 NETW1 D96AU507 May 1997 1/11 L-IN R-IN 0.15µF 0.15µF 2 3 50K 50K 21 31.5dB control VS 31.5dB control 8 - + 27 22µF 17 SRS 14 VREF 4.42K 15 MONO 1.5K 0.47µF 1K NETW1 16 0.47µF 32.4K 130K 9 PS1 27nF CENTER PHASE SHIFTER 2 PS6 13 2.2nF PS5 CREF 12 SUPPLY AGND 15nF VREFOUT 3.74K 47.5K NETW2 SPACE 4.7nF PHASE SHIFTER 1 11 PS3 PS2 10 0.47nF 4.7nF - + HP1 18 1µF HP2 HP3 20 MIX MIX HPF1 19 0.1µF HP4 + 22 1µF HP5 24 HPF2 23 0.1µF HP6 2/11 PS4 100nF 25 1µF LPF1 26 LP1 + + SRS FIX MONO FIX SRS MONO + D96AU506 I2C BUS DECODER + LATCHES + LP2 0.1µF 2 4 6 7 5 1 R-OUT DIG_GND ADDR SDA SCL L-OUT TDA7467 BLOCK DIAGRAM TDA7467 THERMAL DATA Symbol R th j-pins Description Thermal Resistance Junction-pins Value Unit 85 °C/W Ma x. ABSOLUTE MAXIMUM RATINGS Symbol VS Parameter Value Operating Supply Voltage T amb Operating Ambient Temperature Tstg Storage Temperature Range Unit 11 V -10 to 85 °C -55 to +150 °C QUICK REFERENCE DATA Symbol VS Min. Typ. Max. Unit Supply Voltage Parameter 7 9 10.2 V 2 0.1 VCL Max. input signal handling THD Total Harmonic Distortion V = 1Vrms f = 1KHz 0.01 Vrms S/N Signal to Noise Ratio V out = 1Vrms (mode = OFF) 106 SC Channel Separation f = 1KHz % dB 90 Input Control (0.5dB) dB -31.5 0 dB SRS Center Control (1dB step) -31 0 dB SRS Space Control (1dB step) -31 Mute Attenuation 0 dB 100 dB ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25°C, VS = 9V, RL = 10KΩ, Vin = 1Vrms; RG = 600Ω, all controls flat (G = 0dB), Effect Ctrl = -6dB, MODE = OFF; f = 1KHz unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. 9 10.2 Unit SUPPLY VS Supply Voltage IS Supply Current SVR Ripple Rejection 7 LCH / RCH out, Mode = OFF 60 V 25 mA 80 dB INPUT STAGE R IN Input Resistance V CL Clipping Level THD = 0.3% 37.5 50 2 2.5 62.5 KΩ Vrms AVMIN Min. Attenuation -1 0 1 dB AVMAX Max. Attenuation 31 31.5 32 dB ASTEP Step Resolution -1 0.5 1 dB -3 0 3 mV 0 dB VDC DC Steps Adjacent att. step SRS EFFECT CONTROL C range1 Center/Space Control Range Sstep1 Center/Space Step Resolution -31 1 dB 3/11 TDA7467 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit AUDIO OUTPUTS No(Off) Output Noise (OFF) Output muted, Flat BW (20Hz to 20KHz) 4 5 µVrms µVrms No(srs) Output noise (srs) Surround Sound BW (20Hz to 20KHz) 50 µVrms d Distortion AV = 0; Vin = 1Vrms SC Channel Separation Vocl Clipping Level R out Vout 0.01 0.1 % 90 dB 2.5 Vrms Output Resistance 30 Ω DC Voltage Level 3.8 V d = 0.3% 2 BUS INPUTS Vil Input Low Voltage Vih Input High Voltage Iin Input Current Vo Output Voltage SDA Acknowledge 1 3 V V -5 IO =1.6mA 5 µA 0.4 V SRS SURROUND SOUND MATRIX CENTER StepC SPACE SRS Control Range -31 Center Step Resolution 0 1 SRS Space Control Range -31 dB dB 0 dB StepS Space Step Resolution 1 dB PERSP1 Perspective 1 Input Signal of 125Hz SPACE = 0dB, CENTER = MUTE Rin = GND; Lin → ROUT 12 dB PERSP2 Perspective 2 Input Signal of 2.15KHz SPACE = 0dB, CENTER = MUTE Rin = GND; Lin → ROUT 0 dB L+R L+ R SRS Curve SPACE = MUTE, CENTER =0dB Rin = GND; Lin → ROUT -8.5 dB L, R L, R SRS Curve SPACE = MUTE, CENTER =0dB Rin = GND; Lin → LOUT Lin = GND; Rin → ROUT -13.4 dB 4/11 TDA7467 I2C BUS INTERFACE Data transmission from microprocessor to the TDA7467 and viceversa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). Data Validity As shown in fig. 3, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. Start and Stop Conditions As shown in fig.4 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. Byte Format Every byte transferred on the SDA line must contain 8 bits. Each byte must be followed by an ac- knowledge bit. The MSB is transferred first. Acknowledge The master (µP) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 5). The peripheral (audioprocessor) that acknowledges has to pull-down (LOW) the SDA line during this clock pulse. The audioprocessor which has been addressed has to generate an acknowledge after the reception of each byte, otherwise the SDA line remains at the HIGH level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. Transmission without Acknowledge Avoiding to detect the acknowledge of the audioprocessor, the µP can use a simpler transmission: simply it waits one clock without checking the slave acknowledging, and sends the new data. This approach of course is less protected from misworking. 2 Figure 3: Data Validity on the I CBUS Figure 4: Timing Diagram of I2CBUS Figure 5: Acknowledge on the I2CBUS 5/11 TDA7467 A chip address byte A subaddress bytes A sequence of data (N byte + achnowledge) A stop condition (P) SOFTWARE SPECIFICATION Interface Protocol The interface protocol comprises: A start condition (S) CHIP ADDRESS SUBADDRESS MSB S 1 LSB 0 0 0 0 0 A MSB DATA 1 to DATA n LSB 0 ACK B DATA MSB ACK LSB DATA ACK P ACK = Achnowledge S = Start P = Stop B = Auto Increment EXAMPLES No Incremental Bus The TDA7467 receives a start condition, the correct chip address, a subaddress with the MSB = 0 (no incremental bus), N-data (all these data concern the subaddress selected), a stop condition. CHIP ADDRESS SUBADDRESS MSB S 1 LSB 0 0 0 0 0 A MSB 0 ACK 0 DATA LSB X X X X MSB X D1 D0 ACK LSB DATA ACK P Incremental Bus The TDA7467 receives a start condition, the correct chip address, a subaddress with the MSB = 1 (incremental bus): now it is in a loop condition with an autoincrease of the subaddress whereas SUBADDRESS from ”1XXXX1XX” to ”1XXX1111” of DATA are ignored. The DATA 1 concerns the subaddress sent, and the DATA 2 concerns the subaddress plus one sent in the loop etc. and at the end, it receives the stop condition. CHIP ADDRESS SUBADDRESS MSB S 6/11 1 LSB 0 0 0 0 0 A MSB 0 ACK 1 DATA 1 to DATA n LSB X X X X X D1 D0 ACK MSB LSB DATA ACK P TDA7467 DATA BYTES (Address = 80(HEX) if ADDR pin is floating, 82(HEX) if ADDR pin is connected to VS): FUNCTION SELECTION: The first byte (subaddress) MSB LSB SUBADDRESS D7 D6 D5 D4 D3 D2 D1 D0 B X X X X X 0 0 MODE B X X X X X 0 1 SRS/SPACE ATTENUATION B X X X X X 1 0 SRS/CENTER ATTENUATION B X X X X X 1 1 INPUT ATTENUATION B = 1: INCREMENTAL BUS; ACTIVE B = 0: NO INCREMENTAL BUS X = INDIFFERENT 0, 1 INPUT ATTENUATION SELECTION MSB D7 D6 D5 D4 D3 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 LSB INPUT ATTENUATION D0 0 1 0 1 0 1 0 1 0.5 dB STEPS 0 -0.5 -1 -1.5 -2 -2.5 -3 -3.5 4 dB STEPS 0 -4 -8 -12 -16 -20 -24 -28 MUTE INPUT ATTENUATION = 0 ∼ -31.5dB SRS MODE D7 D6 D5 D4 D3 D2 D1 D0 MODE X 0 SRS OFF (FIX) X 1 SRS ON 0 1 MONO SRS (MONO 3D) 1 1 STEREO SRS (STEREO 3D) RECOMMENDED TO ATTENUATE -3dB ON ”SRS OFF” ie. MONO SRS (MONO 3D): XXXXXX01 7/11 TDA7467 SPACE & CENTER ATTENUATION SELECTION MSB D7 D6 D5 D4 D3 0 0 0 0 1 0 0 1 1 X 0 1 0 1 X X = INDIFFERENT 0, 1 SPACE & CENTER ATTENUATION = 0dB ∼ -31dB POWER ON RESET INPUT MODE SPACE ATTENUATION CENTER ATTENUATION 8/11 MUTE OFF (FIX) MUTE (MIN) MUTR (MIN) LSB SPACE & CENTER ATT. 1 dB STEPS 0 -1 -2 -3 -4 -5 -6 -7 8 dB STEPS 0 -8 -16 -24 MUTE D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 X X X TDA7467 DIP28 PACKAGE MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. a1 0.63 0.025 b 0.45 0.018 b1 0.23 b2 0.31 1.27 D E 0.009 0.012 0.050 37.34 15.2 16.68 1.470 0.598 0.657 e 2.54 0.100 e3 33.02 1.300 F MAX. 14.1 0.555 I 4.445 0.175 L 3.3 0.130 9/11 TDA7467 SO28 PACKAGE MECHANICAL DATA mm DIM. MIN. TYP. A inch MAX. TYP. 2.65 MAX. 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 C 0.5 0.020 c1 45° (typ.) D 17.7 18.1 0.697 0.713 E 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 F 7.4 7.6 0.291 0.299 L 0.4 1.27 0.016 0.050 S 10/11 MIN. 8° (max.) TDA7467 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as criticalcomponents in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1997 SGS-THOMSON Microelectronics – Printedin Italy – All RightsReserved The SoundRetrieval System and are registered trademarks of SRS Labs, Inc. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - HongKong - Italy- Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore- Spain - Sweden - Switzerland - Taiwan- Thailand - United Kingdom- U.S.A. 11/11