TDA7566 MULTIFUNCTION QUAD POWER AMPLIFIER WITH BUILT-IN DIAGNOSTICS FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ DMOS POWER OUTPUT HIGH OUTPUT POWER CAPABILITY 4x25W/ 4Ω @ 14.4V, 1KHZ, 10% THD, 4x35W EIAJ MAX. OUTPUT POWER 4x60W/2W FULL I2C BUS DRIVING:- ST-BYINDEPENDENT FRONT/REAR SOFT PLAY/ MUTE- SELECTABLE GAIN 26dB - 12dB- I2C BUS DIGITAL DIAGNOSTICS FULL FAULT PROTECTION DC OFFSET DETECTION FOUR INDEPENDENT SHORT CIRCUIT PROTECTION CLIPPING DETECTOR (1%/10%) ESD PROTECTION MULTIPOWER BCD TECHNOLOGY MOSFET OUTPUT POWER STAGE FLEXIWATT25 ORDERING NUMBER: TDA7566 a very low distortion allowing a clear powerful sound. This device is equipped with a full diagnostics array that communicates the status of each speaker through the I2C bus. DESCRIPTION The TDA7566 is a new BCD technology QUAD BRIDGE type of car radio amplifier in Flexiwatt25 package specially intended for car radio applications. The possibility to control the configuration and behaviour of the device by means of the I2C bus makes TDA7566 a very flexible machine. Thanks to the DMOS output stage the TDA7566 has BLOCK DIAGRAM CLK REFERENCE IN RF THERMAL PROTECTION & DUMP VCC1 DATA VCC2 I2C BUS CD_OUT CLIP DETECTOR MUTE1 MUTE2 F OUT RF+ 12/26dB OUT RF- IN RR SHORT CIRCUIT PROTECTION & DIAGNOSTIC R OUT RR+ 12/26dB OUT RR- IN LF SHORT CIRCUIT PROTECTION & DIAGNOSTIC F OUT LF+ 12/26dB OUT LF- IN LR SHORT CIRCUIT PROTECTION & DIAGNOSTIC R OUT LR+ 12/26dB OUT LRSHORT CIRCUIT PROTECTION & DIAGNOSTIC SVR D00AU1229 September 2003 AC_GND RF RR LF LR TAB S_GND PW_GND 1/19 TDA7566 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vop Operating Supply Voltage 18 V VS DC Supply Voltage 28 V Peak Supply Voltage (for t = 50ms) 50 V CK pin Voltage 6 V Data Pin Voltage 6 V IO Output Peak Current (not repetitive t = 100µs) 8 A IO Output Peak Current (repetitive f > 10Hz) 6 A 85 W -55 to 150 °C Value Unit 1 °C/W Vpeak VCK VDATA Ptot Tstg, Tj Power Dissipation Tcase = 70°C Storage and Junction Temperature THERMAL DATA Symbol Rth j-case Description Thermal Resistance Junction-case Max. PIN CONNECTION (top view) 25 DATA 24 PW_GND RR 23 OUT RR- 22 CK OUT RR+ 20 VCC2 19 OUT RF- 18 PW_GND RF 17 OUT RF+ 16 AC GND 15 IN RF 14 IN RR 13 S GND 12 IN LR 11 IN LF 10 SVR 9 OUT LF+ 8 PW_GND LF 7 OUT LF- 6 VCC1 OUT LR+ 4 CD-OUT 3 OUT LR- 2 PW_GND LR 1 TAB D99AU1037 2/19 TDA7566 Figure 1. Test and Application Circuit C8 0.1µF C7 3300µF Vcc1 Vcc2 6 DATA 20 17 18 25 I2C BUS 19 CLK 22 21 C1 0.22µF IN RF 23 C2 0.22µF 9 14 + OUT RR + 8 7 C3 0.22µF IN LF OUT RF 24 15 IN RR + 11 5 OUT LF + 2 C4 0.22µF IN LR 12 S-GND 13 3 16 10 4 1 OUT LR TAB 47K C5 1µF C6 10µF V D00AU1212 CD OUT 3/19 TDA7566 ELECTRICAL CHARACTERISTICS (Refer to the test circuit, VS = 14.4V; RL = 4Ω; f = 1KHz; GV = 26dB; Tamb = 25°C; unless otherwise specified.) Symbol Parameter POWER AMPLIFIER Supply Voltage Range VS Id Total Quiescent Drain Current Output Power PO THD Total Harmonic Distortion Test Condition Min. CT Cross Talk Input Impedance Voltage Gain 1 Voltage Gain Match 1 Voltage Gain 2 Output Noise Voltage 1 EIN2 Output Noise Voltage 2 SVR Supply Voltage Rejection BW ASB ISB AM VOS Power Bandwidth Stand-by Attenuation Stand-by Current Mute Attenuation VAM TON TOFF CDLK Offset Voltage Min. Supply Voltage Threshold Turn on Delay Turn off Delay Clip Det High Leakage Current 4/19 Clip Det Sat. Voltage Clip Det THD level 18 V 300 mA W EIAJ (VS = 13.7V) 32 150 35 THD = 10% THD = 1% RL = 2Ω; EIAJ (VS = 13.7V) RL = 2Ω; THD 10% RL = 2Ω; THD 1% RL = 2Ω; MAX POWER PO = 1W to 10W; 22 16 50 32 25 55 25 20 55 38 30 60 f = 1KHz to 10KHz, RG = 600W Unit W W W W W W 0.04 0.1 % 0.02 0.05 % KΩ dB dB dB 50 60 60 25 -1 100 26 0 12 130 27 1 Rg = 600Ω; 20Hz to 22kHz 35 100 Rg = 600Ω; GV = 12dB; 20Hz to 22kHz f = 100Hz to 10kHz; Vr = 1Vpk; Rg = 600Ω 12 µV 60 dB 110 25 100 100 KHz dB µA dB -100 7 0 7.5 20 20 0 100 8 50 50 15 mV V ms ms µA 0 5 1 10 300 2 15 mV % % 1.2 V 50 100 90 80 Mute & Play D2/D1 (IB1) 0 to 1 D2/D1 (IB1) 1 to 0 CD off CD on; ICD = 1mA D0 (IB1) = 0 D0 (IB1) = 1 TURN ON DIAGNOSTICS 1 (Power Amplifier Mode) Pgnd Short to GND det. (below this Power Amplifier in st-by limit, the Output is considered in Short Circuit to GND) Pvs Short to Vs det. (above this limit, the Output isconsidered in Short Circuit to VS) Pnop Normal operation thresholds.(Within these limits, the Output is considered without faults). Lsc Shorted Load det. Lop Open Load det. Lnop Normal Load det. CDSAT CDTHD Max. 8 GV = 12dB; VO = 0.1 to 5VRMS RIN GV1 ∆GV1 GV2 EIN1 Typ. dB Vs -1.2 1.8 85 1.65 µV V Vs -1.8 V 0.5 Ω Ω Ω 45 TDA7566 ELECTRICAL CHARACTERISTICS (continued) (Refer to the test circuit, VS = 14.4V; RL = 4Ω; f = 1KHz; GV = 26dB; Tamb = 25°C; unless otherwise specified.) Symbol Parameter Test Condition TURN ON DIAGNOSTICS 2 (Line Driver Mode) Pgnd Short to GND det. (below this Power Amplifier in st-by limit, the Output is considered in Short Circuit to GND) Pvs Short to Vs det. (above this limit, the Output isconsidered in Short Circuit to VS) Pnop Normal operation thresholds. (Within these limits, the Output is considered without faults). Lsc Shorted Load det. Lop Open Load det. Lnop Normal Load det. PERMANENT DIAGNOSTICS 2 (Power Amplifier Mode or Line Driver Mode) Pgnd Short to GND det. (below this Power Amplifier in Mute or Play, limit, the Output is considered in one or more short circuits Short Circuit to GND) protection activated Pvs Short to Vs det. (above this limit, the Output is considered in Short Circuit to VS) Pnop Normal operation thresholds.(Within these limits, the Output is considered without faults). Shorter Load det. Power Amplifier mode LSC Line Driver mode Offset Detection Power Amplifier in play, AC Input VO signals = 0 INL Normal load current detection VO < (VS - 5)pk IOL Open load current detection Min. Typ. Max. Unit 1.2 V Vs -1.2 V 1.8 330 7 Vs -1.8 V 2 180 Ω Ω Ω 1.2 V Vs -1.2 V 1.8 Vs -1.8 V 1.5 0.5 2 2.5 Ω Ω V 500 mA 2 250 mA 2 I C BUS INTERFACE Clock Frequency fSCL VIL Input Low Voltage VIH Input High Voltage 400 1.5 2.3 KHz V V 5/19 TDA7566 Figure 2. Quiescent Current vs. Supply Voltage Figure 5. Distortion vs. Output Power (4Ω) THD (%) Id (mA) 10 250 230 Vin = 0 NO LOADS 210 Vs = 14.4 V RL = 4 Ohm 190 1 170 150 f = 10 KHz 130 0.1 110 f = 1 KHz 90 70 50 8 10 12 Vs (V) 14 16 18 Figure 3. Output Power vs. Supply Voltage (4Ω) 0.01 0.1 1 10 Po (W) Figure 6. Distortion vs. Output Power (2Ω) THD (%) Po (W) 10 70 65 60 Po-max 55 Vs = 14.4 V RL = 2 Ohm RL = 4 Ohm f = 1 KHz 50 1 45 THD= 10 % 40 f = 10 KHz 35 30 f = 1 KHz 0.1 25 20 THD= 1 % 15 10 5 8 9 10 11 12 13 Vs (V) 14 15 16 17 18 0.01 0.1 10 Po (W) Figure 4. Output Power vs. Supply Voltage (2Ω) Figure 7. Distortion vs. Frequency (4Ω) Po (W) 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 1 THD (%) 10 Po-max Vs = 14.4 V RL = 4 Ohm Po = 4 W RL = 2 Ohm f = 1 KHz 1 THD= 10 % 0.1 THD= 1 % 8 6/19 9 10 11 12 Vs (V) 13 14 15 16 0.01 10 100 f (Hz) 1000 10000 TDA7566 Figure 8. Distortion vs. Frequency (2W) Figure 11. Power Dissipation & Efficiency vs. Output Power (4Ω, SINE) THD (%) n (%) Ptot (W) 10 90 90 80 Vs = 14.4 V RL = 2 Ohm Po = 8 W 70 1 80 n Vs = 14.4 V RL = 4x4 Ohm f= 1 KHz SINE 70 60 60 50 50 Ptot 0.1 0.01 10 100 1000 10000 40 40 30 30 20 20 10 10 0 0 f (Hz) 2 4 6 8 10 12 14 Po (W) 16 18 20 22 24 0 26 Figure 12. Power Dissipation vs. Average Ouput Power (Audio Program Simulation, 4Ω) Figure 9. Crosstalk vs. Frequency Ptot (W) CROSSTALK (dB) 45 90 40 80 Vs = 14.4 V RL = 4x4 Ohm GAUSSIAN NOISE 35 70 CLIP START 30 60 Vs = 14.4 V RL = 4 Ohm Po = 4 W Rg = 600 Ohm 50 25 20 40 15 30 10 20 10 5 100 f (Hz) 1000 10000 0 2 3 4 5 Po (W) Figure 10. Supply Voltage Rejection vs. Freq. Figure 13. Power Dissipation vs. Average Ouput Power (Audio Program Simulation, 2Ω) SVR (dB) Ptot (W) 90 90 80 80 Vs = 14.4 V RL = 4x2 Ohm GAUSSIAN NOISE 70 70 60 60 50 50 40 40 1 CLIP START 30 Rg = 600 Ohm Vripple = 1 Vpk 20 30 20 10 10 0 100 f (Hz) 1000 10000 0 1 2 3 4 Po (W) 5 6 7 8 7/19 TDA7566 DIAGNOSTICS FUNCTIONAL DESCRIPTION: a) TURN-ON DIAGNOSTIC. It is activated at the turn-on (stand-by out) under I2Cbus request. Detectable output faults are: - SHORT TO GND - SHORT TO Vs - SHORT ACROSS THE SPEAKER - OPEN SPEAKER To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (fig. 14) is internally generated, sent through the speaker(s) and sunk back.The Turn On diagnostic status is internally stored until a successive diagnostic pulse is requested (after a I2C reading). If the "stand-by out" and "diag. enable" commands are both given through a single programming step, the pulse takes place first (power stage still in stand-by mode, low, outputs = high impedance). Afterwards, when the Amplifier is biased, the PERMANENT diagnostic takes place. The previous Turn On state is kept until a short appears at the outputs. Figure 14. Turn - On diagnostic: working principle Vs~5V Isource I (mA) Isource Isink CH+ CH- Isink ~100ms t (ms) Measure time Fig. 15 and 16 show SVR and OUTPUT waveforms at the turn-on (stand-by out) with and without TURN-ON DIAGNOSTIC. Figure 15. SVR and Output behaviour (CASE 1: without turn-on diagnostic) Vsvr Out Permanent diagnostic acquisition time (100mS Typ) Bias (power amp turn-on) Diagnostic Enable (Permanent) t FAULT event Permanent Diagnostics data (output) permitted time I2CB DATA 8/19 Read Data TDA7566 Figure 16. SVR and Output pin behaviour (CASE 2: with turn-on diagnostic) Vsvr Out Turn-on diagnostic acquisition time (100mS Typ) Permanent diagnostic acquisition time (100mS Typ) t Turn-on Diagnostics data (output) permitted time Diagnostic Enable (Turn-on) Bias (power amp turn-on) permitted time FAULT event Diagnostic Enable (Permanent) Read Data Permanent Diagnostics data (output) permitted time I2CB DATA The information related to the outputs status is read and memorized at the end of the current pulse top. The acquisition time is 100 ms (typ.). No audible noise is generated in the process. As for SHORT TO GND / Vs the fault-detection thresholds remain unchanged from 26 dB to 12 dB gain setting. They are as follows: S.C. to GND 0V x 1.2V Normal Operation 1.8V x VS-1.8V S.C. to Vs VS-1.2V D01AU1253 VS Concerning SHORT ACROSS THE SPEAKER / OPEN SPEAKER, the threshold varies from 26 dB to 12 dB gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The values in case of 26 dB gain are as follows: S.C. across Load 0V x 0.5Ω Normal Operation 1.5Ω x Open Load 130Ω 70Ω Infinite D01AU1254 If the Line-Driver mode (Gv= 12 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will change as follows: S.C. across Load 0Ω 1.5Ω x Normal Operation 4.5Ω 200Ω x Open Load 400Ω infinite D01AU1252 9/19 TDA7566 b) PERMANENT DIAGNOSTICS. Detectable conventional faults are: - SHORT TO GND - SHORT TO Vs - SHORT ACROSS THE SPEAKER The following additional features are provided: - OUTPUT OFFSET DETECTION - AC DIAGNOSTIC The TDA7566 has 2 operating statuses: 1 RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each other. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output status is made every 1 ms (fig. 17). Restart takes place when the overload is removed. 2 DIAGNOSTIC mode. It is enabled via I2C bus and self activates if an output overload (such to cause the intervention of the short-circuit protection) occurs to the speakers outputs . Once activated, the diagnostics procedure develops as follows (fig. 18): – To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and the channel returns back active. – Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration of about 100 ms is started. – After a diagnostic cycle, the audio channel interested by the fault is switched to RESTART mode. The relevant data are stored inside the device and can be read by the microprocessor. When one cycle has terminated, the next one is activated by an I2C reading. This is to ensure continuous diagnostics throughout the car-radio operating time. – To check the status of the device a sampling system is needed. The timing is chosen at microprocessor level (over half a second is recommended). Figure 17. Restart timing without Diagnostic Enable (Permanent) Each 1ms time, a sampling of the fault is done Out 1mS 1-2mS 1mS 1mS 1mS t Overcurrent and short circuit protection intervention (i.e. short circuit to GND) Short circuit removed Figure 18. Restart timing with Diagnostic Enable (Permanent) 1mS 100mS 1mS 1mS t Overcurrent and short Short circuit removed (i.e. short circuit to GND) 10/19 TDA7566 OUTPUT DC OFFSET DETECTION. Any DC output offset exceeding ±2V are signalled out. This inconvenient might occur as a consequence of initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the speakers at risk of overheating. This diagnostic has to be performed with low-level output AC signal (or Vin = 0). The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command): START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1 STOP = Actual reading operation Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process. AC DIAGNOSTIC. It is targeted at detecting accidental disconnection of tweeters in 2-way speaker and, more in general, presence of capacitively (AC) coupled loads. This diagnostic is based on the notion that the overall speaker's impedance (woofer + parallel tweeter) will tend to increase towards high frequencies if the tweeter gets disconnected, because the remaining speaker (woofer) would be out of its operating range (high impedance). The diagnostic decision is made according to peak output current thresholds, as follows: Iout > 500mApk = NORMAL STATUS Iout < 250mApk = OPEN TWEETER To correctly implement this feature, it is necessary to briefly provide a signal tone (with the amplifier in "play") whose frequency and magnitude are such to determine an output current higher than 500mApk in normal conditions and lower than 250mApk should the parallel tweeter be missing. The test has to last for a minimum number of 3 sine cycles starting from the activation of the AC diagnostic function IB2<D2>) up to the I2C reading of the results (measuring period). To confirm presence of tweeter, it is necessary to find at least 3 current pulses over 500mA over all the measuring period, else an "open tweeter" message will be issued. The frequency / magnitude setting of the test tone depends on the impedance characteristics of each specific speaker being used, with or without the tweeter connected (to be calculated case by case). High-frequency tones (> 10 KHz) or even ultrasonic signals are recommended for their negligible acoustic impact and also to maximize the impedance module's ratio between with tweeter-on and tweeter-off. Fig. 19 shows the Load Impedance as a function of the peak output voltage and the relevant diagnostic fields. This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process. Figure 19. Current detection: Load impedance magnitude |Z| Vs. output peak voltage of the sinus Load |z| (Ohm) 50 Iout (peak) <250mA 30 20 Low current detection area (Open load) D5 = 1 of the DBx byres Iout (peak) >500mA 10 High current detection area (Normal load) D5 = 0 of the DBx bytes 5 3 2 1 1 2 3 4 5 6 7 8 Vout (Peak) 11/19 TDA7566 MULTIPLE FAULTS. When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one of them is initially read out. The others are notified after successive cycles of I2C reading and faults removal, provided that the diagnostic is enabled. This is true for both kinds of diagnostic (Turn on and Permanent). The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit with the 4 ohm speaker unconnected is considered as double fault. Double fault table for Turn On Diagnostic S. GND (so) S. GND (sk) S. Vs S. Across L. Open L. S. GND (so) S. GND S. GND S. Vs + S. GND S. GND S. GND S. GND (sk) / S. GND S. Vs S. GND Open L. (*) S. Vs / / S. Vs S. Vs S. Vs S. Across L. / / / S. Across L. N.A. Open L. / / / / Open L. (*) S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted to ground (test-current source side= so, test-current sink side = sk). More precisely, in channels LF and LR, so = CH+, sk = CH-; in channels LR and RF, so = CH-, SK = CH+. In Permanent Diagnostic the table is the same, with only a difference concerning Open Load (*), which is not among the recognisable faults. Should an Open Load be present during the device's normal working, it would be detected at a subsequent Turn on Diagnostic cycle (i.e. at the successive Car Radio Turn on). FAULTS AVAILABILITY All the results coming from I2Cbus, by read operations, are the consequence of measurements inside a defined period of time. If the fault is stable throughout the whole period, it will be sent out. This is true for DC diagnostic (Turn on and Permanent), for Offset Detector, for AC Diagnostic (the low current sensor needs to be stable to confirm the Open tweeter). To guarantee always resident functions, every kind of diagnostic cycles (Turn on, Permanent, Offset, AC) will be reactivate after any I2C reading operation. So, when the micro reads the I2C, a new cycle will be able to start, but the read data will come from the previous diag. cycle (i.e. The device is in Turn On state, with a short to Gnd, then the short is removed and micro reads I2C. The short to Gnd is still present in bytes, because it is the result of the previous cycle. If another I2C reading operation occurs, the bytes do not show the short). In general to observe a change in Diagnostic bytes, two I2C reading operations are necessary. I2C PROGRAMMING/READING SEQUENCE A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as follows (after battery connection): TURN-ON: (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN) Car Radio Installation: DIAG ENABLE (write) --- 200 ms --- I2C read (repeat until All faults disappear). AC TEST: FEED H.F. TONE -- AC DIAG ENABLE (write) --- WAIT > 3 CYCLES --- I2C read (repeat I2C reading until tweeter-off message disappears). OFFSET TEST: Device in Play (no signal) -- OFFSET ENABLE - 30ms - I2C reading (repeat I2C reading until high-offset message disappears). 12/19 TDA7566 I2C BUS INTERFACE Data transmission from microprocessor to the TDA7566 and viceversa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). Data Validity As shown by fig. 20, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. Start and Stop Conditions As shown by fig. 21 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. Byte Format Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first. Acknowledge The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 22). The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that the SDAline is stable LOW during this clock pulse. * Transmitter master (µP) when it writes an address to the TDA7566 slave (TDA7566) when the µP reads a data byte from TDA7566 ** Receiver slave (TDA7566) when the µP writes an address to the TDA7566 master (µP) when it reads a data byte from TDA7566 Figure 20. Data Validity on the I2C BUS SDA SCL DATA LINE STABLE, DATA VALID CHANGE DATA ALLOWED D99AU1031 Figure 21. SCL I2CBUS SDA D99AU1032 START STOP Figure 22. SCL 1 2 3 7 8 9 SDA MSB START D99AU1033 ACKNOWLEDGMENT FROM RECEIVER 13/19 TDA7566 SOFTWARE SPECIFICATIONS All the functions of the TDA7566 are activated by I2C interface. The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from µP to TDA7566) or read instruction (from TDA7566 to µP). Chip Address: D7 1 D0 1 0 1 1 X = 0 Write to device X = 1 Read from device If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2. IB1 D7 X D6 Diagnostic enable (D6 = 1) Diagnostic defeat (D6 = 0) D5 Offset Detection enable (D5 = 1) Offset Detection defeat (D5 = 0) D4 Front Channel Gain = 26dB (D4 = 0) Gain = 12dB (D4 = 1) D3 Rear Channel Gain = 26dB (D3 = 0) Gain = 12dB (D3 = 1) D2 Mute front channels (D2 = 0) Unmute front channels (D2 = 1) D1 Mute rear channels (D1 = 0) Unmute rear channels (D1 = 1) D0 CD 2% (D0 = 0) CD 10% (D0 = 1) D7 X D6 used for testing D5 used for testing D4 Stand-by on - Amplifier not working - (D4 = 0) Stand-by off - Amplifier working - (D4 = 1) D3 Power amplifier mode diagnostic (D3 = 0) Line driver mode diagnostic (D3 = 1) D2 Current detection diagnostic enabled (D2 = 1) Current detection diagnostic defeat (D2 = 0) D1 X D0 X IB2 14/19 0 0 X D8 Hex TDA7566 If R/W = 1, the TDA7566 sends 4 "Diagnostics Bytes" to mP: DB1, DB2, DB3 and DB4. DB1 D7 Thermal warning active (D7 = 1) D6 Diag. cycle not activated or not terminated (D6 = 0) Diag. cycle terminated (D6 = 1) D5 Channel LF current detection Output peak current < 250mA - Open load (D5 = 1) Output peak current > 500mA - Open load (D5 = 0) D4 Channel LF Turn-on diagnostic (D4 = 0) Permanent diagnostic (D4 = 1) D3 Channel LF Normal load (D3 = 0) Short load (D3 = 1) D2 Channel LF Turn-on diag.: No open load (D2 = 0) Open load detection (D2 = 1) Offset diag.: No output offset (D2 = 0) Output offset detection (D2 = 1) D1 Channel LF No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) D0 Channel LF No short to GND (D1 = 0) Short to GND (D1 = 1) D7 Offset detection not activated (D7 = 0) Offset detection activated (D7 = 1) D6 Current sensor not activated (D6 = 0) Current sensor activated (D6 = 1) D5 Channel LR current detection Output peak current < 250mA - Open load (D5 = 1) Output peak current > 500mA - Open load (D5 = 0) D4 Channel LR Turn-on diagnostic (D4 = 0) Permanent diagnostic (D4 = 1) D3 Channel LR Normal load (D3 = 0) Short load (D3 = 1) D2 Channel LR Turn-on diag.: No open load (D2 = 0) Open load detection (D2 = 1) Permanent diag.: No output offset (D2 = 0) Output offset detection (D2 = 1) D1 Channel LR No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) D0 Channel LR No short to GND (D1 = 0) Short to GND (D1 = 1) DB2 15/19 TDA7566 DB3 D7 Stand-by status (= IB1 - D4) D6 Diagnostic status (= IB1 - D6) D5 Channel RF current detection Output peak current < 250mA - Open load (D5 = 1) Output peak current > 500mA - Open load (D5 = 0) D4 Channel RF Turn-on diagnostic (D4 = 0) Permanent diagnostic (D4 = 1) D3 Channel RF Normal load (D3 = 0) Short load (D3 = 1) D2 Channel RF Turn-on diag.: No open load (D2 = 0) Open load detection (D2 = 1) Permanent diag.: No output offset (D2 = 0) Output offset detection (D2 = 1) D1 Channel RF No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) D0 Channel RF No short to GND (D1 = 0) Short to GND (D1 = 1) D7 X D6 X D5 Channel R Rcurrent detection Output peak current < 250mA - Open load (D5 = 1) Output peak current > 500mA - Open load (D5 = 0) D4 Channel RR Turn-on diagnostic (D4 = 0) Permanent diagnostic (D4 = 1) D3 Channel RR Normal load (D3 = 0) Short load (D3 = 1) D2 Channel RR Turn-on diag.: No open load (D2 = 0) Open load detection (D2 = 1) Permanent diag.: No output offset (D2 = 0) Output offset detection (D2 = 1) D1 Channel RR No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) D0 Channel RR No short to GND (D1 = 0) Short to GND (D1 = 1) DB4 16/19 TDA7566 Examples of bytes sequence 1 - Turn-On diagnostic - Write operation Start Address byte with D0 = 0 ACK IB1 with D6 = 1 ACK IB2 ACK STOP 2 - Turn-On diagnostic - Read operation Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP The delay from 1 to 2 can be selected by software, starting from T.B.D. ms 3a - Turn-On of the power amplifier with 26dB gain, mute on, diagnostic defeat. Start Address byte with D0 = 0 ACK IB1 ACK X000000X IB2 ACK STOP ACK STOP ACK STOP XXX1X0XX 3b - Turn-Off of the power amplifier Start Address byte with D0 = 0 ACK IB1 ACK X0XXXXXX IB2 XXX0XXXX 4 - Offset detection procedure enable Start Address byte with D0 = 0 ACK IB1 ACK XX1XX11X IB2 XXX1X0XX 5 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits (D2 of the bytes DB1, DB2, DB3, DB4). Start ■ ■ Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by input capacitor with anomalous leackage current or humidity between pins. The delay from 4 to 5 can be selected by software, starting from T.B.D. ms 6 - Current detection procedure start (the AC inputs must be with a proper signal that depends on the type of load) Start Address byte with D0 = 0 ACK IB1 ACK XX01111X IB2 ACK STOP XXX1X1XX 7 - Current detection reading operation (the results valid only for the current sensor detection bits - D5 of the bytes DB1, DB2, DB3, DB4). Start ■ ■ Address byte with D0 = 1 ACK DB1 ACK DB2 ACK DB3 ACK DB4 ACK STOP During the test, a sinus wave with a proper amplitude and frequency (depending on the loudspeaker under test) must be present. The minimum number of periods that are needed to detect a normal load is 5. The delay from 6 to 7 can be selected by software, starting from T.B.D. ms. 17/19 TDA7566 DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3 MIN. 4.45 1.80 0.75 0.37 0.80 23.75 28.90 22.07 18.57 15.50 7.70 3.70 3.60 mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 24.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50 MAX. 4.65 2.00 MIN. 0.175 0.070 1.05 0.42 0.57 1.20 24.25 29.30 0.029 0.014 0.031 0.935 1.139 22.87 19.37 15.90 7.95 0.869 0.731 0.610 0.303 4.30 4.40 0.145 0.142 inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 0.945 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019 MAX. 0.183 0.079 OUTLINE AND MECHANICAL DATA 0.041 0.016 0.022 0.047 0.955 1.153 0.904 0.762 0.626 0.313 0.169 0.173 Flexiwatt25 (vertical) 5˚ (T p.) 3˚ (Typ.) 20˚ (Typ.) 45˚ (Typ.) (1): dam-bar protusion not included (2): molding protusion included V C B V H H1 V3 A H2 O H3 R3 L4 R4 V1 R2 L2 N L3 R L L1 V1 V2 R2 D R1 L5 Pin 1 R1 R1 E G G1 F FLEX25ME M M1 7034862 18/19 TDA7566 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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