Revised March 2005 74F245 Octal Bidirectional Transceiver with 3-STATE Outputs General Description Features The 74F245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 24 mA at the A Ports and 64 mA at the B Ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active HIGH) enables data from A Ports to B Ports; Receive (active LOW) enables data from B Ports to A Ports. The Output Enable input, when HIGH, disables both A and B Ports by placing them in a High Z condition. ■ Non-inverting buffers ■ Bidirectional data path ■ A outputs sink 24 mA ■ B outputs sink 64 mA Ordering Code: Order Number Package Number Package Description 74F245SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74F245SC_NL (Note 1) M20B Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F245SJ 74F245MSA MSA20 74F245MTC MTC20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74F245PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 74F245PC_NL (Note 1) N20A Pb-Free 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Please use order number as indicated. Logic Symbols © 2005 Fairchild Semiconductor Corporation IEEE/IEC DS009503 www.fairchildsemi.com 74F245 Octal Bidirectional Transceiver with 3-STATE Outputs April 1988 74F245 Connection Diagram Unit Loading/Fan Out Pin Names U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL Description OE Output Enable Input (Active LOW) 1.0/2.0 20 PA/1.2 mA T/R Transmit/Receive Input 1.0/2.0 20 PA/1.2 mA A0–A7 Side A Inputs or 3-STATE Outputs B0–B7 Side B Inputs or 3.5/1.083 70 PA/0.65 mA 150/40(38.3) 3 mA/24 mA (20 mA) 3.5/1.083 70 PA/0.65 mA 600/106.6(80) 12 mA/64 mA (48 mA) 3-STATE Outputs Truth Table Inputs Output OE T/R L L Bus B Data to Bus A L H Bus A Data to Bus B H X High Z State H HIGH Voltage Level L LOW Voltage Level X Immaterial www.fairchildsemi.com 2 Recommended Operating Conditions 65qC to 150qC 55qC to 125qC 55qC to 150qC 0.5V to 7.0V 0.5V to 7.0V 30 mA to 5.0 mA Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 3) Input Current (Note 3) 0qC to 70qC 4.5V to 5.5V Free Air Ambient Temperature Supply Voltage Voltage Applied to Output in HIGH State (with VCC 0V) 0.5V to VCC 0.5V to 5.5V Standard Output 3-STATE Output Note 2: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output in LOW State (Max) Note 3: Either voltage limit or current limit is sufficient to protect inputs. twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V DC Electrical Characteristics Symbol Parameter Min Typ Max Input HIGH Voltage VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage 1.2 V VOH Output HIGH Voltage VOL Output LOW Voltage IIH Input HIGH Current IBVI 2.0 Units VIH 10% VCC 2.4 10% VCC 2.0 5% VCC 2.7 VCC V V 10% VCC 0.5 10% VCC 0.55 Conditions Recognized as a HIGH Signal Recognized as a LOW Signal Min Min 18 mA IIN IOH 3 mA (An) IOH 15 mA (Bn) IOH 3 mA (An) IOL 24 mA (An) V Min IOL 64 mA (Bn) 5.0 PA Max VIN 2.7V Input HIGH Current Breakdown Test 7.0 PA Max VIN 7.0V (OE, T/R) IBVIT Input HIGH Current Breakdown (I/O) 0.5 mA Max VIN 5.5 V (An, Bn) ICEX Output HIGH Leakage Current 50 PA Max VOUT VID Input Leakage Test IOD 4.75 Output Leakage Circuit Current V 0.0 3.75 PA 0.0 VCC (An, Bn) 1.9 PA IID All Other Pins Grounded VIOD 150 mV All Other Pins Grounded IIL Input LOW Current 1.2 mA Max VIN IIH IOZH Output Leakage Current 70 PA Max VOUT 2.7V (An, Bn) IIL IOZL Output Leakage Current 650 PA Max VOUT 0.5V (An, Bn) IOS Output Short-Circuit Current VOUT 0V (An) VOUT 0V (Bn) 60 150 100 225 0.5V (T/R, OE) mA Max 500 PA 0.0V VOUT IZZ Bus Drainage Test ICCH Power Supply Current 70 90 mA Max VO HIGH ICCL Power Supply Current 95 120 mA Max VO LOW ICCZ Power Supply Current 85 110 mA Max VO HIGH Z 3 5.25V(An, Bn) www.fairchildsemi.com 74F245 Absolute Maximum Ratings(Note 2) 74F245 AC Electrical Characteristics TA Symbol VCC Parameter CL 25qC TA 5.0V 55qC to 125qC CL 50 pF 0qC to 70qC TA CL 50 pF Min Typ Max Min Max Min Max tPLH Propagation Delay 2.5 4.2 6.0 2.0 7.5 2.0 7.0 tPHL An to Bn or Bn to An 2.5 4.2 6.0 2.0 7.5 2.0 7.0 tPZH Output Enable Time 3.0 5.3 7.0 2.5 9.0 2.5 8.0 3.5 6.0 8.0 3.0 10.0 3.0 9.0 tPZL tPHZ Output Disable Time tPLZ www.fairchildsemi.com Units 50 pF 2.0 5.0 6.5 2.0 9.0 2.0 7.5 2.0 5.0 6.5 2.0 10.0 2.0 7.5 4 ns ns 74F245 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com 74F245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6 74F245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package Number MSA20 7 www.fairchildsemi.com 74F245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 www.fairchildsemi.com 8 74F245 Octal Bidirectional Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 9 www.fairchildsemi.com