TSC TSM2N7002EDCU6

TSM2N7002ED
50V Dual N-Channel Enhancement Mode MOSFET
Pin assignment:
1. Source (2)
6. Drain (2)
2. Gate (2)
5. Gate (1)
3. Drain (1)
4. Source (1)
VDS = 50V
RDS (on), Vgs @ 10V, Ids @ 250mA = 3Ω
RDS (on), Vgs @ 5V, Ids @ 50mA = 4Ω
Features
Ordering Information
Part No.
Dual N-channel in package.
TSM2N7002EDCU6
Advanced trench process technology
High density cell design for ultra low on-resistance
Packing
Package
T & R (3kpcs/Rell) SOT-363
Block Diagram
High input impedance
High speed switching
No minority carrier storage time
CMOS logic compatible input
No secondary breakdown
Compact and low profile SOT-363 package
Absolute Maximum Rating (Ta = 25oC unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
VDS
50
V
Gate-Source Voltage
VGS
± 20
V
Continuous Drain Current
ID
250
mA
Pulsed Drain Current
IDM
1.0
A
PD
200
mW
Maximum Power Dissipation
Ta = 25 oC
o
Ta = 75 C
Operating Junction Temperature
Operating Junction and Storage Temperature Range
150
TJ
+150
o
C
TJ, TSTG
- 55 to +150
o
C
Symbol
Limit
Unit
TL
5
S
Rθja
625
Thermal Performance
Parameter
Lead Temperature (1/8” from case)
Junction to Ambient Thermal Resistance (PCB mounted)
Note: Surface mounted on FR4 board t<=5sec.
TSM2N7002ED
1-5
2004/12 rev. B
o
C/W
Electrical Characteristics (Single Channel)
Tj = 25 oC unless otherwise noted
Parameter
Conditions
Symbol
Min
Typ
Max
Unit
Static
Drain-Source Breakdown Voltage
VGS = 0V, ID = 10uA
BVDSS
50
--
--
V
Drain-Source On-State Resistance
VGS = 10V, ID = 250mA
RDS(ON)
--
--
3
Ω
Drain-Source On-State Resistance
VGS = 5V, ID = 50mA
RDS(ON)
--
--
4
Gate Threshold Voltage
VDS = VGS, ID = 250uA
VGS(TH)
1.0
2.0
2.5
V
Zero Gate Voltage Drain Current
VDS = 50V, VGS = 0V
IDSS
--
--
1.0
uA
Gate Body Leakage
VGS = ± 20V, VDS = 0V
IGSS
--
--
± 100
nA
On-State Drain Current
VDS ≧ 7V, VGS = 10V
ID(ON)
500
--
--
mA
Forward Transconductance
VDS = 7V, ID = 200mA
gfs
80
--
--
mS
TD(ON)
--
7.5
20
tr
--
6
--
TD(OFF)
--
7.5
20
tf
--
3
--
Dynamic *
Turn-On Delay Time
VDD = 30V,
Turn-On Rise Time
ID = 100mA, VGEN = 10V,
Turn-Off Delay Time
RG = 10Ω
Turn-Off Fall Time
nS
Input Capacitance
VDS = 25V, VGS = 0V,
Ciss
--
19
50
Output Capacitance
f = 1.0MHz
Coss
--
10
25
Crss
--
3
5
IS
--
--
115
mA
VSD
--
0.76
1.5
V
Reverse Transfer Capacitance
pF
Source-Drain Diode
Max. Diode Forward Current
Diode Forward Voltage
IS = 115mA, VGS = 0V
Note : pulse test: pulse width <=300uS, duty cycle <=2%
* Guaranteed by design, not subject to production testing.
TSM2N7002ED
2-5
2004/12 rev. B
Typical Characteristics Curve - Single Channel (Ta = 25 oC unless otherwise noted)
Output Characteristic
Drain Current (A)
Drain Current (A)
Transfer Characteristics
Drain to source voltage (V)
Gate to source voltage (V)
Rds(on) Variation with Drain Current
Capacitance (pF)
Drain to source resistance (Ω)
Capacitance
Drain current (A)
Drain to source voltage (V)
Vds breakdown with Temperature
Gate –source threshold voltage (V)
Drain –source breakdown voltage (V)
Vgs(th) with Temperature
o
Junction temperature ( C)
TSM2N7002ED
Junction temperature (oC)
3-5
2004/12 rev. B
Typical Characteristics Curve (Ta = 25 oC unless otherwise noted)
Body Diode Forward Voltage
Transconductance (S)
Source-drain Current (A)
Transconductance Variation
Body diode forward voltage (V)
Drain to source current (A)
Maximum Safe Operating Area
Drain Current (A)
Gate –source voltage (V)
Gate Charge
Total gate charge (nC)
Drain-source voltage (V)
Transient thermal impedance r(t)
Normalized Thermal Transient Impedance Curve
Square wave pulse duration (S)
TSM2N7002ED
4-5
2004/12 rev. B
SOT-363 Mechanical Drawing
DIM
A
A1
bp
C
D
E
e
e1
He
Lp
Q
W
Θ
TSM2N7002ED
5-5
SOT-363 DIMENSION
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
0.80
1.10
0.031
0.043
-0.10
-0.004
0.10
0.30
0.004
0.012
0.10
0.25
0.004
0.010
1.80
2.20
0.071
0.087
1.15
1.35
0.045
0.053
1.30 (typ)
0.052 (typ)
0.65 (typ)
0.026(typ)
2.00
2.20
0.079
0.087
0.10
0.3
0.004
0.012
0.20 (typ)
0.008 (typ)
0.20 (typ)
0.008 (typ)
10o (typ)
10o (typ)
2004/12 rev. B