UTC-IC US112N

UTC US112S/N
SCR
SCRs
DESCRIPTION
The UTC US112S/N is suitable to fit all modes of
control found in applications such as overvoltage
crowbar protection, motor control circuits in power
tools and kitchen aids, in-rush current limiting circuits,
capacitive discharge ignition, voltage regulation
circuits.
1
TO-220
1: CATHODE
2: ANODE
3: GATE
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
US112S
US112N
UNIT
Repetitive peak off-state voltages
US112S/N-4
US112S/N-6
US112S/N-8
RMS on-state current (180° conduction angle) (Tc = 105°C)
Average on-state current (180° conduction angle) (Tc = 105°C)
Non repetitive surge peak on-state current (Tj = 25°C)
tp=8.3ms
tp=10ms
I²t Value for fusing (tp = 10 ms, Tj = 25°C)
Critical rate of rise of on-state current
(IG = 2 x IGT , tr ≤ 100 n s, F = 60 Hz , Tj = 125°C,)
Peak gate current (tp=20µs, Tj = 125°C)
Maximum peak reverse gate voltage
Average gate power dissipation (Tj = 125°C)
Storage junction temperature range
Operating junction temperature range
UTC
VDRM
VRRM
IT(RMS)
IT(AV)
ITSM
400
600
800
12
8
V
A
A
I²t
146
140
98
A
A²S
dI/dt
50
A/µs
IGM
VRGM
PG(AV)
Tstg
Tj
4
5
1
-40 ~ +150
-40 ~ +125
UNISONIC TECHNOLOGIES CO., LTD.
A
V
W
°C
°C
1
QW-R301-013,B
UTC US112S/N
SCR
UTC US112S(SENSITIVE) ELECTRICAL CHARACTERISTICS
(Tj=25℃unless otherwise specified)
PARAMETER
SYMBOL
Gate trigger Current
Gate trigger Voltage
Gate non-trigger voltage
IGT
VGT
VGD
Reverse gate voltage
Holding Current
VRG
IH
Latching Current
Circuit Rate Of Change Of
off-state Voltage
IL
dV/dt
TEST CONDITIONS
MIN
VD = 12 V, RL =140Ω
VD = 12 V, RL=140Ω
VD = VDRM, RL = 3.3 kΩ, RGK = 1kΩ
Tj = 125°C
IRG = 10 µA
IT = 50 mA, RGK = 1 kΩ
Tj = 125°C
UNIT
µA
V
0.1
V
8
5
V
mA
6
mA
IG = 1 mA ,RGK = 1 kΩ
VD = 67 % VDRM ,RGK = 220 Ω
MAX.
200
0.8
5
V/µs
On-state voltage
VTM
ITM = 24A, tp = 380 µs, Tj = 25°C
1.6
V
Threshold Voltage
Dynamic Resistance
Vt0
Rd
Tj = 125°C
Tj = 125°C
0.85
30
V
mΩ
5
2
µA
mA
MAX.
15
UNIT
1.3
V
Off-state Leakage Current
IDRM
IRRM
VDRM = VRRM, RGK = 220 Ω
Tj = 25°C
Tj = 125°C
UTC US112N(STANDARD) ELECTRICAL CHARACTERISTICS
(Tj=25℃unless otherwise specified)
PARAMETER
SYMBOL
Gate trigger Current
Gate trigger Voltage
Gate non-trigger voltage
Holding Current
VD = 12 V, RL =33Ω
VGT
VD = 12 V, RL=33Ω
VGD
VD = VDRM, RL = 3.3 kΩ ,Tj = 125°C
IH
IL
dV/dt
Latching Current
Circuit Rate Of Change Of
off-state Voltage
On-state voltage
VTM
Vt0
Threshold Voltage
Dynamic Resistance
Rd
Off-state Leakage Current
TEST CONDITIONS
IGT
IDRM
IRRM
MIN
2
0.2
IT = 500 mA, Gate open
V
30
60
IG = 1.2 IGT
VD = 67 % VDRM , Gate open, Tj = 125°C
mA
mA
200
ITM = 24A, tp = 380 µs, Tj = 25°C
Tj = 125°C
Tj = 125°C
VDRM = VRRM,
Tj = 25°C
Tj = 125°C
mA
V/µs
1.6
0.85
V
V
30
mΩ
5
2
µA
mA
THERMAL RESISTANCES
PARAMETER
Junction to case (DC)
Junction to ambient
UTC
SYMBOL
Rth(j-c)
Rth(j-a)
VALUE
UNIT
1.3
60
KW
K/W
UNISONIC TECHNOLOGIES CO., LTD.
2
QW-R301-013,B
UTC US112S/N
12
SCR
Figure.2:Average and D.C. on-state current
vs case temperature
Figure.1:Maximum average power
dissipation vs average on-state current.
P(W)
IT(av)(A)
14
α=180°
11
10
DC
12
9
8
10
α=180°
7
8
6
5
6
4
360°
3
2
2
α
IT(av)(A)
1
0
4
Tcase(℃)
0
0
1
2
3
4
5
6
7
8
9
50
75
12
5
100
Fig.3-2:Relative variation of thermal impedance
junction to ambient vs pulseduration (recommended
pad layout,FR4 PC board)
Fig.3-1:Relative variation of thermal impedance
junction to case vs pulse duration.
1.0
25
0
1.00
K=<Zth(j-c)/Rth(j-c)>
K=<Zth(j-a)/Rth(j-a)>
0.5
0.10
0.2
tp(s)
0.1
1E-3
1E-2
1E+0
1E-1
Figure.4-1:Relative variation of gate trigger
current,holding current and latching vs
junction temperature (US112S)
2.0
tp(s)
0.01
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
Figure.4-2: Relative variation of gate trigger
current,holding current and latching current vs
junction temperature (US112N).
IGT,IH,IL(TJ)/IGT,IH,IL (TJ=25℃)
IGT,IH,IL(TJ)/IGT,IH,IL (TJ=25℃)
2.4
2.2
1.8
1.6
2.0
IGT
1.4
1.2
1.6
IH&IL
Rgk=1kΩ
1.0
1.4
1.2
0.8
1.0
0.8
0.6
IH&IL
0.6
0.4
0.4
0.2
0.0
-40
IGT
1.8
-20
0
UTC
20
40
Tj(℃)
0.2
Tj(℃)
60
80
100
120
140
0.0
-40
-20
0
20
40
60
80
100
UNISONIC TECHNOLOGIES CO., LTD.
120
140
3
QW-R301-013,B
UTC US112S/N
SCR
Figure.5:Relative variation of holding current vs
gate-cathode resistance(typical values)
(US112S)
Fig.6: Relative variation of dV/dt immunity vs gatecathode resistance(typical values) (US112S)
IH(Rgk)/IH(Rgk=1kΩ)
5.0
10.0
Ta=25℃
4.5
dV/dt(Rgk)/dV/dt(Rgk=220Ω)
Tj=125℃
VD=0.67* VDRM
4.0
3.5
3.0
1.0
2.5
2.0
1.5
1.0
Rgk(kΩ)
0.5
0.0
1E-2
1E-1
Rgk(Ω)
1E+1
1E+0
0.1
0.0
3.5
3.0
0.4
0.6
0.8
1.2
1.0
Fig.8: Surge peak on-state current vs number of cycles
Fig.7: Relative variation of dV/dt immunity vs gatecathode capacitance(typical values) (US112S)
4.0
0.2
dV/dt(Cgk)/dV/dt(Rgk=220Ω)
10.0
dV/dt(Rgk)/dV/dt(Rgk=220Ω)
Tj=125℃
VD=0.67* VDRM
VD=0.67* VDRM
Tj=125℃
Rgk=220Ω
2.5
1.0
2.0
1.5
1.0
Rgk(Ω)
0.5
0.0
Cgk(nF)
0
25
50
75
100
150
125
0.1
0.0
0.2
Fig.9:Non-repetitive surge peak on-state current for a
sinusoidal pulse with width tp<10ms, and corresponding
2
values of I t.
2
2000
0.4
1.2
1.0
2
200
Tjinitial=25℃
ITSM
1000
ITSM
Tj=max:
Vto=0.85V
Rd=30mΩ
100
US112N
US112S
dI/dt
limitation
Tj=Tjmax.
US112N
100
10
I 2t
Tj=25℃
US112S
tp(ms)
UTC
0.8
Fig.10: On-state characteristics(maximum values).
ITSM(A),I t(A s)
10
0.01
0.6
0.10
1.00
10.00
1
0.0
VTM(V)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
UNISONIC TECHNOLOGIES CO., LTD.
4.5
5.0
4
QW-R301-013,B