FAIRCHILD FQD5P10_08

QFET
®
FQD5P10 / FQU5P10
100V P-Channel MOSFET
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
•
•
•
•
•
•
•
-3.6A, -100V, RDS(on) = 1.05Ω @VGS = -10 V
Low gate charge ( typical 6.3 nC)
Low Crss ( typical 18 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
RoHS Compliant
D
D
G
S
D-PAK
FQD Series
Absolute Maximum Ratings
Symbol
VDSS
ID
G
I-PAK
G D S
FQU Series
S
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQD5P10 / FQU5P10
-100
- Continuous (TC = 100°C)
IDM
Drain Current
VGSS
Gate-Source Voltage
- Pulsed
(Note 1)
Units
V
-3.6
A
-2.28
A
-14.4
A
± 30
V
mJ
EAS
Single Pulsed Avalanche Energy
(Note 2)
55
IAR
Avalanche Current
(Note 1)
-3.6
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
2.5
-6.0
2.5
mJ
V/ns
W
25
0.2
-55 to +150
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
FQD5P10 / FQU5P10
October 2008
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
Typ
--
Max
5.0
Units
°C/W
RθJA
RθJA
Thermal Resistance, Junction-to-Ambient *
--
50
°C/W
Thermal Resistance, Junction-to-Ambient
--
110
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2008 Fairchild Semiconductor Corporation
Rev. B1, October 2008
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
-100
--
--
V
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = -250 µA, Referenced to 25°C
--
-0.1
VDS = -100 V, VGS = 0 V
--
--
-1
µA
VDS = -80 V, TC = 125°C
--
--
-10
µA
Gate-Body Leakage Current, Forward
VGS = -30 V, VDS = 0 V
--
--
-100
nA
Gate-Body Leakage Current, Reverse
VGS = 30 V, VDS = 0 V
--
--
100
nA
IDSS
IGSSF
IGSSR
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
-2.0
--
-4.0
V
RDS(on)
Static Drain-Source
On-Resistance
VGS = -10 V, ID = -1.8 A
--
0.82
1.05
Ω
gFS
Forward Transconductance
VDS = -40 V, ID = -1.8 A
--
2.3
--
S
--
190
250
pF
--
70
90
pF
--
18
25
pF
ns
(Note 4)
FQD5P10 / FQU5P10
Electrical Characteristics
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = -50 V, ID = -4.5 A,
RG = 25 Ω
(Note 4, 5)
VDS = -80 V, ID = -4.5 A,
VGS = -10 V
(Note 4, 5)
--
9
30
--
70
150
ns
--
12
35
ns
--
30
70
ns
--
6.3
8.2
nC
--
1.7
--
nC
--
3.0
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
-3.6
A
ISM
--
--
-14.4
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = -3.6 A
Drain-Source Diode Forward Voltage
--
--
-4.0
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -4.5 A,
dIF / dt = 100 A/µs
(Note 4)
--
85
--
ns
--
0.27
--
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 6.4mH, IAS = -3.6A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ -4.5A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2008 Fairchild Semiconductor Corporation
Rev. B1, October 2008
FQD5P10 / FQU5P10
Typical Characteristics
VGS
-15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-5.5 V
-5.0 V
Bottom : -4.5 V
1
10
-I D , Drain Current [A]
0
10
-I D, Drain Current [A]
1
10
Top :
-1
10
※ Note :
1. 250μ s Pulse Test
2. TC = 25℃
25℃
※ Notes :
1. VDS = -40V
2. 250μ s Pulse Test
-55℃
-2
10
150℃
0
10
-1
-1
0
10
10
1
10
10
2
4
6
8
10
-VGS , Gate-Source Voltage [V]
-VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
2.5
1
-I DR , Reverse Drain Current [A]
VGS = - 10V
2.0
VGS = - 20V
1.5
1.0
0.5
※ Note : TJ = 25℃
0.0
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250μ s Pulse Test
-1
0
3
6
9
12
10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
500
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
450
Capacitance [pF]
0
10
400
Coss
350
Ciss
300
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
250
200
Crss
150
100
50
0
-1
10
0
10
1
10
-VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2008 Fairchild Semiconductor Corporation
VDS = -20V
10
-V GS , Gate-Source Voltage [V]
RDS(on) [ Ω ],
Drain-Source On-Resistance
10
VDS = -50V
VDS = -80V
8
6
4
2
※ Note : ID = -4.5 A
0
0
1
2
3
4
5
6
7
8
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. B1, October 2008
FQD5P10 / FQU5P10
Typical Characteristics
(Continued)
1.2
3.0
RDS(ON) , (Normalized)
Drain-Source On-Resistance
-BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = -250 μ A
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
※ Notes :
1. VGS = -10 V
2. ID = -1.8 A
0.5
0.0
-100
200
-50
0
50
100
150
200
o
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
4
Operation in This Area
is Limited by R DS(on)
-I D, Drain Current [A]
-I D, Drain Current [A]
3
100 µs
1
10
1 ms
10 ms
DC
0
10
※ Notes :
2
1
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-1
10
0
1
10
0
25
2
10
10
50
JC
( t) , T h e r m a l R e s p o n s e
Figure 9. Maximum Safe Operating Area
100
125
150
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
10
※ N o te s :
1 . Z θ J C ( t ) = 5 . 0 ℃ /W M a x .
2 . D u ty F a c t o r , D = t 1 /t 2
3 . T JM - T C = P D M * Z θ JC(t)
0 .2
0
0 .1
0 .0 5
10
0 .0 2
0 .0 1
-1
10
PDM
t1
s in g le p u ls e
Z
θ
75
TC, Case Temperature [℃]
-VDS, Drain-Source Voltage [V]
-5
10
-4
10
-3
10
-2
10
-1
t2
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2008 Fairchild Semiconductor Corporation
Rev. B1, October 2008
FQD5P10 / FQU5P10
Gate Charge Test Circuit & Waveform
50KΩ
200nF
12V
VGS
Same Type
as DUT
Qg
-10V
300nF
VDS
VGS
Qgs
Qgd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
t on
VDD
VGS
td(on)
VGS
t off
tr
td(off)
tf
10%
DUT
-10V
VDS
90%
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
tp
ID
RG
VDD
DUT
-10V
tp
©2008 Fairchild Semiconductor Corporation
VDD
Time
VDS (t)
ID (t)
IAS
BVDSS
Rev. B1, October 2008
FQD5P10 / FQU5P10
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
VDS
DUT
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
I SD
( DUT )
Compliment of DUT
(N-Channel)
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
Body Diode Reverse Current
IRM
di/dt
IFM , Body Diode Forward Current
VDS
( DUT )
VSD
Body Diode
Forward Voltage Drop
VDD
Body Diode Recovery dv/dt
©2008 Fairchild Semiconductor Corporation
Rev. B1, October 2008
FQD5P10 / FQU5P10
Package Dimensions
D - PAK
Dimensions in Millimeters
©2008 Fairchild Semiconductor Corporation
Rev. B1, October 2008
FQD5P10 / FQU5P10
Package Dimensions
I - PAK
Dimensions in Millimeters
©2008 Fairchild Semiconductor Corporation
Rev. B1, October 2008
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FQD5P10 / FQU5P10
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intended to be an exhaustive list of all such trademarks.
UHC®
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PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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THEREIN, WHICH COVERS THESE PRODUCTS.
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As used herein:
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and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2.
A critical component in any component of a life support, device, or
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the failure of the life support device or system, or to affect its safety or
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I37
FQD5P10 / FQU5P10 Rev. B1
www.fairchildsemi.com