SuperFET TM
FCP11N60 / FCPF11N60 / FCPF11N60T
General Description
Features
SuperFETTM is, Fairchild’s proprietary, new generation of
high voltage MOSFET family that is utilizing an advanced
charge balance mechanism for outstanding low onresistance and lower gate charge performance.
•
•
•
•
•
•
This advanced technology has been tailored to minimize
conduction loss, provide superior switching performance,
and withstand extreme dv/dt rate and higher avalanche
energy. Consequently, SuperFET is very suitable for
various AC/DC power conversion in switching mode
operation for system miniaturization and higher efficiency.
650V @ Tj = 150°C
Typ. Rds(on) = 0.32Ω
Ultra low gate charge (typ. Qg=40nC)
Low effective output capacitance (typ. Coss.eff = 95pF)
100% avalanche tested
RoHS Compliant
D
{
●
◀
G D S
G{
TO-220AB
FCP Series
Symbol
ID
Drain Current
TO-220F
GD S
Absolute Maximum Ratings
FCPF Series
Drain Current
{
S
TC = 25°C unless otherwise noted
Parameter
- Continuous (TC = 25°C)
FCP11N60
11
- Continuous (TC = 100°C)
IDM
▲
●
●
- Pulsed
(Note 1)
FCPF11N60(T)
11*
Units
A
7
7*
A
33
33*
A
± 30
V
340
mJ
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
(Note 2)
IAR
Avalanche Current
(Note 1)
11
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
(Note 1)
12.5
4.5
mJ
V/ns
W
W/°C
°C
dv/dt
PD
TJ, TSTG
TL
(Note 3)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
125
1.0
36
0.29
-55 to +150
300
°C
* Drain current limited by maximum junction termperature.
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
RθCS
Thermal Resistance, Case-to-Sink
RθJA
Thermal Resistance, Junction-to-Ambient
©2009 Fairchild Semiconductor Corporation
FCP11N60
1.0
FCPF11N60(T)
3.5
Units
°C/W
0.5
--
°C/W
62.5
62.5
°C/W
Rev.B2, October 2003
FCP11N60 / FCPF11N60 / FCPF11N60T
November 2009
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
VGS = 0 V, ID = 250 μA, TJ = 25°C
600
--
--
V
VGS = 0 V, ID = 250 μA, TJ = 150°C
--
650
--
V
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS
/
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, Referenced to 25°C
--
0.6
--
V/°C
BVDS
Drain-Source Avalanche Breakdown Voltage
VGS = 0 V, ID = 11 A
--
700
--
V
IDSS
IGSSF
IGSSR
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current,
Reverse
VDS = 600 V, VGS = 0 V
--
--
1
μA
VDS = 480 V, TC = 125°C
--
--
10
μA
VGS = 30 V, VDS = 0 V
--
--
100
nA
VGS = -30 V, VDS = 0 V
--
--
-100
nA
3.0
--
5.0
V
--
0.32
0.38
Ω
--
9.7
--
S
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 μA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 5.5 A
gFS
Forward Transconductance
VDS = 40 V, ID = 5.5 A
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance
Equivalent Series Resistance
ESR
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
VDS = 480 V, VGS = 0 V,
f = 1.0 MHz
VDS = 0V to 480 V, VGS = 0 V
Drain Open, f=1MHz
--
1148
1490
pF
--
671
870
pF
--
63
82
pF
--
35
--
pF
---
95
2.5
---
pF
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 300 V, ID = 11 A,
RG = 25 Ω
(Note 4, 5)
VDS = 480 V, ID = 11 A,
VGS = 10 V
(Note 4, 5)
--
34
80
ns
--
98
205
ns
--
119
250
ns
--
56
120
ns
--
40
52
nC
--
7.2
--
nC
--
21
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
11
A
ISM
Maximum Pulsed Drain-Source Diode Forward Current
Drain-Source Diode Forward VoltVGS = 0 V, IS = 11 A
age
VGS = 0 V, IS = 11 A,
Reverse Recovery Time
dIF / dt = 100 A/μs
Reverse Recovery Charge
--
--
33
A
--
--
1.4
V
--
390
--
ns
--
5.7
--
μC
VSD
trr
Qrr
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. IAS = 5.5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 11A, di/dt ≤ 200A/μs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300μs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2009 Fairchild Semiconductor Corporation
Rev. B2, October 2003
FCP11N60 / FCPF11N60 / FCPF11N60T
Elerical Characteristics
2
10
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
1
10
1
ID , Drain Current [A]
ID, Drain Current [A]
Top :
0
10
* Notes :
1. 250 μs Pulse Test
o
2. TC = 25 C
-1
10
-1
0
10
o
150 C
o
o
25 C
0
10
-55 C
* Note
1. VDS = 40V
2. 250 μs Pulse Test
-1
10
1
10
10
10
2
4
VDS, Drain-Source Voltage [V]
6
8
10
VGS , Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
IDR , Reverse Drain Current [A]
RDS(ON) [Ω],
Drain-Source On-Resistance
1.0
0.8
VGS = 10V
0.6
VGS = 20V
0.4
0.2
1
10
0
10
o
o
150 C
25 C
* Notes :
1. VGS = 0V
2. 250 μs Pulse Test
o
* Note : TJ = 25 C
0.0
0
5
10
15
20
25
30
35
-1
10
40
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
6000
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
4000
Coss
3000
* Notes :
1. VGS = 0 V
2. f = 1 MHz
Ciss
2000
Crss
1000
0
-1
10
0
10
1
10
VDS = 100V
VGS, Gate-Source Voltage [V]
5000
Capacitance [pF]
0.2
ID, Drain Current [A]
VDS = 250V
10
VDS = 400V
8
6
4
2
* Note : ID = 11A
0
0
5
10
15
20
25
30
35
40
45
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2009 Fairchild Semiconductor Corporation
Rev. B2, October 2003
FCP11N60 / FCPF11N60 / FCPF11N60T
Typical Characteristics
(Continued)
3.0
RDS(ON), (Normalized)
Drain-Source On-Resistance
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
* Notes :
1. VGS = 0 V
2. ID = 250 μA
0.9
0.8
-100
-50
0
50
100
150
2.5
2.0
1.5
1.0
* Notes :
1. VGS = 10 V
2. ID = 5.5 A
0.5
0.0
-100
200
-50
o
100
150
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
2
o
2
10
Operation in This Area
is Limited by R DS(on)
100 us
1
10
ID, Drain Current [A]
ID, Drain Current [A]
50
TJ, Junction Temperature [ C]
10
1 ms
10 ms
DC
0
10
* Notes :
o
1. TC = 25 C
-1
10
Operation in This Area
is Limited by R DS(on)
100 us
1
10
1 ms
10 ms
100 ms
0
10
DC
* Notes :
o
1. TC = 25 C
-1
10
o
2. TJ = 150 C
3. Single Pulse
o
2. TJ = 150 C
3. Single Pulse
-2
10
0
TJ, Junction Temperature [ C]
-2
0
1
10
2
10
3
10
10
VDS, Drain-Source Voltage [V]
10
0
10
1
10
2
10
3
10
VDS, Drain-Source Voltage [V]
Figure 9-2. Maximum Safe Operating Area
for FCPF11N60(T)
Figure 9-1. Maximum Safe Operating Area
for FCP11N60
12.5
ID, Drain Current [A]
10.0
7.5
5.0
2.5
0.0
25
50
75
100
125
150
o
TC, Case Temperature [ C]
Figure 10. Maximum Drain Current
vs. Case Temperature
©2009 Fairchild Semiconductor Corporation
Rev. B2, October 2003
FCP11N60 / FCPF11N60 / FCPF11N60T
Typical Characteristics
FCP11N60 / FCPF11N60 / FCPF11N60T
Typical Characteristics
(Continued)
0
10
ZθJC(t), Thermal Response
D = 0 .5
0 .2
10
* N o te s :
o
1 . Z θ J C (t) = 1 .0 C /W M a x .
2 . D u ty F a c to r, D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C (t)
0 .1
-1
0 .0 5
0 .0 2
PDM
0 .0 1
t1
s in g le p u ls e
10
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11-1. Transient Thermal Response Curve for FCP11N60
D = 0 .5
ZθJC(t), Thermal Response
10
0
0 .2
0 .1
* N o te s :
o
1 . Z θ J C (t) = 3 .5 C /W M a x.
2 . D u ty F a cto r, D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C (t)
0 .0 5
10
-1
0 .0 2
PDM
0 .0 1
t1
sin g le p u ls e
10
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a re W a ve P u ls e D u ra tio n [s e c ]
Figure 11-2. Transient Thermal Response Curve for FCPF11N60(T)
©2009 Fairchild Semiconductor Corporation
Rev. B2, October 2003
FCP11N60 / FCPF11N60 / FCPF11N60T
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
200nF
12V
Qg
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
VDS
90%
VDD
VGS
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2009 Fairchild Semiconductor Corporation
ID (t)
VDS (t)
VDD
tp
Time
Rev. B2, October 2003
FCP11N60 / FCPF11N60 / FCPF11N60T
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2009 Fairchild Semiconductor Corporation
Rev. B2, October 2003
FCP11N60 / FCPF11N60 / FCPF11N60T
Mechanical Dimensions
TO-220AB
Dimensions in Millimeters
©2009 Fairchild Semiconductor Corporation
Rev. B2, October 2003
3.30 ±0.10
TO-220F
10.16 ±0.20
2.54 ±0.20
ø3.18 ±0.10
(7.00)
(1.00x45°)
15.87 ±0.20
15.80 ±0.20
6.68 ±0.20
(0.70)
0.80 ±0.10
)
0°
(3
9.75 ±0.30
MAX1.47
#1
+0.10
0.50 –0.05
2.54TYP
[2.54 ±0.20]
2.76 ±0.20
2.54TYP
[2.54 ±0.20]
9.40 ±0.20
4.70 ±0.20
0.35 ±0.10
Dimensions in Millimeters
©2009 Fairchild Semiconductor Corporation
Rev. B2, October 2003
FCP11N60 / FCPF11N60 / FCPF11N60T
Mechanical Dimensions
FCP11N60 / FCPF11N60 / FCPF11N60T
Package Dimensions
TO-220F Potted
* Front/Back Side Isolation Voltage : AC 2500V
Dimensions in Millimeters
©2009 Fairchild Semiconductor Corporation
Rev. B2, October 2003
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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No Identification Needed
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
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Semiconductor. The datasheet is for reference information only.
Rev. I41
©2009 Fairchild Semiconductor Corporation
Rev. B2, October 2003