SY89546U 2.5V, 3.2Gbps Differential 4:1 LVDS Multiplexer with 1:2 Fanout and Internal Termination General Description Features The SY89546U is a precision, High-speed 4:1 differential multiplexer that provides two copies of the selected input. The high speed LVDS (350mV) compatible outputs with a guaranteed throughput of up to 3.2Gbps over temperature and voltage. • Selects among four differential inputs • Provides two copies of the selected input • Guaranteed AC parameters over temp/voltage: – DC-to>3.2Gbps data rat throughput – <620ps In-to-Out tpd – <150ps tr/tf time • Unique input isolation design minimize crosstalk • Ultra-low jitter design: – <1psRMS random jitter – <10psPP deterministic jitter – <10psPP total jitter (clock) – <0.7psRMS corsstalk-induced jitter • Internal input termination • Unique input termination and VT pin accepts DCcoupled and AC-coupled inputs (LVDS, LVPECL, CML) • 350mV LVDS output swing • Power supple 2.5V ±5% • –40°C to +85°C temperature range • Availabe in 32-pin (5mmx5mm) MLF® package The SY89546U differential inputs include Micrel’s unique 3-pin internal termination design that allows access to the termination network through a VT pin. This feature allows the device to easily interface to different logic standards, both AC- and DC-coupled without external resistor-bias and termination networks. The result is a clean, stub-free, low jitter interface solution. The SY89546U operates from a single 2.5V supply, and is guaranteed over the full industrial temperature range (–40°C to +85°C). For applications that require a 3.3V supply, consider the SY89547L. Or, for applications that only require one differential output, consider the SY89544U or SY89545L. The SY89546U is part of Micrel’s Precision Edge® product family. Data sheets and support documentation can be found on Micrel’s web site at: www.micrel.com. Applications • SONET/SDH multi-channel select applications • Fibre Channel applications • GigE application ___________________________________________________________________________________________________________ Typical Performance Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com April 2011 M9999-041911-B [email protected] or (408) 955-1690 Micrel, Inc. SY89546U Functional Block Diagram April 2011 2 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Ordering Information(1) Part Number SY89546UMI 2) SY89546UMITR Package Type Operating Range Package Marking Lead Finish MLF-32 Industrial SY89546U Sn-Pb MLF-32 Industrial SY89546U Sn-Pb SY89546UMG(3) MLF-32 Industrial SY89546U with Pb-Free bar-line indicator Pb_Free SY89546UMGTR(2,3) MLF-32 Industrial SY89546U with Pb-Free bar-line indicator Pb_Free NiPdAu NiPdAu Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. 3. Recommended for new designs. Pin Configuration 32-Pin MLF® April 2011 3 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Pin Description Pin Number Pin Name Pin Function 4, 2, 21, 32, IN0, /IN0 30, 27, 25, 23, 21 IN1, /IN1 Differential Inputs: These inputs pairs are the differential signal inputs to the device. Inputs accept AC- or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50Ω. Note that these inputs will default to an indeterminate state if left open. Unused differential input pairs can be terminated by connecting one input to VCC and the complementary input to GND through a 1kΩ resistor. The VT pin is to be left open in this configuration. Please refer to the “input Interface Applications” section for more details. IN2, /IN2 IN3, /IN3 3, 31, 26, 22 VT0, VT1, VT2, VT3 6, 19 SEL0, SEL1 1, 5, 8, 17, 20, 24, 28, 29 VCC 10, 11, 14, 15 Q0, /Q0 7, 9, 12, 13, 16, 18 April 2011 Q1, /Q1 GND, Input Termination Center-Tap: Each side of the differential input pair, terminates to a VT pin. The VTA0, VTA1, VTB0, VTB1 pins provide a center-tap to a termination network for maximum interface flexibility. See “input Interface Applications” section for more details. These single-ended TTL/CMOS-compatible inputs select the inputs to the multiplexers. Note that these inputs are internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH state if left open. Input switching threshold is VCC/2. Positive Power Supply: Bypass with 0.1μF║ 0.01μF low ESR capacitors. Differential Outputs: These LVDS outputs pairs are the outputs of the device. They are a logic function of the INA0, INA1, INB0, INB1 and SELA and SELB inputs. Please refer to the “Truth Table” for details. If an output is not used, it must be terminated with 100Ω across the differential pair. Ground: Ground pin and exposed pad must be connected to the same ground plane. Exposed pad 4 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (Vcc) ..................................... –0.5V to +4.0V Input Voltage (VIN) ....................................................................–0.5V to Vcc Termination Current(3) Source or sink current on VT............................±100mA Input Current Source or sink current on VT..............................±50mA Lead Temperature (soldering, 20sec.)..................... +260°C Storage Temperature (Ts).........................–65°C to +150°C Supply Voltage (VCC)............................. 2.375V to 2.625V Ambient Temperature (TA).......................–40°C to +85°C Package Thermal Resistance(4) MLF® (θJA) Still Air, multi-layer PCB .................................35°C/W 500lfpm, multi-layer PCB................................28°C/W MLF® (ΨJA) Junction-to-Board ...........................................20°C/W DC Electrical Characteristics(5) -40°C≤ TA ≤ +85°C, unless stated otherwise. Symbol Parameter VCC Power Supply ICC Power Supply Current RDIFF_IN Differential Input Resistance Condition No Load, Max. Min Typ Max Units 2.375 2.5 2.625 V 75 100 mA 80 100 120 Ω 40 50 60 Ω 1.2 VCC V 0 VIH-0.1 V Note 7 0.1 VCC V Note 7 0.2 VCC(6) (IN-to-/IN) RIN Input Resistance (IN-to-VT, /IN-to-VT) VIH Input High Voltage (IN, /IN) VIL Input Low Voltage (IN, /IN) VIN Input Voltage Swing VDIFF_IN Differential Input Voltage Swing (IN, /IN) V |IN – /IN| IN-to-VT 1.8 Note 7 V Notes: 1. Permanent device damage may occur if “Absolute Maximum Ratings” are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to “Absolute Maximum Ratings” conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability use for input of the same package only. 4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential (GND) on the PCB. ΨJA uses 4-layer θJA in still-air unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 6. Includes current through internal 50Ω pull-ups. 7. See “Single-Ended and Differential Swings” section for VIN and VDIFF_IN definition. April 2011 5 M9999-0041911-B [email protected] Micrel, Inc. SY89546U LVDS Outputs DC Electrical Characteristics(9) VCC = 2.5V ± 5%; -40°C≤ TA ≤ +85°C, RL = 100Ω across Q and /Q, unless stated otherwise. Symbol Parameter VOH Condition Output HIGH Voltage Min Typ Max See Figure 5a Units V (Q, /Q) VOL Output LOW Voltage See Figure 5a 0.925 V See Figure 1a, 5a 250 350 mV See Figure 1b 500 700 mV See Figure 5b 1.125 1.275 V See Figure 5b –50 +50 mV Max Units VCC V (Q, /Q) VOUT Output Voltage Swing VDIFF-OUT Differential Output Voltage Swing (Q, /Q) |Q – /Q| VOCM Output common Mode Voltage (Q, /Q) ∆VOCM Change in Common Mode Voltage (Q, /Q) LVTTL/CMOS DC Electrical Characteristics (9) VCC = 2.5V ± 5%, -40°C≤ TA ≤ +85°C, unless stated otherwise. Symbol Parameter Condition Min Typ VIH Input HIGH Voltage 2.0 VIL Input LOW Voltage 0.8 V IIH Input HIGH Current 40 μA IIL Input LOW Current –300 μA Notes: 1. The circuit is the designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. April 2011 6 M9999-0041911-B [email protected] Micrel, Inc. SY89546U AC Electrical Characteristics (10) VCC = 2.5V± 5%; -40°C≤ TA ≤ +85°C, RL = 100Ω across Q and /Q, unless stated otherwise. Symbol fMAX Parameter Condition Min Maximum Operating Frequency NRZ Data Differential Propagation Delay tSKEW tJITTER Data Clock Max Units 3.2 Gbps 3 4 IN-to-Q 330 430 530 ps SEL-to-Q 200 400 700 VOUT ≥ 200mV tPD Typ Clock GHz Input-to-Input Skew Note 11 4 20 Output-to- Output Skew Note 12 8 20 Part-to-Park Skew Note 13 200 ps ps ps ps Random Jitter (RJ) Note 14 1 psRMS Deterministic Jitter (DJ) Note 15 10 Total Jitter (TJ) Note 16 10 Cycle-to-Cycle Jitter Note 17 1 0.7 psPP psPP psRMS psRMS 150 ps Crosstalk Crosstalk-Induced Jitter tr, tf Output Rise/Fall Time Note 18 At full output swing 35 (20% to 80%) 80 Notes: 1. Measured with 100mV input swing. See “Timing Diagrams” section for definition of parameters. High frequency AC parameters are guaranteed by design and characterization. 2. Input-to-input skew is the difference in time from an input-to-output in comparison to any other input-to-output. In addition, the input-to-input skew does not include the output skew. 3. Output-to-output skew is measured between two different outputs under identical input transitions. 4. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. Total skew is calculated as the RMS (Root Mean Square) of the input skew and output skew. 5. Random jitter is measured with a K28.7 comma detect character pattern, measured at 1.25Gbps and 3.2Gbps. 23 6. Deterministic jitter is measured at 1.25Gbps and 3.2Gbps, with both K28.5 and 2 –1 PRBS pattern. 12 Total jitter definition: with an ideal clock input of frequency ≤ fMAX, no more than one output edge in 10 output edges will deviate by more than the specified peak-to-peak jitter value. 7. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, T-Tn-1 where T is the time between rising edges of the output cycle. 8. Crosstalk is measured at the output while applying two similar clock frequencies to adjacent inputs that are asynchronous with respect to each other at the inputs. April 2011 7 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Single-Ended and Differential Swings Figure 1a . Single-Ended Voltage Swing Figure 1b . Differential Voltage Swing Timing Diagram Figure 2. Timing Diagrams April 2011 8 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Truth Table IN0 IN1 IN2 IN3 SEL0 SEL1 Q /Q 0 X X X 0 0 0 1 1 X X X 0 0 1 0 X 0 X X 1 0 0 1 X 1 X X 1 0 1 0 X X 0 X 0 1 0 1 X X 1 X 0 1 1 0 X X X 0 1 1 0 1 X X X 1 1 1 1 0 April 2011 9 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Functional Characteristics VCC = 2.5V, GND = 0V, VIN = 100mV, TA = 25°C. April 2011 10 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Input and Output Stage Internal Termination Figure 3 . Simplified Differential Input Stage April 2011 11 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Input Interface Applications April 2011 12 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Output Interface Applications Related Micrel Products and Support Documentation Part Number SY89542U SY89543L SY89544U SY89545L SY89547L HBW Solutions April 2011 Function 2.5 V, 3.2Gbps Dual, Differential 2:1 LVDS Multiplexer with Internal Input Termination 3.3V, 3.2Gbps Dual, Differential 2:1 LVDS Multiplexer with Internal Input Termination 2.5V, 3.2Gbps, Differential 4:1 LVDS Multiplexer with Internal Input Termination 3.3V, 3.2Gbps 4:1 LVDS Multiplexer with Internal Input Termination 3.3V, 3.2Gbps, Differential 4:1 LVDS Multiplexer with 1:2 Fanout and Internal Input Termination Data Sheet Link http://www.micrel.com/_PDF/HBW/sy89542u.pdf http://www.micrel.com/_PDF/HBW/sy89543l.pdf http://www.micrel.com/_PDF/HBW/sy89544u.pdf http://www.micrel.com/_PDF/HBW/sy89545l.pdf http://www.micrel.com/_PDF/HBW/SY89547l.pdf MLF® Application Note www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf New Products and Applications www.micrel.com/product-info/products/solutions.shtml 13 M9999-0041911-B [email protected] Micrel, Inc. SY89546U Package Information PCB Thermal Consideration for 32-Pin MLF® Package (Always solder, or equivalent, the exposed pad to the PCB MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2010 Micrel, Incorporated. April 2011 14 M9999-0041911-B [email protected]